summaryrefslogtreecommitdiffstats
path: root/arch/riscv/include/asm (follow)
Commit message (Expand)AuthorAgeFilesLines
...
| * RISC-V CPU Idle SupportPalmer Dabbelt2022-03-313-0/+86
| |\
| | * RISC-V: Add SBI HSM suspend related definesAnup Patel2022-03-101-5/+22
| | * RISC-V: Add arch functions for non-retentive suspend entry/exitAnup Patel2022-03-102-0/+63
| | * RISC-V: Enable CPU_IDLE driversAnup Patel2022-03-101-0/+24
| * | riscv: Rename "sp_in_global" to "current_stack_pointer"Kees Cook2022-03-311-0/+2
| * | riscv module: remove (NOLOAD)Fangrui Song2022-03-291-3/+3
* | | Merge tag 'char-misc-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds2022-03-281-0/+1
|\ \ \ | |/ / |/| |
| * | parport_pc: Also enable driver for PCI systemsMaciej W. Rozycki2022-03-181-0/+1
| |/
* | Merge tag 'riscv-for-linus-5.18-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds2022-03-259-76/+347
|\ \
| * \ perf: RISC-V: Add support for SBI PMU and SscofpmfPalmer Dabbelt2022-03-224-73/+161
| |\ \
| | * | RISC-V: Add sscofpmf extension supportAtish Patra2022-03-212-1/+8
| | * | RISC-V: Add RISC-V SBI PMU extension definitionsAtish Patra2022-03-211-0/+95
| | * | RISC-V: Add CSR encodings for all HPMCOUNTERSAtish Patra2022-03-211-0/+58
| | * | RISC-V: Remove the current perf implementationAtish Patra2022-03-211-72/+0
| * | | RISC-V: Provide a fraemework for RISC-V ISA extensionsPalmer Dabbelt2022-03-171-0/+25
| |\| |
| | * | RISC-V: Improve /proc/cpuinfo output for ISA extensionsAtish Patra2022-03-171-0/+7
| | * | RISC-V: Implement multi-letter ISA extension probing frameworkAtish Patra2022-03-171-0/+18
| | |/
| * | riscv: mm: Set sv57 on defaultlyQinglin Pan2022-02-152-0/+2
| * | riscv: mm: Prepare pt_ops helper functions for sv57Qinglin Pan2022-02-152-0/+3
| * | riscv: mm: Control p4d's folding by pgtable_l5_enabledQinglin Pan2022-02-153-3/+156
| |/
* | Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2022-03-243-6/+27
|\ \
| * | RISC-V: KVM: Add common kvm_riscv_vcpu_wfi() functionAnup Patel2022-03-111-0/+1
| * | RISC-V: Add SBI HSM suspend related definesAnup Patel2022-03-111-5/+22
| * | RISC-V: KVM: Add common kvm_riscv_vcpu_sbi_system_reset() functionAnup Patel2022-03-111-0/+3
| * | RISC-V: KVM: Upgrade SBI spec version to v0.3Anup Patel2022-03-111-1/+1
| |/
* | Merge tag 'asm-generic-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git...Linus Torvalds2022-03-241-32/+1
|\ \
| * | uaccess: generalize access_ok()Arnd Bergmann2022-02-251-30/+1
| * | uaccess: add generic __{get,put}_kernel_nofaultArnd Bergmann2022-02-251-2/+0
| |/
* / riscv: Fix is_linear_mapping with recent move of KASAN regionAlexandre Ghiti2022-03-032-1/+2
|/
* Merge tag 'bitmap-5.17-rc1' of git://github.com/norov/linuxLinus Torvalds2022-01-231-1/+0
|\
| * include: move find.h from asm_generic to linuxYury Norov2022-01-151-1/+0
* | RISC-V: Do not use cpumask data structure for hartid bitmapAtish Patra2022-01-202-11/+10
* | RISC-V: Use __cpu_up_stack/task_pointer only for spinwait methodAtish Patra2022-01-201-2/+0
* | RISC-V: Avoid using per cpu array for ordered bootingAtish Patra2022-01-201-0/+25
* | RISC-V: Introduce sv48 support without relocatable kernelPalmer Dabbelt2022-01-208-22/+228
|\ \
| * | riscv: Explicit comment about user virtual address space sizeAlexandre Ghiti2022-01-201-0/+9
| * | riscv: Implement sv48 supportAlexandre Ghiti2022-01-207-9/+187
| * | riscv: Allow to dynamically define VA_BITSAlexandre Ghiti2022-01-203-4/+14
| * | riscv: Split early kasan mapping to prepare sv48 introductionAlexandre Ghiti2022-01-201-0/+1
| * | riscv: Move KASAN mapping next to the kernel mappingAlexandre Ghiti2022-01-203-11/+17
* | | Merge tag 'riscv-for-linus-5.17-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds2022-01-1910-182/+260
|\ \ \
| * | | RISC-V: Use SBI SRST extension when availableAnup Patel2022-01-111-0/+24
| * | | RISC-V: Use common riscv_cpuid_to_hartid_mask() for both SMP=y and SMP=nSean Christopherson2022-01-091-8/+2
| * | | riscv: remove cpu_stop()Jisheng Zhang2022-01-091-2/+0
| * | | riscv/mm: Enable THP migrationNanyong Sun2022-01-081-0/+5
| * | | riscv/mm: Adjust PAGE_PROT_NONE to comply with THP semanticsNanyong Sun2022-01-082-6/+7
| * | | riscv: Make vmalloc/vmemmap end equal to the start of the next regionAlexandre Ghiti2022-01-061-2/+2
| * | | riscv: extable: add a dedicated uaccess handlerJisheng Zhang2022-01-063-70/+51
| * | | riscv: add gpr-num.hJisheng Zhang2022-01-061-0/+77
| * | | riscv: extable: add `type` and `data` fieldsJisheng Zhang2022-01-062-11/+31
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-30 11:32:00 +0100