summaryrefslogtreecommitdiffstats
path: root/arch/riscv/include (follow)
Commit message (Expand)AuthorAgeFilesLines
* mm: rename flush_icache_user_range to flush_icache_user_pageChristoph Hellwig2020-06-081-1/+2
* riscv: use asm-generic/cacheflush.hChristoph Hellwig2020-06-081-59/+3
* Merge tag 'riscv-for-linus-5.8-mw0' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds2020-06-057-2/+516
|\
| * riscv: cacheinfo: Implement cache_get_priv_group with a generic ops structureYash Shah2020-05-211-0/+15
| * riscv: Remove the 'riscv_' prefix of function nameZong Li2020-05-181-2/+2
| * riscv: Add SW single-step support for KDBVincent Chen2020-05-181-0/+219
| * riscv: Use the XML target descriptions to report 3 system registersVincent Chen2020-05-182-1/+124
| * riscv: Add KGDB supportVincent Chen2020-05-182-0/+118
| * riscv: Allow device trees to be built into the kernelPalmer Dabbelt2020-05-181-0/+39
* | riscv: support DEBUG_WXZong Li2020-06-041-0/+11
* | mm/hugetlb: define a generic fallback for arch_clear_hugepage_flags()Anshuman Khandual2020-06-041-4/+0
* | mm/hugetlb: define a generic fallback for is_hugepage_only_range()Anshuman Khandual2020-06-041-6/+0
* | mm: switch the test_vmalloc module to use __vmalloc_nodeChristoph Hellwig2020-06-021-2/+2
|/
* riscv: mmiowb: Fix implicit declaration of function 'smp_processor_id'Kefeng Wang2020-05-141-0/+1
* riscv: pgtable: Fix __kernel_map_pages build error if NOMMUKefeng Wang2020-05-141-0/+2
* riscv: Add pgprot_writecombine/device and PAGE_SHARED defination if NOMMUKefeng Wang2020-05-132-0/+3
* riscv: perf: RISCV_BASE_PMU should be independentKefeng Wang2020-05-131-6/+2
* RISC-V: Remove unused code from STRICT_KERNEL_RWXAtish Patra2020-05-061-8/+0
* RISC-V: Remove N-extension related definesAnup Patel2020-05-041-3/+0
* RISC-V: Add bitmap reprensenting ISA features common across CPUsAnup Patel2020-05-041-0/+22
* arch: split MODULE_ARCH_VERMAGIC definitions out to <asm/vermagic.h>Masahiro Yamada2020-04-232-2/+9
* mm/vma: define a default value for VM_DATA_DEFAULT_FLAGSAnshuman Khandual2020-04-111-2/+1
* Merge tag 'riscv-for-linus-5.7' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds2020-04-0913-75/+313
|\
| * riscv: Add SOC early init supportDamien Le Moal2020-04-031-0/+23
| * RISC-V: Support cpu hotplugAtish Patra2020-03-312-0/+29
| * RISC-V: Add SBI HSM extension definitionsAtish Patra2020-03-311-0/+14
| * RISC-V: Export SBI error to linux error mapping functionAtish Patra2020-03-311-0/+2
| * RISC-V: Add cpu_ops and modify default booting methodAtish Patra2020-03-311-0/+34
| * RISC-V: Implement new SBI v0.2 extensionsAtish Patra2020-03-312-0/+21
| * RISC-V: Introduce a new config for SBI v0.1Atish Patra2020-03-311-0/+2
| * RISC-V: Add SBI v0.2 extension definitionsAtish Patra2020-03-311-0/+21
| * RISC-V: Add basic support for SBI v0.2Atish Patra2020-03-311-71/+68
| * RISC-V: Mark existing SBI as 0.1 SBI.Atish Patra2020-03-311-19/+22
| * riscv: Use macro definition instead of magic numberZong Li2020-03-261-1/+1
| * riscv: Add support to dump the kernel page tablesZong Li2020-03-262-0/+21
| * riscv: introduce interfaces to patch kernel codeZong Li2020-03-262-0/+14
| * riscv: add macro to get instruction lengthZong Li2020-03-261-0/+8
| * riscv: add STRICT_KERNEL_RWX supportZong Li2020-03-261-0/+8
| * riscv: add alignment for text, rodata and data sectionsZong Li2020-03-261-0/+13
| * riscv: add ARCH_HAS_SET_DIRECT_MAP supportZong Li2020-03-261-0/+3
| * riscv: add ARCH_HAS_SET_MEMORY supportZong Li2020-03-261-0/+24
| * RISC-V: Move all address space definition macros to one placeAtish Patra2020-03-061-37/+41
| * RISC-V: Stop relying on GCC's register allocator's hueristicsPalmer Dabbelt2020-03-031-2/+3
| * riscv: Use flush_icache_mm for flush_icache_user_rangeGuo Ren2020-03-031-1/+1
* | asm-generic: make more kernel-space headers mandatoryMasahiro Yamada2020-04-021-28/+0
* | Merge branch 'locking-core-for-linus' of git://git.kernel.org/pub/scm/linux/k...Linus Torvalds2020-03-311-3/+2
|\ \
| * \ Merge branch 'uaccess.futex' of git://git.kernel.org/pub/scm/linux/kernel/git...Thomas Gleixner2020-03-281-3/+2
| |\ \ | | |/ | |/|
| | * futex: arch_futex_atomic_op_inuser() calling conventions changeAl Viro2020-03-281-3/+2
* | | RISC-V: Move all address space definition macros to one placeAtish Patra2020-03-271-37/+41
* | | riscv: fix the IPI missing issue in nommu modeGreentime Hu2020-03-191-4/+4
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-04 08:43:00 +0100