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* RISC-V: Add arch_crash_save_vmcoreinfo supportXianting Tian2022-12-031-0/+1
* kbuild: use obj-y instead extra-y for objects placed at the headMasahiro Yamada2022-10-021-1/+1
* RISC-V: kexec: Fix build error without CONFIG_KEXECLi Zhengyu2022-07-141-1/+1
* riscv: kexec: add kexec_file_load() supportPalmer Dabbelt2022-05-201-0/+1
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| * RISC-V: Add kexec_file supportLiao Chang2022-05-191-0/+1
* | RISC-V: Add support for rv32 userspace via COMPATPalmer Dabbelt2022-05-191-0/+3
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| * | riscv: compat: signal: Add rt_frame implementationGuo Ren2022-05-181-0/+1
| * | riscv: compat: vdso: Add COMPAT_VDSO base code implementationGuo Ren2022-04-261-0/+1
| * | riscv: compat: syscall: Add compat_sys_call_table implementationGuo Ren2022-04-261-0/+1
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* | riscv: add memory-type errata for T-HeadHeiko Stuebner2022-05-121-0/+14
* | riscv: integrate alternatives better into the main architectureHeiko Stuebner2022-05-121-0/+1
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* RISC-V CPU Idle SupportPalmer Dabbelt2022-03-311-0/+2
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| * RISC-V: Add arch functions for non-retentive suspend entry/exitAnup Patel2022-03-101-0/+2
* | Merge tag 'riscv-for-linus-5.18-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds2022-03-251-1/+0
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| * | RISC-V: Remove the current perf implementationAtish Patra2022-03-211-1/+0
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* / riscv: fix oops caused by irqsoff latency tracerChangbin Du2022-02-251-0/+2
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* RISC-V: Move spinwait booting method to its own configAtish Patra2022-01-201-1/+2
* riscv: kexec: do not add '-mno-relax' flag if compiler doesn't support itChangbin Du2021-08-121-1/+1
* Merge tag 'riscv-for-linus-5.13-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds2021-05-061-0/+6
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| * RISC-V: Add crash kernel supportNick Kossifidis2021-04-261-0/+1
| * RISC-V: Add kdump supportNick Kossifidis2021-04-261-1/+1
| * RISC-V: Add kexec supportNick Kossifidis2021-04-261-0/+5
* | riscv: syscall_table: Reduce W=1 compilation warnings noiseNanyong Sun2021-03-101-0/+1
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* riscv: Add kprobes supportedGuo Ren2021-01-151-0/+1
* riscv: Fixup patch_text panic in ftraceGuo Ren2021-01-151-0/+1
* riscv: Fixup wrong ftrace remove cflagGuo Ren2021-01-151-2/+2
* riscv: kernel: Drop unused clean ruleKefeng Wang2020-12-111-2/+0
* RISC-V: Add EFI runtime servicesAtish Patra2020-10-021-0/+2
* RISC-V: Remove CLINT related code from timer and archAnup Patel2020-08-201-1/+1
* riscv: Add jump-label implementationEmil Renner Berthing2020-07-301-0/+2
* riscv: Add KGDB supportVincent Chen2020-05-181-0/+1
* riscv: perf: RISCV_BASE_PMU should be independentKefeng Wang2020-05-131-1/+1
* riscv: Add SOC early init supportDamien Le Moal2020-04-031-0/+1
* riscv: Unaligned load/store handling for M_MODEDamien Le Moal2020-04-031-1/+1
* RISC-V: Support cpu hotplugAtish Patra2020-03-311-0/+1
* RISC-V: Add supported for ordered booting method using HSMAtish Patra2020-03-311-0/+3
* RISC-V: Add cpu_ops and modify default booting methodAtish Patra2020-03-311-0/+2
* riscv: introduce interfaces to patch kernel codeZong Li2020-03-261-1/+3
* riscv: add nommu supportChristoph Hellwig2019-11-181-2/+1
* riscv: provide native clint access for M-modeChristoph Hellwig2019-11-181-0/+1
* riscv: cleanup the default power off implementationChristoph Hellwig2019-11-131-0/+1
* riscv: Add support for perf registers samplingMao Han2019-09-051-0/+1
* riscv: Add perf callchain supportMao Han2019-09-041-1/+2
* treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner2019-05-211-0/+1
* RISC-V: Always compile mm/init.c with cmodel=medany and notraceAnup Patel2019-03-271-3/+0
* Allow to disable FPU supportAlan Kao2018-10-231-1/+1
* Extract FPU context operations from entry.SAlan Kao2018-10-231-0/+1
* perf: riscv: preliminary RISC-V supportAlan Kao2018-06-041-0/+2
* RISC-V: Fixes to module loadingPalmer Dabbelt2018-04-031-0/+1
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| * RISC-V: Add sections of PLT and GOT for kernel moduleZong Li2018-04-031-0/+1
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