summaryrefslogtreecommitdiffstats
path: root/arch/riscv/kernel/cpufeature.c (follow)
Commit message (Expand)AuthorAgeFilesLines
* riscv: Add __init section marker to some functions againJisheng Zhang2021-05-291-1/+1
* riscv: Turn has_fpu into a static key if FPU=yJisheng Zhang2021-05-261-2/+2
* RISC-V: Add bitmap reprensenting ISA features common across CPUsAnup Patel2020-05-041-3/+80
* riscv: add missing header file includesPaul Walmsley2019-10-281-0/+1
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234Thomas Gleixner2019-06-191-12/+1
* RISC-V: Assign hwcap as per comman capabilities.Atish Patra2019-03-041-19/+22
* riscv: use for_each_of_cpu_node iteratorJohan Hovold2019-02-121-2/+3
* riscv: add missing newlines to printk messagesJohan Hovold2019-02-121-4/+4
* RISC-V: Fix of_node_* refcountAtish Patra2018-12-211-0/+2
* RISC-V: properly determine hardware capsAndreas Schwab2018-10-311-3/+5
* riscv: Add support to no-FPU systemsPalmer Dabbelt2018-10-231-0/+8
|\
| * Auto-detect whether a FPU existsAlan Kao2018-10-231-0/+8
* | RISC-V: Mask out the F extension on systems without DPalmer Dabbelt2018-10-231-0/+7
|/
* RISC-V: User-facing APIPalmer Dabbelt2017-09-271-0/+61