Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | RISC-V: Fix of_node_* refcount | Atish Patra | 2018-12-21 | 1 | -1/+5 |
* | RISC-V: Use Linux logical CPU number instead of hartid | Atish Patra | 2018-10-23 | 1 | -9/+16 |
* | RISC-V: Use WRITE_ONCE instead of direct access | Atish Patra | 2018-10-23 | 1 | -2/+3 |
* | RISC-V: Use mmgrab() | Palmer Dabbelt | 2018-10-23 | 1 | -1/+2 |
* | RISC-V: Rename im_okay_therefore_i_am to found_boot_cpu | Palmer Dabbelt | 2018-10-23 | 1 | -4/+5 |
* | RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartid | Palmer Dabbelt | 2018-10-23 | 1 | -1/+1 |
* | RISC-V: Disable preemption before enabling interrupts | Atish Patra | 2018-10-23 | 1 | -1/+5 |
* | RISC-V: Comment on the TLB flush in smp_callin() | Palmer Dabbelt | 2018-10-23 | 1 | -0/+4 |
* | clocksource: new RISC-V SBI timer driver | Palmer Dabbelt | 2018-08-13 | 1 | -1/+0 |
* | RISC-V: Init and Halt Code | Palmer Dabbelt | 2017-09-27 | 1 | -0/+114 |