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* riscv: Unaligned load/store handling for M_MODEDamien Le Moal2020-04-033-4/+395
* RISC-V: Support cpu hotplugAtish Patra2020-03-314-1/+140
* RISC-V: Add supported for ordered booting method using HSMAtish Patra2020-03-316-3/+121
* RISC-V: Export SBI error to linux error mapping functionAtish Patra2020-03-311-1/+2
* RISC-V: Add cpu_ops and modify default booting methodAtish Patra2020-03-314-21/+113
* RISC-V: Move relocate and few other functions out of __initAtish Patra2020-03-312-72/+86
* RISC-V: Implement new SBI v0.2 extensionsAtish Patra2020-03-311-4/+249
* RISC-V: Introduce a new config for SBI v0.1Atish Patra2020-03-311-23/+109
* RISC-V: Add basic support for SBI v0.2Atish Patra2020-03-312-2/+246
* riscv: patch code by fixmap mappingZong Li2020-03-261-9/+4
* riscv: introduce interfaces to patch kernel codeZong Li2020-03-262-1/+123
* riscv: add macro to get instruction lengthZong Li2020-03-261-1/+2
* riscv: add alignment for text, rodata and data sectionsZong Li2020-03-261-1/+4
* riscv: move exception table immediately after RO_DATAZong Li2020-03-261-2/+4
* RISC-V: Inline the assembly register save/restore macrosPalmer Dabbelt2020-03-031-82/+61
* RISC-V: Stop relying on GCC's register allocator's hueristicsPalmer Dabbelt2020-03-032-5/+7
* RISC-V: Stop putting .sbss in .sdataPalmer Dabbelt2020-03-031-1/+0
* riscv: force hart_lottery to put in .sdata sectionZong Li2020-03-031-2/+6
* RISC-V: Don't enable all interrupts in trap_init()Anup Patel2020-02-181-2/+2
* riscv: set pmp configuration if kernel is running in M-modeGreentime Hu2020-02-181-0/+6
* Merge tag 'riscv-for-linus-5.6-mw0' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds2020-01-314-0/+11
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| * riscv: Add KASAN supportNick Hu2020-01-224-0/+11
* | Merge tag 'tty-5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/greg...Linus Torvalds2020-01-291-4/+0
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| * | arch/riscv/setup: Drop dummy_con initializationArvind Sankar2020-01-141-4/+0
* | | Merge branch 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds2020-01-281-2/+2
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| * | Merge tag 'v5.5-rc3' into sched/core, to pick up fixesIngo Molnar2019-12-251-1/+1
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| * | | sched/rt, riscv: Use CONFIG_PREEMPTIONThomas Gleixner2019-12-081-2/+2
* | | | riscv: delete temporary filesIlie Halip2020-01-181-1/+2
* | | | riscv: make sure the cores stay looping in .Lsecondary_parkGreentime Hu2020-01-161-6/+10
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* | | Merge tag 'riscv/for-v5.5-rc6' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds2020-01-131-1/+1
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| * | | riscv: Fixup obvious bug for fp-regs resetGuo Ren2020-01-121-1/+1
* | | | riscv: Implement copy_thread_tlsAmanieu d'Antras2020-01-071-3/+3
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* | | riscv: prefix IRQ_ macro names with an RV_ namespacePaul Walmsley2020-01-051-3/+3
* | | riscv: ftrace: correct the condition logic in function graph tracerZong Li2020-01-031-1/+1
* | | riscv: reject invalid syscalls below -1David Abdurachmanov2019-12-281-0/+1
* | | riscv: fix compile failure with EXPORT_SYMBOL() & !MMULuc Van Oostenryck2019-12-281-3/+0
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* | riscv: fix scratch register clearing in M-mode.Greentime Hu2019-12-201-1/+1
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* Merge tag 'seccomp-v5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git...Linus Torvalds2019-12-011-1/+1
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* \ Merge tag 'riscv/for-v5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds2019-11-2718-138/+340
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| * \ Merge branch 'next/nommu' into for-nextPaul Walmsley2019-11-2316-94/+302
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| | * | riscv: add nommu supportChristoph Hellwig2019-11-184-3/+34
| | * | riscv: clear the instruction cache and all registers when bootingChristoph Hellwig2019-11-181-1/+87
| | * | riscv: read the hart ID from mhartid on bootDamien Le Moal2019-11-181-0/+8
| | * | riscv: provide native clint access for M-modeChristoph Hellwig2019-11-185-3/+64
| | * | riscv: cleanup the default power off implementationChristoph Hellwig2019-11-133-2/+18
| | * | riscv: abstract out CSR names for supervisor vs machine modeChristoph Hellwig2019-11-0510-86/+91
| | * | riscv: enter WFI in default_power_off() if SBI does not shutdownChristoph Hellwig2019-11-051-1/+2
| * | | Merge branch 'next/isa-string' into for-nextPaul Walmsley2019-11-231-42/+3
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| | * | | RISC-V: Remove unsupported isa string info printAtish Patra2019-10-281-42/+3
| * | | | riscv: add support for SECCOMP and SECCOMP_FILTERDavid Abdurachmanov2019-10-292-2/+35
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