summaryrefslogtreecommitdiffstats
path: root/arch/riscv/kvm/vcpu.c (follow)
Commit message (Expand)AuthorAgeFilesLines
* RISC-V: KVM: make CY, TM, and IR counters accessible in VU modeMayuresh Chitale2022-02-021-0/+4
* kvm/riscv: rework guest entry logicMark Rutland2022-02-021-17/+27
* RISC-V: KVM: Add SBI HSM extension in KVMAtish Patra2022-01-061-0/+23
* KVM: RISC-V: Use common KVM implementation of MMU memory cachesSean Christopherson2022-01-061-2/+3
* Documentation: update vcpu-requests.rst referenceMauro Carvalho Chehab2021-11-171-1/+1
* RISC-V: KVM: remove unneeded semicolonran jianping2021-11-011-2/+2
* RISC-V: KVM: Factor-out FP virtualization into separate sourcesAnup Patel2021-10-311-172/+0
* RISC-V: KVM: Add SBI v0.1 supportAtish Patra2021-10-041-0/+9
* RISC-V: KVM: Implement ONE REG interface for FP registersAtish Patra2021-10-041-0/+104
* RISC-V: KVM: FP lazy save/restoreAtish Patra2021-10-041-0/+91
* RISC-V: KVM: Add timer functionalityAtish Patra2021-10-041-0/+14
* RISC-V: KVM: Implement VMID allocatorAnup Patel2021-10-041-0/+9
* RISC-V: KVM: Implement VCPU world-switchAnup Patel2021-10-041-2/+28
* RISC-V: KVM: Implement KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctlsAnup Patel2021-10-041-3/+238
* RISC-V: KVM: Implement VCPU interrupts and requests handlingAnup Patel2021-10-041-13/+171
* RISC-V: KVM: Implement VCPU create, init and destroy functionsAnup Patel2021-10-041-9/+46
* RISC-V: Add initial skeletal KVM supportAnup Patel2021-10-041-0/+314