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* Merge tag 'riscv/for-v5.5-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds2019-12-041-0/+32
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| * Merge branch 'next/misc2' into for-nextPaul Walmsley2019-11-231-0/+32
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| | * RISC-V: Add address map dumperYash Shah2019-11-231-0/+32
* | | Merge tag 'ioremap-5.5' of git://git.infradead.org/users/hch/ioremapLinus Torvalds2019-11-282-85/+1
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| * | riscv: use the generic ioremap codeChristoph Hellwig2019-11-112-85/+0
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* | Merge branch 'next/nommu' into for-nextPaul Walmsley2019-11-236-15/+41
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| * | riscv: add nommu supportChristoph Hellwig2019-11-184-4/+18
| * | riscv: implement remote sfence.i using IPIsChristoph Hellwig2019-11-131-6/+18
| * | riscv: abstract out CSR names for supervisor vs machine modeChristoph Hellwig2019-11-052-5/+5
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* | Merge branch 'next/misc' into for-nextPaul Walmsley2019-11-231-9/+4
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| * | riscv: Use PMD_SIZE to replace PTE_PARENT_SIZEZong Li2019-11-121-9/+4
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* | RISC-V: Issue a tlb page flush if possibleAtish Patra2019-10-291-1/+4
* | RISC-V: Issue a local tlbflush if possible.Atish Patra2019-10-291-2/+17
* | RISC-V: Do not invoke SBI call if cpumask is emptyAtish Patra2019-10-291-0/+3
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* riscv: add missing header file includesPaul Walmsley2019-10-281-0/+1
* riscv: mark some code and data as file-staticPaul Walmsley2019-10-281-1/+1
* riscv: init: merge split string literals in preprocessor directivePaul Walmsley2019-10-281-2/+1
* riscv: add prototypes for assembly language functions from head.SPaul Walmsley2019-10-282-0/+4
* riscv: Fix undefined reference to vmemmap_populate_basepagesKefeng Wang2019-10-231-1/+1
* riscv: Fix memblock reservation for device tree blobAlbert Ou2019-10-011-1/+11
* riscv: move the TLB flush logic out of lineChristoph Hellwig2019-09-052-0/+38
* riscv: cleanup riscv_cpuid_to_hartid_maskChristoph Hellwig2019-09-051-1/+0
* RISC-V: Implement sparsememLogan Gunthorpe2019-08-301-0/+10
* riscv: Using CSR numbers to access CSRsBin Meng2019-08-302-7/+2
* Merge tag 'riscv/for-v5.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds2019-07-184-68/+315
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| * RISC-V: Setup initial page tables in two stagesAnup Patel2019-07-091-52/+255
| * riscv: remove free_initrd_memChristoph Hellwig2019-07-041-5/+0
| * riscv: ccache: Remove unused variableYash Shah2019-07-041-4/+7
| * riscv: Introduce huge page support for 32/64bit kernelAlexandre Ghiti2019-07-042-0/+46
| * RISC-V: Fix memory reservation in setup_bootmem()Anup Patel2019-07-011-7/+7
* | Merge branch 'siginfo-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...Linus Torvalds2019-07-091-3/+3
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| * signal/riscv: Remove tsk parameter from do_trapEric W. Biederman2019-05-291-3/+3
* | riscv: mm: Fix code commentShihPo Hung2019-06-271-3/+0
* | Merge tag 'riscv-for-v5.2/fixes-rc6' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds2019-06-171-0/+13
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| * | riscv: mm: synchronize MMU after pte changeShihPo Hung2019-06-171-0/+13
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* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286Thomas Gleixner2019-06-053-27/+3
* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 120Thomas Gleixner2019-05-242-28/+2
* | treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner2019-05-211-0/+1
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* Merge tag 'riscv-for-linus-5.2-mw2' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds2019-05-195-6/+310
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| * riscv: fix locking violation in page fault handlerAndreas Schwab2019-05-171-1/+2
| * RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCsYash Shah2019-05-172-0/+176
| * riscv: move switch_mm to its own fileGary Guo2019-05-172-0/+70
| * riscv: move flush_icache_{all,mm} to cacheflush.cGary Guo2019-05-171-0/+61
| * RISC-V: Access CSRs using CSR numbersAnup Patel2019-05-171-5/+1
* | riscv: switch over to generic free_initmem()Mike Rapoport2019-05-141-5/+0
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* RISC-V: Fix Maximum Physical Memory 2GiB option for 64bit systemsAnup Patel2019-04-101-0/+8
* RISC-V: Always compile mm/init.c with cmodel=medany and notraceAnup Patel2019-03-272-0/+34
* RISC-V: Free-up initrd in free_initrd_mem()Anup Patel2019-02-211-1/+2
* RISC-V: Implement compile-time fixed mappingsAnup Patel2019-02-211-0/+34
* RISC-V: Move setup_vm() to mm/init.cAnup Patel2019-02-211-0/+49
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