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* bpf, riscv: Use compressed instructions in the rv64 JITLuke Nelson2020-07-211-134/+147
* bpf, riscv: Add encodings for compressed instructionsLuke Nelson2020-07-211-0/+452
* bpf, riscv: Modify JIT ctx to support compressed instructionsLuke Nelson2020-07-214-19/+44
* bpf, riscv: Optimize BPF_JSET BPF_K using andi on RV64Luke Nelson2020-05-061-8/+19
* bpf, riscv: Optimize BPF_JMP BPF_K when imm == 0 on RV64Luke Nelson2020-05-061-5/+10
* bpf, riscv: Optimize FROM_LE using verifier_zext on RV64Luke Nelson2020-05-061-6/+14
* bpf, riscv: Enable missing verifier_zext optimizations on RV64Luke Nelson2020-05-061-4/+4
* bpf, riscv: Fix stack layout of JITed code on RV32Luke Nelson2020-04-301-33/+65
* bpf, riscv: Fix tail call count off by one in RV32 BPF JITLuke Nelson2020-04-261-2/+3
* riscv, bpf: Fix offset range checking for auipc+jalr on RV64Luke Nelson2020-04-081-17/+32
* riscv, bpf: Add RV32G eBPF JITLuke Nelson2020-03-053-1/+1365
* riscv, bpf: Factor common RISC-V JIT codeLuke Nelson2020-03-054-601/+639
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-nextDavid S. Miller2019-12-271-238/+293
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| * riscv, bpf: Optimize callsBjörn Töpel2019-12-191-37/+64
| * riscv, bpf: Provide RISC-V specific JIT image alloc/freeBjörn Töpel2019-12-191-0/+13
| * riscv, bpf: Optimize BPF tail callsBjörn Töpel2019-12-191-6/+7
| * riscv, bpf: Add support for far jumps and exitsBjörn Töpel2019-12-191-20/+17
| * riscv, bpf: Add support for far branching when emitting tail callBjörn Töpel2019-12-191-19/+3
| * riscv, bpf: Add support for far branchingBjörn Töpel2019-12-191-164/+188
| * riscv, bpf: Fix broken BPF tail callsBjörn Töpel2019-12-191-2/+11
* | bpf, riscv: Limit to 33 tail callsPaul Chaignon2019-12-111-2/+2
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* bpf, riscv: Enable zext optimization for more RV64G ALU opsLuke Nelson2019-07-051-8/+8
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller2019-06-181-0/+24
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| * Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpfDavid S. Miller2019-06-071-0/+24
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| | * bpf, riscv: clear high 32 bits for ALU32 add/sub/neg/lsh/rsh/arshLuke Nelson2019-06-011-0/+18
| | * bpf, riscv: clear target register high 32-bits for and/or/xor on ALU32Björn Töpel2019-05-231-0/+6
* | | riscv: bpf: eliminate zero extension code-genJiong Wang2019-05-251-13/+30
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* / treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner2019-05-211-0/+1
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* bpf, riscv: add BPF JIT for RV64GBjörn Töpel2019-02-052-0/+1603