Commit message (Expand) | Author | Age | Files | Lines | |
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* | Merge tag 'riscv-for-linus-4.15-arch-v9-premerge' of git://git.kernel.org/pub... | Linus Torvalds | 2017-11-15 | 1 | -14/+0 |
* | RISC-V: Build Infrastructure | Palmer Dabbelt | 2017-09-27 | 9 | -0/+579 |
* | RISC-V: User-facing API | Palmer Dabbelt | 2017-09-27 | 27 | -0/+1687 |
* | RISC-V: Paging and MMU | Palmer Dabbelt | 2017-09-27 | 8 | -0/+1192 |
* | RISC-V: Device, timer, IRQs, and the SBI | Palmer Dabbelt | 2017-09-27 | 9 | -0/+566 |
* | RISC-V: Task implementation | Palmer Dabbelt | 2017-09-27 | 9 | -0/+1243 |
* | RISC-V: ELF and module implementation | Palmer Dabbelt | 2017-09-27 | 4 | -0/+187 |
* | RISC-V: Generic library routines and assembly | Palmer Dabbelt | 2017-09-27 | 11 | -0/+1389 |
* | RISC-V: Atomic and Locking Code | Palmer Dabbelt | 2017-09-27 | 10 | -0/+1423 |
* | RISC-V: Init and Halt Code | Palmer Dabbelt | 2017-09-27 | 15 | -0/+1524 |