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| * | | riscv: dts: microchip: mpfs: Drop empty chosen nodeGeert Uytterhoeven2022-01-091-3/+0
| * | | riscv: dts: canaan: Group tuples in interrupt propertiesGeert Uytterhoeven2022-01-091-11/+12
| * | | riscv: dts: canaan: Fix SPI FLASH node namesGeert Uytterhoeven2022-01-094-4/+4
| * | | riscv/mm: Enable THP migrationNanyong Sun2022-01-082-0/+6
| * | | riscv/mm: Adjust PAGE_PROT_NONE to comply with THP semanticsNanyong Sun2022-01-082-6/+7
| * | | riscv/head: fix misspelling of guaranteedhasheddan2022-01-071-1/+1
| * | | RISC-V: Clean up the defconfigsPalmer Dabbelt2022-01-066-17/+10
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| | * | | RISC-V: defconfigs: Remove redundant K210 DT sourcePalmer Dabbelt2022-01-062-2/+0
| | * | | RISC-V: defconfigs: Remove redundant CONFIG_EFI=yPalmer Dabbelt2022-01-061-1/+0
| | * | | RISC-V: defconfigs: Remove redundant CONFIG_POWER_RESETPalmer Dabbelt2022-01-062-2/+0
| | * | | RISC-V: defconfigs: Sort CONFIG_BLK_DEV_BSGPalmer Dabbelt2022-01-062-2/+0
| | * | | RISC-V: defconfigs: Sort CONFIG_SURFACE_PLATFORMSPalmer Dabbelt2022-01-062-2/+0
| | * | | RISC-V: defconfigs: Sort CONFIG_MMCPalmer Dabbelt2022-01-061-1/+1
| | * | | RISC-V: defconfigs: Sort CONFIG_PTP_1588_CLOCKPalmer Dabbelt2022-01-061-1/+1
| | * | | RISC-V: defconfigs: Sort CONFIG_SOC_POLARFIREPalmer Dabbelt2022-01-061-1/+1
| | * | | RISC-V: defconfigs: Sort CONFIG_SYSFS_SYSCALLPalmer Dabbelt2022-01-062-2/+2
| | * | | RISC-V: defconfigs: Sort CONFIG_BPF_SYSCALLPalmer Dabbelt2022-01-062-2/+2
| | * | | RISC-V: MAXPHYSMEM_2GB doesn't depend on CMODEL_MEDLOWPalmer Dabbelt2022-01-061-1/+1
| | * | | RISC-V: defconfigs: Set CONFIG_FB=y, for FB consolePalmer Dabbelt2022-01-062-0/+2
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| * | | riscv: mm: Enable PMD split page table lock for RV64Kefeng Wang2022-01-062-1/+3
| * | | riscv: Make vmalloc/vmemmap end equal to the start of the next regionAlexandre Ghiti2022-01-062-3/+3
| * | | riscv: switch to relative extable and other improvementsPalmer Dabbelt2022-01-0611-201/+290
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| | * | | riscv: vmlinux.lds.S|vmlinux-xip.lds.S: remove `.fixup` sectionJisheng Zhang2022-01-062-2/+0
| | * | | riscv: extable: add a dedicated uaccess handlerJisheng Zhang2022-01-064-70/+78
| | * | | riscv: add gpr-num.hJisheng Zhang2022-01-061-0/+77
| | * | | riscv: extable: add `type` and `data` fieldsJisheng Zhang2022-01-065-18/+56
| | * | | riscv: extable: consolidate definitionsJisheng Zhang2022-01-064-10/+37
| | * | | riscv: lib: uaccess: fold fixups into bodyJisheng Zhang2022-01-061-11/+11
| | * | | riscv: extable: use `ex` for `exception_table_entry`Jisheng Zhang2022-01-061-5/+5
| | * | | riscv: extable: make fixup_exception() return boolJisheng Zhang2022-01-063-10/+10
| | * | | riscv: bpf: move rv_bpf_fixup_exception signature to extable.hJisheng Zhang2022-01-063-8/+12
| | * | | riscv: switch to relative exception tablesJisheng Zhang2022-01-065-6/+30
| | * | | riscv: consolidate __ex_table constructionJisheng Zhang2022-01-062-27/+15
| | * | | riscv: remove unused __cmpxchg_user() macroJisheng Zhang2022-01-061-75/+0
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| * / / riscv: dts: enable more DA9063 functions for the SiFive HiFive UnmatchedAurelien Jarno2021-11-191-0/+12
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* | | Merge tag 'kbuild-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/mas...Linus Torvalds2022-01-191-3/+1
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| * | | kbuild: do not quote string values in include/config/auto.confMasahiro Yamada2022-01-081-3/+1
* | | | Merge branch 'signal-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds2022-01-172-2/+2
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| * | | | exit: Add and use make_task_dead.Eric W. Biederman2021-12-132-2/+2
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* | | | Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2022-01-1617-211/+690
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| * | | | KVM: RISC-V: Avoid spurious virtual interrupts after clearing hideleg CSRVincent Chen2022-01-061-0/+8
| * | | | RISC-V: KVM: Add VM capability to allow userspace get GPA bitsAnup Patel2022-01-063-0/+9
| * | | | RISC-V: KVM: Forward SBI experimental and vendor extensionsAnup Patel2022-01-062-0/+31
| * | | | RISC-V: KVM: make kvm_riscv_vcpu_fp_clean() staticJisheng Zhang2022-01-061-1/+1
| * | | | RISC-V: KVM: Add SBI HSM extension in KVMAtish Patra2022-01-065-0/+134
| * | | | RISC-V: KVM: Add v0.1 replacement SBI extensions defined in v0.2Atish Patra2022-01-063-0/+143
| * | | | RISC-V: KVM: Add SBI v0.2 base extensionAtish Patra2022-01-065-1/+85
| * | | | RISC-V: KVM: Reorganize SBI code by moving SBI v0.1 to its own fileAtish Patra2022-01-064-131/+146
| * | | | RISC-V: KVM: Mark the existing SBI implementation as v0.1Atish Patra2022-01-062-32/+144
| * | | | KVM: RISC-V: Use common KVM implementation of MMU memory cachesSean Christopherson2022-01-064-65/+18
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