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Merge tag 'dma-mapping-4.16' of git://git.infradead.org/users/hch/dma-mapping
Linus Torvalds
2018-01-31
3
-39
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+2
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dma-direct: rename dma_noop to dma_direct
Christoph Hellwig
2018-01-15
1
-1
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+1
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dma-mapping: provide a generic asm/dma-mapping.h
Christoph Hellwig
2018-01-15
2
-30
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+1
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riscv: remove the unused dma_capable helper
Christoph Hellwig
2018-01-09
1
-8
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+0
*
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Merge tag 'init_task-20180117' of git://git.kernel.org/pub/scm/linux/kernel/g...
Linus Torvalds
2018-01-29
1
-2
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+0
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Construct init thread stack in the linker script rather than by union
David Howells
2018-01-10
1
-2
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+0
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*
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riscv: rename SR_* constants to match the spec
Christoph Hellwig
2018-01-08
6
-17
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+17
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riscv: remove CONFIG_MMU ifdefs
Christoph Hellwig
2018-01-08
4
-24
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+0
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RISC-V: Make __NR_riscv_flush_icache visible to userspace
Palmer Dabbelt
2018-01-08
5
-30
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+27
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RISC-V: Add a basic defconfig
Karsten Merker
2018-01-08
1
-0
/
+75
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RISC-V: Remove unused CONFIG_HVC_RISCV_SBI code
Palmer Dabbelt
2017-12-11
1
-11
/
+0
*
RISC-V: Resurrect smp_mb__after_spinlock()
Palmer Dabbelt
2017-12-11
1
-0
/
+19
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RISC-V: Logical vs Bitwise typo
Dan Carpenter
2017-12-11
1
-1
/
+1
*
bpf: correct broken uapi for BPF_PROG_TYPE_PERF_EVENT program type
Hendrik Brueckner
2017-12-05
1
-0
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+1
*
RISC-V: Fixes for clean allmodconfig build
Palmer Dabbelt
2017-12-01
12
-21
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+39
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RISC-V: Add missing include
Olof Johansson
2017-11-30
1
-0
/
+1
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*
RISC-V: Use define for get_cycles like other architectures
Olof Johansson
2017-11-30
1
-1
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+2
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RISC-V: Provide stub of setup_profiling_timer()
Olof Johansson
2017-11-30
1
-0
/
+7
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*
RISC-V: Export some expected symbols for modules
Olof Johansson
2017-11-30
3
-0
/
+6
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RISC-V: move empty_zero_page definition to C and export it
Olof Johansson
2017-11-30
2
-3
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+3
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*
RISC-V: io.h: type fixes for warnings
Olof Johansson
2017-11-30
2
-8
/
+10
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*
RISC-V: use RISCV_{INT,SHORT} instead of {INT,SHORT} for asm macros
Olof Johansson
2017-11-30
2
-9
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+9
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*
RISC-V: use generic serial.h
Olof Johansson
2017-11-30
1
-0
/
+1
*
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RISC-V: __io_writes should respect the length argument
Palmer Dabbelt
2017-12-01
1
-1
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+1
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RISC-V: __io_writes should respect the length argument
Palmer Dabbelt
2017-12-01
1
-1
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+1
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RISC-V: User-Visible Changes
Palmer Dabbelt
2017-12-01
19
-34
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+392
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\
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*
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RISC-V: Clean up an unused include
Palmer Dabbelt
2017-11-30
1
-1
/
+0
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*
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RISC-V: Allow userspace to flush the instruction cache
Andrew Waterman
2017-11-30
8
-0
/
+105
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*
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RISC-V: Flush I$ when making a dirty page executable
Andrew Waterman
2017-11-30
8
-30
/
+174
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*
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RISC-V: Add VDSO entries for clock_get/gettimeofday/getcpu
Andrew Waterman
2017-11-27
6
-1
/
+113
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*
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RISC-V: Remove __vdso_cmpxchg{32,64} symbol versions
Palmer Dabbelt
2017-11-27
1
-2
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+0
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*
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RISC-V: remove spin_unlock_wait()
Palmer Dabbelt
2017-11-28
1
-9
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+0
*
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RISC-V: `sfence.vma` orderes the instruction cache
Palmer Dabbelt
2017-11-28
1
-1
/
+4
*
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RISC-V: Add READ_ONCE in arch_spin_is_locked()
Palmer Dabbelt
2017-11-28
1
-1
/
+1
*
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RISC-V: __test_and_op_bit_ord should be strongly ordered
Palmer Dabbelt
2017-11-28
1
-1
/
+1
*
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RISC-V: Remove smb_mb__{before,after}_spinlock()
Palmer Dabbelt
2017-11-28
1
-8
/
+0
*
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RISC-V: Remove __smp_bp__{before,after}_atomic
Palmer Dabbelt
2017-11-28
1
-15
/
+0
*
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RISC-V: Comment on why {,cmp}xchg is ordered how it is
Palmer Dabbelt
2017-11-28
1
-2
/
+7
*
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RISC-V: Remove unused arguments from ATOMIC_OP
Palmer Dabbelt
2017-11-28
1
-47
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+47
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/
*
Merge tag 'riscv-for-linus-4.15-arch-v9-premerge' of git://git.kernel.org/pub...
Linus Torvalds
2017-11-15
1
-14
/
+0
*
RISC-V: Build Infrastructure
Palmer Dabbelt
2017-09-27
9
-0
/
+579
*
RISC-V: User-facing API
Palmer Dabbelt
2017-09-27
27
-0
/
+1687
*
RISC-V: Paging and MMU
Palmer Dabbelt
2017-09-27
8
-0
/
+1192
*
RISC-V: Device, timer, IRQs, and the SBI
Palmer Dabbelt
2017-09-27
9
-0
/
+566
*
RISC-V: Task implementation
Palmer Dabbelt
2017-09-27
9
-0
/
+1243
*
RISC-V: ELF and module implementation
Palmer Dabbelt
2017-09-27
4
-0
/
+187
*
RISC-V: Generic library routines and assembly
Palmer Dabbelt
2017-09-27
11
-0
/
+1389
*
RISC-V: Atomic and Locking Code
Palmer Dabbelt
2017-09-27
10
-0
/
+1423
*
RISC-V: Init and Halt Code
Palmer Dabbelt
2017-09-27
15
-0
/
+1524