summaryrefslogtreecommitdiffstats
path: root/arch/riscv (follow)
Commit message (Expand)AuthorAgeFilesLines
* Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2022-04-233-22/+22
|\
| * KVM: Add helpers to wrap vcpu->srcu_idx and yell if it's abusedSean Christopherson2022-04-212-10/+10
| * KVM: RISC-V: Use kvm_vcpu.srcu_idx, drop RISC-V's unnecessary copySean Christopherson2022-04-213-13/+10
| * RISC-V: KVM: Restrict the extensions that can be disabledAtish Patra2022-04-201-7/+12
| * RISC-V: KVM: Remove 's' & 'u' as valid ISA extensionAtish Patra2022-04-201-3/+1
* | Merge tag 'riscv-for-linus-5.18-rc4' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds2022-04-222-1/+2
|\ \ | |/ |/|
| * RISC-V: cpuidle: fix Kconfig select for RISCV_SBI_CPUIDLERandy Dunlap2022-04-221-1/+1
| * RISC-V: mm: Fix set_satp_mode() for platform not having Sv57Anup Patel2022-04-221-0/+1
* | RISC-V: KVM: include missing hwcap.h into vcpu_fpHeiko Stuebner2022-04-091-0/+1
* | RISC-V: KVM: Don't clear hgatp CSR in kvm_arch_vcpu_put()Anup Patel2022-04-091-2/+0
|/
* Merge tag 'riscv-for-linus-5.18-mw1' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds2022-04-0128-47/+355
|\
| * RISC-V: K210 defconfigs: Drop redundant MEMBARRIER=nPalmer Dabbelt2022-04-013-3/+0
| * RISC-V: defconfig: Drop redundant SBI HVC and earlyconPalmer Dabbelt2022-04-012-4/+0
| * riscv: cpu.c: don't use kernel-doc markers for commentsRandy Dunlap2022-04-011-2/+2
| * RISC-V: Enable profiling by defaultAnup Patel2022-03-312-0/+2
| * RISC-V: module: fix apply_r_riscv_rcv_branch_rela typoWu Caize2022-03-311-2/+2
| * RISC-V: Declare per cpu boot data as staticAtish Patra2022-03-311-1/+1
| * RISC-V: Fix a comment typo in riscv_of_parent_hartid()Atish Patra2022-03-311-1/+1
| * riscv: Increase stack size under KASANDmitry Vyukov2022-03-311-2/+8
| * riscv: Fix fill_callchain return valueNikita Shubin2022-03-311-1/+1
| * riscv: dts: canaan: Fix SPI3 bus widthNiklas Cassel2022-03-314-0/+8
| * RISC-V CPU Idle SupportPalmer Dabbelt2022-03-3113-24/+322
| |\
| | * RISC-V: Enable RISC-V SBI CPU Idle driver for QEMU virt machineAnup Patel2022-03-103-0/+5
| | * RISC-V: Add SBI HSM suspend related definesAnup Patel2022-03-103-8/+25
| | * RISC-V: Add arch functions for non-retentive suspend entry/exitAnup Patel2022-03-107-21/+279
| | * RISC-V: Rename relocate() and make it globalAnup Patel2022-03-101-3/+4
| | * RISC-V: Enable CPU_IDLE driversAnup Patel2022-03-105-1/+35
| * | riscv: Rename "sp_in_global" to "current_stack_pointer"Kees Cook2022-03-313-4/+5
| * | riscv module: remove (NOLOAD)Fangrui Song2022-03-291-3/+3
* | | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2022-03-302-24/+24
|\ \ \
| | \ \
| | \ \
| *-. \ \ Merge branches 'clk-sifive' and 'clk-visconti' into clk-nextStephen Boyd2022-03-292-24/+24
| |\ \ \ \ | | | | |/ | | | |/|
| | * / | riscv: dts: Change the macro name of prci in each device nodeZong Li2022-03-152-24/+24
| | |/ /
* | | | Merge tag 'ptrace-cleanups-for-v5.18' of git://git.kernel.org/pub/scm/linux/k...Linus Torvalds2022-03-292-5/+4
|\ \ \ \
| * | | | resume_user_mode: Move to resume_user_mode.hEric W. Biederman2022-03-101-2/+2
| * | | | ptrace: Create ptrace_report_syscall_{entry,exit} in ptrace.hEric W. Biederman2022-03-101-3/+2
| | |/ / | |/| |
* | | | Merge tag 'char-misc-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds2022-03-281-0/+1
|\ \ \ \ | |_|_|/ |/| | |
| * | | parport_pc: Also enable driver for PCI systemsMaciej W. Rozycki2022-03-181-0/+1
* | | | Merge tag 'riscv-for-linus-5.18-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds2022-03-2524-762/+1458
|\ \ \ \
| * \ \ \ RISC-V: add support for restartable sequencesPalmer Dabbelt2022-03-233-0/+7
| |\ \ \ \
| | * | | | RISC-V: Add support for restartable sequenceVincent Chen2022-03-223-0/+7
| | | |/ / | | |/| |
| * | | | perf: RISC-V: Add support for SBI PMU and SscofpmfPalmer Dabbelt2022-03-229-572/+164
| |\ \ \ \
| | * | | | RISC-V: Add sscofpmf extension supportAtish Patra2022-03-214-1/+11
| | * | | | RISC-V: Add RISC-V SBI PMU extension definitionsAtish Patra2022-03-211-0/+95
| | * | | | RISC-V: Add CSR encodings for all HPMCOUNTERSAtish Patra2022-03-211-0/+58
| | * | | | RISC-V: Remove the current perf implementationAtish Patra2022-03-214-571/+0
| * | | | | RISC-V: Provide a fraemework for RISC-V ISA extensionsPalmer Dabbelt2022-03-173-23/+195
| |\| | | |
| | * | | | RISC-V: Improve /proc/cpuinfo output for ISA extensionsAtish Patra2022-03-172-2/+70
| | * | | | RISC-V: Do no continue isa string parsing without correct XLENAtish Patra2022-03-171-0/+5
| | * | | | RISC-V: Implement multi-letter ISA extension probing frameworkAtish Patra2022-03-172-6/+34
| | * | | | RISC-V: Extract multi-letter extension names from "riscv, isa"Tsukasa OI2022-03-171-8/+27