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* RISC-V: gp_in_global needs register keywordPalmer Dabbelt2020-05-211-1/+1
* riscv: Fix print_vm_layout build error if NOMMUKefeng Wang2020-05-211-1/+1
* riscv: mmiowb: Fix implicit declaration of function 'smp_processor_id'Kefeng Wang2020-05-141-0/+1
* riscv: pgtable: Fix __kernel_map_pages build error if NOMMUKefeng Wang2020-05-141-0/+2
* riscv: Make SYS_SUPPORTS_HUGETLBFS depends on MMUKefeng Wang2020-05-131-0/+1
* riscv: Disable ARCH_HAS_DEBUG_VIRTUAL if NOMMUKefeng Wang2020-05-131-1/+1
* riscv: Add pgprot_writecombine/device and PAGE_SHARED defination if NOMMUKefeng Wang2020-05-132-0/+3
* riscv: stacktrace: Fix undefined reference to `walk_stackframe'Kefeng Wang2020-05-131-1/+1
* riscv: Fix unmet direct dependencies built based on SOC_VIRTKefeng Wang2020-05-131-8/+9
* riscv: perf: RISCV_BASE_PMU should be independentKefeng Wang2020-05-132-7/+3
* riscv: perf_event: Make some funciton staticKefeng Wang2020-05-111-4/+4
* RISC-V: Remove unused code from STRICT_KERNEL_RWXAtish Patra2020-05-062-24/+0
* riscv: force __cpu_up_ variables to put in data sectionZong Li2020-05-051-2/+2
* riscv: add Linux note to vdsoAndreas Schwab2020-05-042-1/+13
* riscv: set max_pfn to the PFN of the last pageVincent Chen2020-05-041-1/+2
* RISC-V: Remove N-extension related definesAnup Patel2020-05-041-3/+0
* RISC-V: Add bitmap reprensenting ISA features common across CPUsAnup Patel2020-05-042-3/+102
* RISC-V: Export riscv_cpuid_to_hartid_mask() APIAnup Patel2020-05-041-0/+2
* Merge tag 'riscv-for-linus-5.7-rc4' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds2020-04-294-13/+16
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| * riscv: select ARCH_HAS_STRICT_KERNEL_RWX only if MMUDamien Le Moal2020-04-241-1/+1
| * riscv: sbi: Fix undefined reference to sbi_shutdownKefeng Wang2020-04-221-5/+8
| * riscv: sbi: Correct sbi_shutdown() and sbi_clear_ipi() exportKefeng Wang2020-04-221-2/+2
| * riscv: fix vdso build with lldIlie Halip2020-04-221-3/+3
| * RISC-V: stacktrace: Declare sp_in_global outside ifdefGuenter Roeck2020-04-211-2/+2
* | arch: split MODULE_ARCH_VERMAGIC definitions out to <asm/vermagic.h>Masahiro Yamada2020-04-232-2/+9
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* Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netLinus Torvalds2020-04-162-18/+33
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| * Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpfDavid S. Miller2020-04-102-18/+33
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| | * riscv, bpf: Fix offset range checking for auipc+jalr on RV64Luke Nelson2020-04-081-17/+32
| | * riscv, bpf: Remove BPF JIT for nommu buildsBjörn Töpel2020-04-031-1/+1
* | | mm/vma: define a default value for VM_DATA_DEFAULT_FLAGSAnshuman Khandual2020-04-111-2/+1
* | | Merge tag 'riscv-for-linus-5.7' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds2020-04-0948-294/+2806
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| * | riscv: create a loader.bin boot image for Kendryte SoCChristoph Hellwig2020-04-032-3/+6
| * | riscv: Kendryte K210 default configDamien Le Moal2020-04-031-0/+68
| * | riscv: Add Kendryte K210 device treeDamien Le Moal2020-04-034-0/+149
| * | riscv: Select required drivers for Kendryte SOCDamien Le Moal2020-04-031-0/+4
| * | riscv: Add Kendryte K210 SoC supportChristoph Hellwig2020-04-031-0/+30
| * | riscv: Add SOC early init supportDamien Le Moal2020-04-035-0/+59
| * | riscv: Unaligned load/store handling for M_MODEDamien Le Moal2020-04-033-4/+395
| * | RISC-V: Support cpu hotplugAtish Patra2020-03-317-2/+180
| * | RISC-V: Add supported for ordered booting method using HSMAtish Patra2020-03-316-3/+121
| * | RISC-V: Add SBI HSM extension definitionsAtish Patra2020-03-311-0/+14
| * | RISC-V: Export SBI error to linux error mapping functionAtish Patra2020-03-312-1/+4
| * | RISC-V: Add cpu_ops and modify default booting methodAtish Patra2020-03-315-21/+147
| * | RISC-V: Move relocate and few other functions out of __initAtish Patra2020-03-312-72/+86
| * | RISC-V: Implement new SBI v0.2 extensionsAtish Patra2020-03-313-4/+270
| * | RISC-V: Introduce a new config for SBI v0.1Atish Patra2020-03-313-23/+118
| * | RISC-V: Add SBI v0.2 extension definitionsAtish Patra2020-03-311-0/+21
| * | RISC-V: Add basic support for SBI v0.2Atish Patra2020-03-313-73/+314
| * | RISC-V: Mark existing SBI as 0.1 SBI.Atish Patra2020-03-311-19/+22
| * | riscv: Use macro definition instead of magic numberZong Li2020-03-261-1/+1
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