summaryrefslogtreecommitdiffstats
path: root/arch/x86/entry/entry_64.S (follow)
Commit message (Expand)AuthorAgeFilesLines
* x86/entry: Unbreak __irqentry_text_start/end magicThomas Gleixner2020-06-111-1/+10
* x86/entry: Remove DBn stacksPeter Zijlstra2020-06-111-17/+0
* x86/entry: Remove the TRACE_IRQS cruftThomas Gleixner2020-06-111-13/+0
* x86/entry: Move paranoid irq tracing out of ASM codeThomas Gleixner2020-06-111-13/+0
* x86/entry/64: Remove TRACE_IRQS_*_DEBUGThomas Gleixner2020-06-111-45/+3
* x86/entry/64: Remove IRQ stack switching ASMThomas Gleixner2020-06-111-96/+0
* x86/entry: Remove the apic/BUILD interrupt leftoversThomas Gleixner2020-06-111-143/+0
* x86/entry: Convert reschedule interrupt to IDTENTRY_SYSVEC_SIMPLEThomas Gleixner2020-06-111-4/+0
* x86/entry: Convert XEN hypercall vector to IDTENTRY_SYSVECThomas Gleixner2020-06-111-5/+0
* x86/entry: Convert various hypervisor vectors to IDTENTRY_SYSVECThomas Gleixner2020-06-111-17/+0
* x86/entry: Convert KVM vectors to IDTENTRY_SYSVEC*Thomas Gleixner2020-06-111-7/+0
* x86/entry: Convert various system vectorsThomas Gleixner2020-06-111-19/+0
* x86/entry: Convert SMP system vectors to IDTENTRY_SYSVECThomas Gleixner2020-06-111-7/+0
* x86/entry: Convert APIC interrupts to IDTENTRY_SYSVECThomas Gleixner2020-06-111-6/+0
* x86/entry: Provide IDTENTRY_SYSVECThomas Gleixner2020-06-111-0/+8
* x86/entry: Use idtentry for interruptsThomas Gleixner2020-06-111-28/+3
* x86/entry: Add IRQENTRY_IRQ macroThomas Gleixner2020-06-111-0/+14
* x86/irq: Convey vector as argument and not in ptregsThomas Gleixner2020-06-111-33/+7
* x86/entry/64: Remove error_exit()Thomas Gleixner2020-06-111-9/+0
* x86/entry: Change exit path of xen_failsafe_callbackThomas Gleixner2020-06-111-1/+1
* x86/entry: Remove the transition leftoversThomas Gleixner2020-06-111-22/+4
* x86/entry: Switch page fault exception to IDTENTRY_RAWThomas Gleixner2020-06-111-19/+0
* x86/entry/64: Simplify idtentry_bodyThomas Gleixner2020-06-111-2/+0
* x86/entry: Switch XEN/PV hypercall entry to IDTENTRYThomas Gleixner2020-06-111-14/+6
* x86/entry/64: Move do_softirq_own_stack() to CThomas Gleixner2020-06-111-13/+0
* x86/entry: Provide helpers for executing on the irqstackThomas Gleixner2020-06-111-0/+39
* x86/entry: Convert double fault exception to IDTENTRY_DFThomas Gleixner2020-06-111-9/+1
* x86/entry: Implement user mode C entry points for #DB and #MCEThomas Gleixner2020-06-111-1/+1
* x86/entry/64: Remove error code clearing from #DB and #MCE ASM stubThomas Gleixner2020-06-111-1/+0
* x86/entry: Convert Debug exception to IDTENTRY_DBThomas Gleixner2020-06-111-2/+0
* x86/entry: Convert NMI to IDTENTRY_NMIThomas Gleixner2020-06-111-8/+7
* x86/entry: Convert Machine Check to IDTENTRY_ISTThomas Gleixner2020-06-111-3/+0
* x86/entry: Convert INT3 exception to IDTENTRY_RAWThomas Gleixner2020-06-111-2/+0
* x86/entry: Convert SIMD coprocessor error exception to IDTENTRYThomas Gleixner2020-06-111-1/+0
* x86/entry: Convert Alignment check exception to IDTENTRYThomas Gleixner2020-06-111-1/+0
* x86/entry: Convert Coprocessor error exception to IDTENTRYThomas Gleixner2020-06-111-1/+0
* x86/entry: Convert Spurious interrupt bug exception to IDTENTRYThomas Gleixner2020-06-111-1/+0
* x86/entry: Convert General protection exception to IDTENTRYThomas Gleixner2020-06-111-2/+1
* x86/entry: Convert Stack segment exception to IDTENTRYThomas Gleixner2020-06-111-1/+0
* x86/entry: Convert Segment not present exception to IDTENTRYThomas Gleixner2020-06-111-1/+0
* x86/entry: Convert Invalid TSS exception to IDTENTRYThomas Gleixner2020-06-111-1/+0
* x86/entry: Convert Coprocessor segment overrun exception to IDTENTRYThomas Gleixner2020-06-111-1/+0
* x86/entry: Convert Device not available exception to IDTENTRYThomas Gleixner2020-06-111-1/+0
* x86/entry: Convert Invalid Opcode exception to IDTENTRYThomas Gleixner2020-06-111-1/+0
* x86/entry: Convert Bounds exception to IDTENTRYThomas Gleixner2020-06-111-1/+0
* x86/entry: Convert Overflow exception to IDTENTRYThomas Gleixner2020-06-111-1/+0
* x86/entry: Convert Divide Error to IDTENTRYThomas Gleixner2020-06-111-1/+0
* x86/idtentry: Provide macros to define/declare IDT entry pointsThomas Gleixner2020-06-111-0/+6
* x86/entry/64: Provide sane error entry/exitThomas Gleixner2020-06-111-3/+19
* x86/entry: Distangle idtentryThomas Gleixner2020-06-111-183/+220