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* perf/x86/rapl: Add support for Intel SPR platformZhang Rui2020-08-141-0/+20
* perf/x86/rapl: Support multiple RAPL unit quirksZhang Rui2020-08-141-9/+15
* perf/x86/rapl: Fix missing psys sysfs attributesZhang Rui2020-08-141-1/+1
* Merge tag 'x86-cleanups-2020-08-03' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds2020-08-041-4/+0
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| * Merge branch 'x86/urgent' into x86/cleanupsIngo Molnar2020-07-261-1/+1
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| * | x86/msr: Lift AMD family 0x15 power-specific MSRsBorislav Petkov2020-06-151-4/+0
* | | perf/x86/rapl: Add Hygon Fam18h RAPL supportPu Wen2020-07-281-1/+2
* | | x86/perf: Fix a typoHu Haowen2020-07-221-1/+1
* | | perf/x86/intel/lbr: Support XSAVES for arch LBR readKan Liang2020-07-083-1/+47
* | | perf/x86/intel/lbr: Support XSAVES/XRSTORS for LBR context switchKan Liang2020-07-082-5/+95
* | | perf/x86: Remove task_ctx_sizeKan Liang2020-07-082-2/+0
* | | perf/x86/intel/lbr: Create kmem_cache for the LBR context dataKan Liang2020-07-081-2/+19
* | | perf/x86/intel/lbr: Support Architectural LBRKan Liang2020-07-083-11/+253
* | | perf/x86/intel/lbr: Factor out intel_pmu_store_lbrKan Liang2020-07-081-26/+56
* | | perf/x86/intel/lbr: Factor out rdlbr_all() and wrlbr_all()Kan Liang2020-07-082-17/+51
* | | perf/x86/intel/lbr: Mark the {rd,wr}lbr_{to,from} wrappers __always_inlineKan Liang2020-07-081-4/+4
* | | perf/x86/intel/lbr: Unify the stored format of LBR informationKan Liang2020-07-083-17/+15
* | | perf/x86/intel/lbr: Support LBR_CTLKan Liang2020-07-082-3/+55
* | | perf/x86: Expose CPUID enumeration bits for arch LBRKan Liang2020-07-081-0/+13
* | | perf/x86/intel/lbr: Use dynamic data structure for task_ctxKan Liang2020-07-082-34/+32
* | | perf/x86/intel/lbr: Factor out a new struct for generic optimizationKan Liang2020-07-082-20/+28
* | | perf/x86/intel/lbr: Add the function pointers for LBR save and restoreKan Liang2020-07-083-30/+59
* | | perf/x86/intel/lbr: Add a function pointer for LBR readKan Liang2020-07-083-7/+13
* | | perf/x86/intel/lbr: Add a function pointer for LBR resetKan Liang2020-07-083-17/+27
* | | Merge branch 'perf/vlbr'Peter Zijlstra2020-07-025-56/+140
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| * | | perf/x86: Keep LBR records unchanged in host context for guest usageLike Xu2020-07-023-7/+33
| * | | perf/x86: Add constraint to create guest LBR event without hw counterLike Xu2020-07-024-0/+24
| * | | perf/x86/lbr: Add interface to get LBR informationLike Xu2020-07-021-0/+20
| * | | perf/x86/core: Refactor hw->idx checks and cleanupLike Xu2020-07-022-48/+62
| * | | perf/x86: Fix variable types for LBR registersWei Wang2020-07-021-2/+2
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| * | Merge tag 'perf-urgent-2020-06-28' of git://git.kernel.org/pub/scm/linux/kern...Linus Torvalds2020-06-281-1/+1
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| | * perf/x86/rapl: Fix RAPL config variable bugStephane Eranian2020-06-021-1/+1
* | | perf/x86/intel/uncore: Expose an Uncore unit to IIO PMON mappingRoman Sudarikov2020-06-152-0/+200
* | | perf/x86/intel/uncore: Wrap the max dies calculation into an accessorRoman Sudarikov2020-06-152-6/+10
* | | perf/x86/intel/uncore: Expose an Uncore unit to PMON mappingRoman Sudarikov2020-06-152-0/+20
* | | perf/x86/intel/uncore: Validate MMIO address before accessingKan Liang2020-06-153-0/+21
* | | perf/x86/intel/uncore: Record the size of mapped areaKan Liang2020-06-153-4/+21
* | | perf/x86/intel/uncore: Fix oops when counting IMC uncore events on some TGLKan Liang2020-06-151-1/+2
* | | perf/x86/intel/uncore: Add Comet Lake supportKan Liang2020-06-152-0/+68
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* | treewide: replace '---help---' in Kconfig files with 'help'Masahiro Yamada2020-06-131-4/+4
* | mmap locking API: convert mmap_sem commentsMichel Lespinasse2020-06-091-1/+1
* | mmap locking API: add mmap_assert_locked() and mmap_assert_write_locked()Michel Lespinasse2020-06-091-1/+1
* | Merge tag 'x86-mm-2020-06-05' of git://git.kernel.org/pub/scm/linux/kernel/gi...Linus Torvalds2020-06-051-8/+3
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| * x86/cr4: Sanitize CR4.PCE updateThomas Gleixner2020-04-241-8/+3
* | perf/x86/rapl: Add AMD Fam17h RAPL supportStephane Eranian2020-05-281-0/+18
* | perf/x86/rapl: Make perf_probe_msr() more robust and flexibleStephane Eranian2020-05-281-0/+13
* | perf/x86/rapl: Flip logic on default events visibilityStephane Eranian2020-05-281-0/+11
* | perf/x86/rapl: Refactor to share the RAPL code between Intel and AMD CPUsStephane Eranian2020-05-281-6/+23
* | perf/x86/rapl: Move RAPL support to common x86 codeStephane Eranian2020-05-284-8/+10
* | Merge tag 'v5.7-rc7' into perf/core, to pick up fixesIngo Molnar2020-05-281-0/+1
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