summaryrefslogtreecommitdiffstats
path: root/arch/x86/kernel/cpu/intel_cacheinfo.c (follow)
Commit message (Expand)AuthorAgeFilesLines
* Merge branch 'x86-cache-for-linus' of git://git.kernel.org/pub/scm/linux/kern...Linus Torvalds2016-12-221-0/+20
|\
| * x86/intel_cacheinfo: Enable cache id in cache infoFenghua Yu2016-10-261-0/+20
* | drivers: base: cacheinfo: fix x86 with CONFIG_OF enabledSudeep Holla2016-11-101-0/+2
|/
* Merge branch 'x86-asm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds2016-03-151-1/+1
|\
| * x86/cpufeature: Carve out X86_FEATURE_*Borislav Petkov2016-01-301-1/+1
* | x86/cpu: Convert printk(KERN_<LEVEL> ...) to pr_<level>(...)Chen Yucong2016-02-031-1/+1
|/
* x86/cpufeature: Remove unused and seldomly used cpu_has_xx macrosBorislav Petkov2015-12-191-3/+3
* perf/core, perf/x86: Change needlessly global functions and a variable to staticGeliang Tang2015-09-281-4/+4
* x86: Kill CONFIG_X86_HTBorislav Petkov2015-06-071-4/+4
* x86/cpu/cacheinfo: Fix cache_get_priv_group() for Intel processorsSudeep Holla2015-03-231-1/+1
* x86/cacheinfo: Move cacheinfo sysfs code to generic infrastructureSudeep Holla2015-03-091-517/+198
* x86: use %*pb[l] to print bitmaps including cpumasks and nodemasksTejun Heo2015-02-141-14/+12
* arch/x86: replace strict_strto callsDaniel Walter2014-08-091-2/+2
* x86, cpu: Fix cache topology for early P4-SMTPeter Zijlstra2014-07-231-0/+12
* x86, intel, cacheinfo: Fix CPU hotplug callback registrationSrivatsa S. Bhat2014-03-201-5/+8
* treewide: Fix common typo in "identify"Maxime Jayat2013-10-141-1/+1
* x86: delete __cpuinit usage from all x86 filesPaul Gortmaker2013-07-151-28/+27
* x86/intel/cacheinfo: Shut up last long-standing warningBorislav Petkov2013-06-201-27/+25
* Merge branch 'x86-debug-for-linus' of git://git.kernel.org/pub/scm/linux/kern...Linus Torvalds2013-02-201-1/+1
|\
| * x86: Convert a few mistaken __cpuinit annotations to __initJan Beulich2013-01-241-1/+1
* | x86/intel/cacheinfo: Shut up annoying warningBorislav Petkov2013-02-041-4/+3
|/
* x86, cacheinfo: Base cache sharing info on CPUID 0x8000001d on AMDAndreas Herrmann2012-11-131-14/+27
* x86, cacheinfo: Make use of CPUID 0x8000001d for cache information on AMDAndreas Herrmann2012-11-131-1/+5
* x86, cacheinfo: Determine number of cache leafs using CPUID 0x8000001d on AMDAndreas Herrmann2012-11-131-5/+23
* x86/cache_info: Use ARRAY_SIZE() in amd_l3_attrs()Dan Carpenter2012-10-041-1/+1
* x86/cache_info: Fix setup of l2/l3 idsShai Fultheim2012-05-071-2/+2
* x86, intel_cacheinfo: Fix error return code in amd_set_l3_disable_slot()Srivatsa S. Bhat2012-04-191-4/+4
* x86/amd: Fix L1i and L2 cache sharing information for AMD family 15h processorsAndreas Herrmann2012-02-091-8/+36
* cpu: convert 'cpu' and 'machinecheck' sysdev_class to a regular subsystemKay Sievers2011-12-211-13/+12
* x86: cache_info: Update calculation of AMD L3 cache indicesFrank Arnold2011-09-121-0/+6
* x86: cache_info: Kill the atomic allocation in amd_init_l3_cache()Thomas Gleixner2011-09-121-48/+26
* x86: cache_info: Kill the moronic shadow structThomas Gleixner2011-09-121-38/+22
* x86: cache_info: Remove bogus free of amd_l3_cache dataThomas Gleixner2011-09-121-1/+0
* x86, AMD, cacheinfo: Fix L3 cache index disable checksFrank Arnold2011-05-161-15/+4
* x86, AMD, cacheinfo: Fix fallout caused by max3 conversionBorislav Petkov2011-05-161-1/+0
* Merge branch 'x86-mm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds2011-03-161-15/+61
|\
| * x86, amd: Support L3 Cache Partitioning on AMD family 0x15 CPUsHans Rosenfeld2011-02-071-15/+61
* | x86: Move llc_shared_map out of cpu_infoYinghai Lu2011-01-261-2/+2
|/
* x86: Update CPU cache attributes table descriptorsDave Jones2011-01-201-0/+3
* Merge branch 'for-2.6.38' of git://git.kernel.org/pub/scm/linux/kernel/git/tj...Linus Torvalds2011-01-081-2/+2
|\
| * x86: Replace uses of current_cpu_data with this_cpu opsTejun Heo2010-12-301-2/+2
* | x86, cacheinfo: Cleanup L3 cache index disable supportHans Rosenfeld2010-11-181-84/+63
* | x86, amd-nb: Cleanup AMD northbridge caching codeHans Rosenfeld2010-11-181-3/+3
* | x86, amd-nb: Complete the rename of AMD NB and related codeHans Rosenfeld2010-11-181-3/+3
|/
* replace nested max/min macros with {max,min}3 macroHagen Paul Pfeifer2010-10-271-0/+1
* x86, k8: Rename k8.[ch] to amd_nb.[ch] and CONFIG_K8_NB to CONFIG_AMD_NBAndreas Herrmann2010-09-201-5/+5
* x86, k8-gart: Decouple handling of garts and northbridgesAndreas Herrmann2010-09-171-2/+2
* x86, cacheinfo: Fix dependency of AMD L3 CIDAndreas Herrmann2010-09-171-4/+4
* x86, cacheinfo: Carve out L3 cache slot accessorsBorislav Petkov2010-06-101-26/+82
* x86, cacheinfo: Disable index in all four subcachesBorislav Petkov2010-04-231-17/+43