| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | x86/cpu: Use common topology code for Centaur and Zhaoxin | Thomas Gleixner | 2024-02-15 | 1 | -4/+0 |
| * | x86/cpu: Remove pointless evaluation of x86_coreid_bits | Thomas Gleixner | 2023-10-10 | 1 | -14/+0 |
| * | x86/cpu: Reinitialize IA32_FEAT_CTL MSR on BSP during wakeup | Sean Christopherson | 2020-06-15 | 1 | -0/+1 |
| * | x86/cpu: Remove redundant cpu_detect_cache_sizes() call | Tony W Wang-oc | 2020-01-20 | 1 | -2/+0 |
| * | x86/cpu: Set synthetic VMX cpufeatures during init_ia32_feat_ctl() | Sean Christopherson | 2020-01-13 | 1 | -35/+0 |
| * | x86/zhaoxin: Use common IA32_FEAT_CTL MSR initialization | Sean Christopherson | 2020-01-13 | 1 | -0/+2 |
| * | x86/cpu: Create Zhaoxin processors architecture support file | Tony W Wang-oc | 2019-06-22 | 1 | -0/+167 |
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