| Commit message (Expand) | Author | Age | Files | Lines |
* | Merge tag 'x86-urgent-2020-08-15' of git://git.kernel.org/pub/scm/linux/kerne... | Linus Torvalds | 2020-08-15 | 1 | -2/+7 |
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| * | x86/tsr: Fix tsc frequency enumeration bug on Lightning Mountain SoC | Dilip Kota | 2020-08-07 | 1 | -2/+7 |
* | | locking/seqlock, headers: Untangle the spaghetti monster | Peter Zijlstra | 2020-08-06 | 1 | -0/+1 |
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* | Merge tag 'x86-timers-2020-03-30' of git://git.kernel.org/pub/scm/linux/kerne... | Linus Torvalds | 2020-03-31 | 1 | -16/+112 |
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| * | x86/tsc_msr: Make MSR derived TSC frequency more accurate | Hans de Goede | 2020-03-11 | 1 | -11/+86 |
| * | x86/tsc_msr: Fix MSR_FSB_FREQ mask for Cherry Trail devices | Hans de Goede | 2020-03-11 | 1 | -2/+15 |
| * | x86/tsc_msr: Use named struct initializers | Hans de Goede | 2020-03-11 | 1 | -10/+18 |
* | | x86/kernel: Convert to new CPU match macros | Thomas Gleixner | 2020-03-24 | 1 | -7/+7 |
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* | x86/cpu: Update init data for new Airmont CPU model | Rahul Tanwar | 2019-09-06 | 1 | -0/+5 |
* | x86/apic: Rename 'lapic_timer_frequency' to 'lapic_timer_period' | Daniel Drake | 2019-05-09 | 1 | -2/+2 |
* | x86/cpu: Sanitize FAM6_ATOM naming | Peter Zijlstra | 2018-10-02 | 1 | -5/+5 |
* | x86/platform/intel-mid: Remove custom TSC calibration | Andy Shevchenko | 2018-07-03 | 1 | -0/+5 |
* | x86/tsc: Use SPDX identifier and update Intel copyright | Andy Shevchenko | 2018-07-03 | 1 | -4/+3 |
* | x86/tsc: Convert to use x86_match_cpu() and INTEL_CPU_FAM6() | Andy Shevchenko | 2018-07-03 | 1 | -41/+42 |
* | x86/tsc: Add missing header to tsc_msr.c | Andy Shevchenko | 2018-07-03 | 1 | -0/+1 |
* | x86/tsc: Set TSC_KNOWN_FREQ and TSC_RELIABLE flags on Intel Atom SoCs | Bin Gao | 2016-11-18 | 1 | -0/+19 |
* | x86/tsc_msr: Remove irqoff around MSR-based TSC enumeration | Len Brown | 2016-07-11 | 1 | -1/+1 |
* | x86/tsc_msr: Add Airmont reference clock values | Len Brown | 2016-07-10 | 1 | -1/+4 |
* | x86/tsc_msr: Correct Silvermont reference clock values | Len Brown | 2016-07-10 | 1 | -3/+3 |
* | x86/tsc_msr: Update comments, expand definitions | Len Brown | 2016-07-10 | 1 | -26/+10 |
* | x86/tsc_msr: Remove debugging messages | Len Brown | 2016-07-10 | 1 | -16/+3 |
* | x86/tsc_msr: Identify Intel-specific code | Len Brown | 2016-07-10 | 1 | -0/+3 |
* | Revert "x86/tsc: Add missing Cherrytrail frequency to the table" | Len Brown | 2016-07-10 | 1 | -3/+0 |
* | x86/tsc: Add missing Cherrytrail frequency to the table | Jeremy Compostella | 2016-05-12 | 1 | -0/+3 |
* | x86/tsc: Read all ratio bits from MSR_PLATFORM_INFO | Chen Yu | 2016-05-06 | 1 | -1/+1 |
* | x86: tsc: Add missing Baytrail frequency to the table | Mika Westerberg | 2014-02-19 | 1 | -1/+1 |
* | x86, tsc: Fallback to normal calibration if fast MSR calibration fails | Thomas Gleixner | 2014-02-19 | 1 | -14/+14 |
* | x86, tsc, apic: Unbreak static (MSR) calibration when CONFIG_X86_LOCAL_APIC=n | H. Peter Anvin | 2014-01-16 | 1 | -0/+2 |
* | x86, tsc: Add static (MSR) TSC calibration on Intel Atom SoCs | Bin Gao | 2014-01-16 | 1 | -0/+125 |