| Commit message (Expand) | Author | Age | Files | Lines |
* | Merge tag 'libnvdimm-for-4.8' of git://git.kernel.org/pub/scm/linux/kernel/gi... | Linus Torvalds | 2016-07-29 | 1 | -1/+1 |
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| * | x86/insn: remove pcommit | Dan Williams | 2016-07-23 | 1 | -1/+1 |
* | | x86/insn: Add AVX-512 support to the instruction decoder | Adrian Hunter | 2016-07-21 | 1 | -92/+171 |
* | | x86/insn: perf tools: Fix vcvtph2ps instruction decoding | Adrian Hunter | 2016-07-20 | 1 | -1/+1 |
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* | x86/insn: perf tools: Add new xsave instructions | Adrian Hunter | 2015-09-04 | 1 | -0/+3 |
* | x86/insn: perf tools: Add new memory protection keys instructions | Adrian Hunter | 2015-09-04 | 1 | -1/+1 |
* | x86/insn: perf tools: Add new memory instructions | Adrian Hunter | 2015-09-04 | 1 | -2/+2 |
* | x86/insn: perf tools: Add new SHA instructions | Adrian Hunter | 2015-09-04 | 1 | -0/+7 |
* | x86/insn: perf tools: Pedantically tweak opcode map for MPX instructions | Adrian Hunter | 2015-09-04 | 1 | -2/+6 |
* | x86/asm/decoder: Explain CALLW discrepancy between Intel and AMD | Denys Vlasenko | 2015-02-18 | 1 | -0/+9 |
* | x86, mpx: Add MPX related opcodes to the x86 opcode map | Qiaowei Ren | 2014-01-17 | 1 | -2/+2 |
* | x86, insn: Add new opcodes as of June, 2013 | Masami Hiramatsu | 2013-08-06 | 1 | -18/+24 |
* | x86/decoder: Fix bsr/bsf/jmpe decoding with operand-size prefix | Masami Hiramatsu | 2012-06-06 | 1 | -4/+4 |
*-. | Merge branches 'sched-urgent-for-linus', 'perf-urgent-for-linus' and 'x86-urg... | Linus Torvalds | 2012-01-19 | 1 | -3/+5 |
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| | * | x86, opcode: ANDN and Group 17 in x86-opcode-map.txt | Ulrich Drepper | 2012-01-17 | 1 | -2/+2 |
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| * | x86/kprobes: Fix typo transferred from Intel manual | Ulrich Drepper | 2012-01-16 | 1 | -1/+3 |
* | | x86: Update instruction decoder to support new AVX formats | Masami Hiramatsu | 2011-12-05 | 1 | -273/+333 |
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* | x86: Add Intel FMA instructions to x86 opcode map | Masami Hiramatsu | 2009-10-29 | 1 | -1/+33 |
* | x86: AVX instruction set decoder support | Masami Hiramatsu | 2009-10-29 | 1 | -206/+225 |
* | x86: Add pclmulq to x86 opcode map | Masami Hiramatsu | 2009-10-29 | 1 | -0/+1 |
* | x86: Fix SSE opcode map bug | Masami Hiramatsu | 2009-10-29 | 1 | -5/+5 |
* | x86: Add AES opcodes to opcode map | Masami Hiramatsu | 2009-10-21 | 1 | -2/+8 |
* | x86: Add AMD prefetch and 3DNow! opcodes to opcode map | Masami Hiramatsu | 2009-10-17 | 1 | -3/+10 |
* | x86: Add MMX/SSE opcode groups to opcode map | Masami Hiramatsu | 2009-10-17 | 1 | -0/+10 |
* | x86: Add VIA processor instructions in opcodes decoder | Masami Hiramatsu | 2009-10-03 | 1 | -1/+7 |
* | x86: Add MMX support for instruction decoder | Masami Hiramatsu | 2009-09-11 | 1 | -107/+200 |
* | x86: Instruction decoder API | Masami Hiramatsu | 2009-08-27 | 1 | -0/+719 |