| Commit message (Collapse) | Author | Age | Files | Lines |
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Add the CPU identification needed by oprofile for Intel (r) Core (tm) 2
CPUs.
Signed-off-by: Benjamin LaHaise <benjamin.c.lahaise@intel.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: "Arun Sharma" <aruns@google.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc:
[POWERPC] Fix G5 DART (IOMMU) race causing occasional data corruption
[POWERPC] Fix MMIO ops to provide expected barrier behaviour
[POWERPC] Fix interrupt clearing in kdump shutdown sequence
[POWERPC] update prep_defconfig
[POWERPC] kdump: Support kernels having 64k page size.
[POWERPC] Implement PowerPC futex_atomic_cmpxchg_inatomic().
[POWERPC] Add new, missing argument to of_irq_map_raw() for 86xx.
[POWERPC] Update defconfigs
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It seems that the occasional data corruption observed with the tg3
driver wasn't due to missing barriers after all, but rather seems to
be due to the DART (= IOMMU) in the U4 northbridge reading stale
IOMMU table entries from memory due to a race. This fixes it by
making the CPU read the entry back from memory before using it.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
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This changes the writeX family of functions to have a sync instruction
before the MMIO store rather than after, because the generally expected
behaviour is that the device receiving the MMIO store can be guaranteed
to see the effects of any preceding writes to normal memory.
To preserve ordering between writeX and readX, and to preserve ordering
between preceding stores and the readX, the readX family of functions
have had an sync added before the load.
Although writeX followed by spin_unlock is not officially guaranteed
to keep the writeX inside the spin-locked region unless an mmiowb()
is used, there are currently drivers that depend on the previous
behaviour on powerpc, which was that the mmiowb wasn't actually required.
Therefore we have a per-cpu flag that is set by writeX, cleared by
__raw_spin_lock and mmiowb, and tested by __raw_spin_unlock. If it is
set, __raw_spin_unlock does a sync and clears it.
This changes both 32-bit and 64-bit readX/writeX. 32-bit already has a
sync in __raw_spin_unlock (since lwsync doesn't exist on 32-bit), and thus
doesn't need the per-cpu flag.
Tested on G5 (PPC970) and POWER5.
Signed-off-by: Paul Mackerras <paulus@samba.org>
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Call chip->eoi(irq) to clear any pending interrupt in case of kdump
shutdown sequence. chip->end(irq) does not serve this purpose.
Signed-off-by: Mohan Kumar M <mohan@in.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
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Update PReP defconfig, disable some drivers for hardware that is not
used on those systems; enable SL82C105 IDE driver for Powerstack.
Signed-off-by: Olaf Hering <olaf@aepfle.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
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Ben speaks; we follow.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
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Signed-off-by: Paul Mackerras <paulus@samba.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/viro/audit-current
* 'audit.b29' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/audit-current:
[PATCH] sparc64 audit syscall classes hookup
[PATCH] syscall class hookup for all normal targets
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... that should do it for all targets; the only remaining issues are
mips (currently treated as non-biarch) and handling of other OS
emulations (OSF/SunOS/Solaris/???). The latter would need to be
assigned new AUDIT_ARCH_... ABI numbers anyway...
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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Take default arch/*/kernel/audit.c to lib/, have those with special
needs (== biarch) define AUDIT_ARCH in their Kconfig.
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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sh64 wasn't providing a sensible pm_power_off(), add one,
and just wrap it to machine_power_off, which already does
the right thing.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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While we've been sorting out the toolchain fiasco, some of
the code has suffered a bit of bitrot. Building with GCC4
also brings up some more build warnings. Trivial fixes for
both issues.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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The original sh64 toolchains required that we tune the ISA
level accordingly to not have head.S/entry.S blow up. With
current toolchains, this is no longer the case, and the
syntax magically changed as well, causing all current
toolchains to die a horrible death.
Incidentally, code generation in other parts of the kernel
is now significantly complex enough that none of the older
toolchains make it very far these days, so there's not
even any point in preserving legacy compatability via
as-option.
This fixes a long-standing issue, as noted here:
http://lkml.org/lkml/2005/1/5/223
Though at the time the current toolchains were too broken
to make adjusting the tuning worthwhile.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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add support for AUDIT_PERM predicate
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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* master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] 3778/1: S3C24XX: remove changelogs from include/asm-arm/arch-s3c2410 [simtec]
[ARM] 3783/1: S3C2412: fix IRQ_EINT0 to IRQ_EINT3 handling
[ARM] 3779/1: S3C24XX: remove changelogs from include/asm-arm/arch-s3c2410 [left]
[ARM] 3777/1: S3C24XX: remove changelogs from include/asm-arm/arch-s3c2410 [regs-*.h]
[ARM] 3776/1: S3C24XX: remove changelogs from include/asm-arm/arch-s3c2410
[ARM] 3775/1: S3C24XX: do not add same sysdev_driver to two classes
[ARM] 3774/1: S3C24XX: SMDK2413 has two machine IDs
[ARM] 3773/1: Add the HWCAP_VFP bit for the ARM926 CPUs
[ARM] 3772/1: Fix compilation error in mach-ixp4xx/nslu2*
[ARM] 3767/1: S3C24XX: remove changelog comments from arch/arm/mach-s3c2410
[ARM] 3766/1: Fix typo in ARM _raw_read_trylock
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Patch from Ben Dooks
The IRQ_EINT0 through IRQ_EINT3 handling has changed
on the S3C2412 from the previous SoCs in the range,
and thus we need to add code to handle this.
The changes come about due to these IRQs being
displayed in two different registers, and needing to
be acked and masked in both.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Patch from Ben Dooks
The s3c244x-irq.c code makes the mistake of adding
the same drive to two different sys-classes. This
causes the class lists to become corrupted and the
suspend code to OOPS.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Patch from Ben Dooks
It turns out we have both SMDK2413 and S3C2413 for
the same board.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Patch from Catalin Marinas
The ARM926EJ-S CPU has the VFP coprocessor and therefore it should be shown
in the /proc/cpuinfo if CONFIG_VFP is enabled.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Patch from Martin Michlmayr
Include linux/irq.h in the nslu2 code in order to avoid the following
compiler error:
CC arch/arm/mach-ixp4xx/nslu2-power.o
arch/arm/mach-ixp4xx/nslu2-power.c: In function 'nslu2_power_init':
arch/arm/mach-ixp4xx/nslu2-power.c:53: warning: implicit declaration of function 'set_irq_type'
arch/arm/mach-ixp4xx/nslu2-power.c:53: error: 'IRQ_TYPE_LEVEL_LOW' undeclared (first use in this function)
arch/arm/mach-ixp4xx/nslu2-power.c:53: error: (Each undeclared identifier is reported only once
arch/arm/mach-ixp4xx/nslu2-power.c:53: error: for each function it appears in.)
arch/arm/mach-ixp4xx/nslu2-power.c:54: error: 'IRQ_TYPE_LEVEL_HIGH' undeclared (first use in this function)
make[5]: *** [arch/arm/mach-ixp4xx/nslu2-power.o] Error 1
Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Patch from Ben Dooks
Remove the pointless changelog comments from
arch/arm/mach-s3c2410 files, as all this can
be found from the revision control system.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The sn_cpu_init() is required for cpu initialization on SN platforms.
Change __init to __cpuinit so that the function is not freed with init code/data.
Signed-off-by: Jack Steiner <steiner@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
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The SN PROM uses the register stack in the slave loop. The contents
must be preserved for the OS to return to the slave loop via offlining
a cpu or for kexec. A 'flushrs" is needed to force the stack to be written
to memory prior to changing bspstore.
Signed-off-by: Jack Steiner <steiner@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
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The syscalls set/get_robust_list must not be wired up until
futex_atomic_cmpxchg_inatomic is implemented. Otherwise the kernel will
hang in handle_futex_death.
Signed-off-by: Andreas Schwab <schwab@suse.de>
Signed-off-by: Tony Luck <tony.luck@intel.com>
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Fix a bug in sys_perfmonctl() whereby it was not correctly
decrementing the file descriptor reference count.
Signed-off-by: stephane eranian <eranian@hpl.hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
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This prevents cross-region mappings on IA64 and SPARC which could lead
to system crash. They were correctly trapped for normal mmap() calls,
but not for the kernel internal calls generated by executable loading.
This code just moves the architecture-specific cross-region checks into
an arch-specific "arch_mmap_check()" macro, and defines that for the
architectures that needed it (ia64, sparc and sparc64).
Architectures that don't have any special requirements can just ignore
the new cross-region check, since the mmap() code will just notice on
its own when the macro isn't defined.
Signed-off-by: Pavel Emelianov <xemul@openvz.org>
Signed-off-by: Kirill Korotaev <dev@openvz.org>
Acked-by: David Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
[ Cleaned up to not affect architectures that don't need it ]
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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Use the generic time stuff for FRV.
Signed-off-by: John Stultz <johnstul@us.ibm.com>
Signed-Off-By: David Howells <dhowells@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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New sparse caught that typo which could have caused erratic hardware
behaviour on some machines if the platform functions are used by the
firmware to change bits in some FCR registers.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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* master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] 3762/1: Fix ptrace cache coherency bug for ARM1136 VIPT nonaliasing Harvard caches
[ARM] 3765/1: S3C24XX: cleanup include/asm-arm/arch-s3c2410/dma.h
[ARM] 3764/1: S3C24XX: change type naming to kernel style
[ARM] 3763/1: add both rtcs to csb337 defconfig
[ARM] Fix ARM __raw_read_trylock() implementation
[ARM] 3750/3: Fix double VFP emulation for EABI kernels
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Harvard caches
Patch from George G. Davis
Resolve ARM1136 VIPT non-aliasing cache coherency issues observed when
using ptrace to set breakpoints and cleanup copy_{to,from}_user_page()
while we're here as requested by Russell King because "it's also far
too heavy on non-v6 CPUs".
NOTES:
1. Only access_process_vm() calls copy_{to,from}_user_page().
2. access_process_vm() calls get_user_pages() to pin down the "page".
3. get_user_pages() calls flush_dcache_page(page) which ensures cache
coherency between kernel and userspace mappings of "page". However
flush_dcache_page(page) may not invalidate I-Cache over this range
for all cases, specifically, I-Cache is not invalidated for the VIPT
non-aliasing case. So memory is consistent between kernel and user
space mappings of "page" but I-Cache may still be hot over this
range. IOW, we don't have to worry about flush_cache_page() before
memcpy().
4. Now, for the copy_to_user_page() case, after memcpy(), we must flush
the caches so memory is consistent with kernel cache entries and
invalidate the I-Cache if this mm region is executable. We don't
need to do anything after memcpy() for the copy_from_user_page()
case since kernel cache entries will be invalidated via the same
process above if we access "page" again. The flush_ptrace_access()
function (borrowed from SPARC64 implementation) is added to handle
cache flushing after memcpy() for the copy_to_user_page() case.
Signed-off-by: George G. Davis <gdavis@mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Patch from Ben Dooks
The type naming in the s3c24xx dma code is riddled with
typedefs creating _t types, from the code import from 2.4
which is contrary to the current Kernel coding style.
This patch cleans this up, removing the typedefs and
and fixing up the resultant code changes.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Patch from David Brownell
This adds RTC support to the csb337 default config. Both the AT91
and the ds1307 RTCs are enabled (rtc0 and rtc1 respectively).
The ds1307 is used to initialize the system time, since it's battery-backed.
From then on the AT91 RTC is used, since it's more capable (with both
alarm and update irqs, and system wakeup capability) even though it
needs manual initialization (symlink /dev/rtc to /dev/rtc0 for older
versions of hwclock, then "hwclock --systohc") in an rc script or
from inittab.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Patch from Daniel Jacobowitz
vfp_put_double didn't work in a CONFIG_AEABI kernel. By swapping
the arguments, we arrange for them to be in the same place regardless
of ABI. I made the same change to vfp_put_float for consistency.
Signed-off-by: Daniel Jacobowitz <dan@codesourcery.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The port to genirq & the new powerpc interrupt model in 2.6.18 introduced a
bug in the legacy PowerMac PIC code (used on older machines) because of a
typo potentially causing hangs due to interrupt storms. This fixes it,
along with a performance issue causing us to do spurrious retriggers after
masking an interrupt.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: "Antonino A. Daplas" <adaplas@pol.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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We're testing the wrong task_struct field.
Acked-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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Apparently some systems export valid HPET addresses, but hpet_enable()
fails. Then when the HPET clocksource starts up, it only checks for a
valid HPET address, and the result is a system where time does not advance.
See http://bugme.osdl.org/show_bug.cgi?id=7062 for details.
This patch just makes sure we better check that the HPET is functional
before registering the HPET clocksource.
Signed-off-by: John Stultz <johnstul@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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* 'for-linus' of git://git390.osdl.marist.edu/pub/scm/linux-2.6:
[S390] cio: unsolicited interrupts during sense pgid.
[S390] cio: no path after machine check.
[S390] cio: kernel stack overflow.
[S390] dasd: fix device shutdown process.
[S390] broken copy_in_user function.
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The copy_in_user primitive does not work as advertised. If the source
and target area are available copy_in_user copies one byte too much.
If one of the memory areas is not available it does not copy as much
data as it can, but up to 257 bytes less.
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc:
[POWERPC] Fix return value from memcpy
[POWERPC] iseries: Define insw et al. so libata/ide will compile
[POWERPC] Fix irq enable/disable in smp_generic_take_timebase
[POWERPC] Fix problem with time not advancing on 32-bit platforms
[POWERPC] Restore copyright notice in arch/powerpc/kernel/fpu.S
[POWERPC] Fix up ibm_architecture_vec definition
[POWERPC] Make OF irq map code detect more error cases
[POWERPC] Support for "weird" MPICs and fixup mpc7448_hpc2
[POWERPC] Fix MPIC sense codes in documentation
[POWERPC] Fix performance regression in IRQ radix tree locking
[POWERPC] Add mpc7448hpc2 device tree source file
[POWERPC] Add MPC8349E MDS device tree source file to arch/powerpc/boot/dts
[POWERPC] modify mpc83xx platforms to use new IRQ layer
[POWERPC] Adapt ipic driver to new host_ops interface, add set_irq_type to set IRQ sense
[POWERPC] back up old school ipic.[hc] to arch/ppc
[POWERPC] Use mpc8641hpcn PIC base address from dev tree.
[POWERPC] Allow MPC8641 HPCN to build with CONFIG_PCI disabled too.
[POWERPC] Fix powerpc 44x_mmu build
[POWERPC] Remove flush_dcache_all export
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As pointed out by Herbert Xu <herbert@gondor.apana.org.au>, our
memcpy implementation didn't return the destination pointer as its
return value, and there is code in the kernel that expects that.
This fixes it.
Signed-off-by: Paul Mackerras <paulus@samba.org>
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Eran Ben-Avi <eranpublic@yahoo.com> pointed out that the arch/ppc version
of smp_generic_take_timebase disables interrupts on entry but exits without
restoring them. However, both it and the arch/powerpc version have another
problem, which is that they use local_irq_disable/enable rather than
local_irq_save/restore, and they are called with interrupts disabled.
This fixes both problems; it changes a return to a break in the arch/ppc
version, and changes both versions to use local_irq_save/restore.
Signed-off-by: Paul Mackerras <paulus@samba.org>
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This fixes a problem introduced in 5db9fa9593e2ff69f2b95f9d59229dc4faaa564d.
The last_jiffy per-cpu variable is only 32 bits on 32-bit machines, but it
was being compared with a 64-bit quantity (tb_next_jiffy), which resulted in
time not advancing.
This fixes it by changing last_jiffy to be 64 bits on all platforms. With
this, we no longer need tb_last_stamp as a 32-bit version of tb_last_jiffy,
so this gets rid of tb_last_stamp and we just use tb_last_jiffy instead.
This also fixes a bug when the boot cpu is not online, because using
tb_last_stamp could have caused the wrong timebase origin value to be used
when calculating the time of day.
Signed-off-by: Paul Mackerras <paulus@samba.org>
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This code got moved from head.S but the copyright notice on head.S didn't
get transferred with it. Noticed by Cort Dougan <cort@fsmlabs.com>.
Signed-off-by: Paul Mackerras <paulus@samba.org>
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This problem was noticed by one of the Phyp firmware folks.
Our ibm,client-architecture-support call was failing.
This corrects the vector length parameters being passed in.
Signed-off-by: Will Schmidt <will_schmidt@vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
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Device-tree bugs on js20 with some versions of SLOF were causing the
interrupt for IDE to not be parsed correctly and fail to boot. This
patch adds a bit more sanity checking to the parser to detect some of
those errors and fail instead of returning bogus information. The
powerpc PCI code can then trigger a fallback that works on those
machines.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
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This adds a new hardware information table for mpic. This enables
the mpic code to deal with mpic controllers with different register
layouts and hardware behaviours.
This introduces CONFIG_MPIC_WEIRD. For boards with non standard mpic
controllers, select CONFIG_MPIC_WEIRD and add its hardware information
in the mpic_infos[] array.
TSI108/109 PIC takes the first index of weird hardware information
table. :) The table can be extended. The Tsi108/109 PIC looks like
standard OpenPIC but, in fact, is different in register mapping and
behavior.
The patch does not affect the behavior of standard mpic. If
CONFIG_MPIC_WEIRD is not defined, the code is essentially identical to
the current code.
[benh@kernel.crashing.org:
This patch is a slightly cleaned up version of Zang Roy's support for
the TSI108 MPIC variant. It also fixes up MPC7448_hpc2 to use the new
version of the type macros and changes the way MPIC is selected in
Kconfig to better match what is done for other system devices.
]
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
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When reworking the powerpc irq code, I figured out that we were using
the radix tree in a racy way. As a temporary fix, I put a spinlock in
there. However, this can have a significant impact on performances. This
patch reworks that to use a smarter technique based on the fact that
what we need is in fact a rwlock with extremely rare writers (thus
optimized for the read path).
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
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