| Commit message (Collapse) | Author | Age | Files | Lines |
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master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
Conflicts:
drivers/net/wireless/p54/p54common.c
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master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6
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The init_phy() function attaches to the PHY, then configures the
SerDes<->TBI link (in SGMII mode). The TBI is on the MDIO bus with the PHY
(sort of) and is accessed via the gianfar's MDIO registers, using the
functions gfar_local_mdio_read/write(), which don't do any locking.
The previously attached PHY will start a work-queue on a timer, and
probably an irq handler as well, which will talk to the PHY and thus use
the MDIO bus. This uses phy_read/write(), which have locking, but not
against the gfar_local_mdio versions.
The result is that PHY code will try to use the MDIO bus at the same time
as the SerDes setup code, corrupting the transfers.
Setting up the SerDes before attaching to the PHY will insure that there is
no race between the SerDes code and *our* PHY, but doesn't fix everything.
Typically the PHYs for all gianfar devices are on the same MDIO bus, which
is associated with the first gianfar device. This means that the first
gianfar's SerDes code could corrupt the MDIO transfers for a different
gianfar's PHY.
The lock used by phy_read/write() is contained in the mii_bus structure,
which is pointed to by the PHY. This is difficult to access from the
gianfar drivers, as there is no link between a gianfar device and the
mii_bus which shares the same MDIO registers. As far as the device layer
and drivers are concerned they are two unrelated devices (which happen to
share registers).
Generally all gianfar devices' PHYs will be on the bus associated with the
first gianfar. But this might not be the case, so simply locking the
gianfar's PHY's mii bus might not lock the mii bus that the SerDes setup
code is going to use.
We solve this by having the code that creates the gianfar platform device
look in the device tree for an mdio device that shares the gianfar's
registers. If one is found the ID of its platform device is saved in the
gianfar's platform data.
A new function in the gianfar mii code, gfar_get_miibus(), can use the bus
ID to search through the platform devices for a gianfar_mdio device with
the right ID. The platform device's driver data is the mii_bus structure,
which the SerDes setup code can use to lock the current bus.
Signed-off-by: Trent Piepho <tpiepho@freescale.com>
CC: Andy Fleming <afleming@freescale.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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* git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux-2.6-for-linus:
lguest: fix irq vectors.
lguest: fix early_ioremap.
lguest: fix example launcher compile after moved asm-x86 dir.
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do_IRQ: cannot handle IRQ -1 vector 0x20 cpu 0
------------[ cut here ]------------
kernel BUG at arch/x86/kernel/irq_32.c:219!
We're not ISA: we have a 1:1 mapping from vectors to irqs.
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
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dmi_scan_machine breaks under lguest:
lguest: unhandled trap 14 at 0xc04edeae (0xffa00000)
This is because we use current_cr3 for the read_cr3() paravirt
function, and it isn't set until the first cr3 change. We got away
with it until this happened.
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
x86: cpu_index build fix
x86/voyager: fix missing cpu_index initialisation
x86/voyager: fix compile breakage caused by dc1e35c6e95e8923cf1d3510438b63c600fee1e2
x86: fix /dev/mem mmap breakage when PAT is disabled
x86/voyager: fix compile breakage casued by x86: move prefill_possible_map calling early
x86: use CONFIG_X86_SMP instead of CONFIG_SMP
x86/voyager: fix boot breakage caused by x86: boot secondary cpus through initial_code
x86, uv: fix compile error in uv_hub.h
i386/PAE: fix pud_page()
x86: remove debug code from arch_add_memory()
x86: start annotating early ioremap pointers with __iomem
x86: two trivial sparse annotations
x86: fix init_memory_mapping for [dc000000 - e0000000) - v2
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fix:
arch/x86/kernel/cpu/common.c: In function 'early_identify_cpu':
arch/x86/kernel/cpu/common.c:553: error: 'struct cpuinfo_x86' has no member named 'cpu_index'
as cpu_index is only available on SMP.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Impact: fix /proc/cpuinfo output on x86/Voyager
Ever since
| commit 92cb7612aee39642d109b8d935ad265e602c0563
| Author: Mike Travis <travis@sgi.com>
| Date: Fri Oct 19 20:35:04 2007 +0200
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| x86: convert cpuinfo_x86 array to a per_cpu array
We've had an extra field in cpuinfo_x86 which is cpu_index.
Unfortunately, voyager has never initialised this, although the only
noticeable impact seems to be that /proc/cpuinfo shows all zeros for
the processor ids.
Anyway, fix this by initialising the boot CPU properly and setting the
index when the secondaries update.
Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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dc1e35c6e95e8923cf1d3510438b63c600fee1e2
Impact: build fix on x86/Voyager
Given commits like this:
| Author: Suresh Siddha <suresh.b.siddha@intel.com>
| Date: Tue Jul 29 10:29:19 2008 -0700
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| x86, xsave: enable xsave/xrstor on cpus with xsave support
Which deliberately expose boot cpu dependence to pieces of the system,
I think it's time to explicitly have a variable for it to prevent this
continual misassumption that the boot CPU is zero.
Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Impact: allow /dev/mem mmaps on non-PAT CPUs/platforms
Fix mmap to /dev/mem when CONFIG_X86_PAT is off and CONFIG_STRICT_DEVMEM is
off
mmap to /dev/mem on kernel memory has been failing since the
introduction of PAT (CONFIG_STRICT_DEVMEM=n case). Seems like
the check to avoid cache aliasing with PAT is kicking in even
when PAT is disabled. The bug seems to have crept in 2.6.26.
This patch makes sure that the mmap to regular
kernel memory succeeds if CONFIG_STRICT_DEVMEM=n and
PAT is disabled, and the checks to avoid cache aliasing
still happens if PAT is enabled.
Signed-off-by: Ravikiran Thirumalai <kiran@scalex86.org>
Tested-by: Tim Sirianni <tim@scalemp.com>
Cc: <stable@kernel.org>
Acked-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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calling early
Impact: fix build failure on x86/Voyager
Before:
| commit 329513a35d1a2b6b28d54f5c2c0dde4face8200b
| Author: Yinghai Lu <yhlu.kernel@gmail.com>
| Date: Wed Jul 2 18:54:40 2008 -0700
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| x86: move prefill_possible_map calling early
prefill_possible_mask() was hidden under CONFIG_HOTPLUG_CPU rendering
it invisitble to voyager. Since this commit it's exposed, but not
provided by the voyager subarch, so add a dummy stub to fix the link
breakage.
Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Cc: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Impact: fix x86/Voyager boot
CONFIG_SMP is used for features which work on *all* x86 boxes.
CONFIG_X86_SMP is used for standard PC like x86 boxes (for things like
multi core and apics)
Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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initial_code
Impact: boot up secondary CPUs as well on x86/Voyager systems
This commit:
| commit 3e9704739daf46a8ba6593d749c67b5f7cd633d2
| Author: Glauber Costa <gcosta@redhat.com>
| Date: Wed May 28 13:01:54 2008 -0300
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| x86: boot secondary cpus through initial_code
removed the use of initialize_secondary. However, it didn't update
voyager, so the secondary cpus no longer boot. Fix this by adding the
initial_code switch to voyager as well.
Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Cc: Glauber Costa <gcosta@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Impact: include file dependency cleanup
Fix compile errors of files that include asm/uv/uv_hub.h but do
not include linux/timer.h.
[ such files are not mainline right now. ]
Signed-of-by: Mike Travis <travis@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Impact: cleanup
To the unsuspecting user it is quite annoying that this broken and
inconsistent with x86-64 definition still exists.
Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Impact: remove incorrect WARN_ON(1)
Gets rid of dmesg spam created during physical memory hot-add which
will very likely confuse users. The change removes what appears to
be debugging code which I assume was unintentionally included in:
x86: arch/x86/mm/init_64.c printk fixes
commit 10f22dde556d1ed41d55355d1fb8ad495f9810c8
Signed-off-by: Gary Hade <garyhade@us.ibm.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Impact: some new sparse warnings in e820.c etc, but no functional change.
As with regular ioremap, iounmap etc, annotate with __iomem.
Fixes the following sparse warnings, will produce some new ones
elsewhere in arch/x86 that will get worked out over time.
arch/x86/mm/ioremap.c:402:9: warning: cast removes address space of expression
arch/x86/mm/ioremap.c:406:10: warning: cast adds address space to expression (<asn:2>)
arch/x86/mm/ioremap.c:782:19: warning: Using plain integer as NULL pointer
Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Impact: fewer sparse warnings, no functional changes
arch/x86/kernel/vsmp_64.c:87:14: warning: incorrect type in argument 1 (different address spaces)
arch/x86/kernel/vsmp_64.c:87:14: expected void const volatile [noderef] <asn:2>*addr
arch/x86/kernel/vsmp_64.c:87:14: got void *[assigned] address
arch/x86/kernel/vsmp_64.c:88:22: warning: incorrect type in argument 1 (different address spaces)
arch/x86/kernel/vsmp_64.c:88:22: expected void const volatile [noderef] <asn:2>*addr
arch/x86/kernel/vsmp_64.c:88:22: got void *
arch/x86/kernel/vsmp_64.c:100:23: warning: incorrect type in argument 2 (different address spaces)
arch/x86/kernel/vsmp_64.c:100:23: expected void volatile [noderef] <asn:2>*addr
arch/x86/kernel/vsmp_64.c:100:23: got void *
arch/x86/kernel/vsmp_64.c:101:23: warning: incorrect type in argument 1 (different address spaces)
arch/x86/kernel/vsmp_64.c:101:23: expected void const volatile [noderef] <asn:2>*addr
arch/x86/kernel/vsmp_64.c:101:23: got void *
arch/x86/mm/gup.c:235:6: warning: incorrect type in argument 1 (different base types)
arch/x86/mm/gup.c:235:6: expected void const volatile [noderef] <asn:1>*<noident>
arch/x86/mm/gup.c:235:6: got unsigned long [unsigned] [assigned] start
Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Impact: change over-mapping to precise mapping, fix /proc/meminfo output
v2: fix less than 1G ram system handling
when gart aperture is 0xdc000000 - 0xe0000000
it return 0xc0000000 - 0xe0000000
that is not right.
this patch fix that will get exact mapping
on 256g sytem with that aperture after patch
LBSuse:~ # cat /proc/meminfo
MemTotal: 264742432 kB
MemFree: 263920628 kB
Buffers: 1416 kB
Cached: 24468 kB
...
DirectMap4k: 5760 kB
DirectMap2M: 3205120 kB
DirectMap1G: 265289728 kB
it is consistent to
LBSuse:~ # cat /sys/kernel/debug/kernel_page_tables
..
---[ Low Kernel Mapping ]---
0xffff880000000000-0xffff880000200000 2M RW GLB x pte
0xffff880000200000-0xffff880040000000 1022M RW PSE GLB x pmd
0xffff880040000000-0xffff8800c0000000 2G RW PSE GLB NX pud
0xffff8800c0000000-0xffff8800d7e00000 382M RW PSE GLB NX pmd
0xffff8800d7e00000-0xffff8800d7fa0000 1664K RW GLB NX pte
0xffff8800d7fa0000-0xffff8800d8000000 384K pte
0xffff8800d8000000-0xffff8800dc000000 64M pmd
0xffff8800dc000000-0xffff8800e0000000 64M RW PSE GLB NX pmd
0xffff8800e0000000-0xffff880100000000 512M pmd
0xffff880100000000-0xffff880800000000 28G RW PSE GLB NX pud
0xffff880800000000-0xffff880824600000 582M RW PSE GLB NX pmd
0xffff880824600000-0xffff8808247f0000 1984K RW GLB NX pte
0xffff8808247f0000-0xffff880824800000 64K RW PCD GLB NX pte
0xffff880824800000-0xffff880840000000 440M RW PSE GLB NX pmd
0xffff880840000000-0xffff884000000000 223G RW PSE GLB NX pud
0xffff884000000000-0xffff884028000000 640M RW PSE GLB NX pmd
0xffff884028000000-0xffff884040000000 384M pmd
0xffff884040000000-0xffff888000000000 255G pud
0xffff888000000000-0xffffc20000000000 58880G pgd
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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* master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] 5326/1: AFEB9260: Fix for i2c_board_info structure
[ARM] mx31ads: Add missing include
[ARM] MXC: Fix mxc_gpio_get(), which must read PSR register instead DR.
[ARM] MX3: Use ioremap wrapper to map SoC devices nonshared
[ARM] gpio_free might sleep, arm architecture
[ARM] ep93xx: fix OHCI DMA mask
leds: da903x: (da9030 only) led brightness reversed.
[ARM] sharpsl_pm: fix compilation w/o CONFIG_PM
[ARM] pcm037: map AIPS1 and AIPS2 as nonshared area
[ARM] build fixes for netX serial driver
[ARM] 5323/1: Remove outdated empeg documentation.
[ARM] 5299/1: Add maintainer for Mobilepro 900/c
[ARM] corgi_lcd: fix simultaneous compilation with corgi_bl
[ARM] pxa/spitz: fix spi cs on spitz
[ARM] 5322/1: Fix fastpath issue in mmci.c
[ARM] xsc3: revert writethrough memory-type encoding change
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i2c_board_info array was filled incorrectly.
Due to circumstances, the way it is filled works.
This patch fills array properly.
Signed-off-by: Sergey Lapin <slapin@ossfans.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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git://pasiphae.extern.pengutronix.de/git/imx/linux-2.6
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mx31ads_defconfig compilation failed with
arch/arm/mach-mx3/mx31ads.c: In function 'mxc_init_imx_uart':
arch/arm/mach-mx3/mx31ads.c:102: error: 'mxc_uart_device0' undeclared (first use in this function)
arch/arm/mach-mx3/mx31ads.c:102: error: (Each undeclared identifier is reported only once
arch/arm/mach-mx3/mx31ads.c:102: error: for each function it appears in.)
make[1]: *** [arch/arm/mach-mx3/mx31ads.o] Error 1
Add missing include
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The Data register holds the value we have written to a gpio. To
get the input value we must read the Pad Status Register MX3 (or Sample
Status register in MX1/2 terms)
Signed-off-by: Darius Augulis <augulis.darius@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The internal devices of the MX3 Processor have to be mapped
MT_DEVICE_NONSHARED devices, otherwise cache corruptions occur.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The internal devices of the MX3 Processor have to be mapped
MT_DEVICE_NONSHARED devices, otherwise cache corruptions occur.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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According to the documentation gpio_free should only be called from task
context only. To make this more explicit add a might sleep to all
implementations.
This patch changes the gpio_free implementations for the arm architecture.
DaVinci is skipped on purpose to simplify the merge process for patches
switching it over to use gpiolib as per request by David Brownell.
Signed-off-by: Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de>
Cc: David Brownell <david-b@pacbell.net>
Cc: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6
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Fix compilation of sharpsl_pm when CONFIG_PM in unselected.
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
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corgi_lcd has symbol conflict with corgi_bl driver.
Fix it by renaming common symbol in new corgi_lcd driver.
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
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On spitz configure SPI CS GPIOs as outputs to unbreak spi chip selection.
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
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Commit 40df2d1d "[ARM] Update Xscale and Xscale3 PTE mappings" was
fingered by git-bisect for a boot failure on iop13xx. The change made
L_PTE_MT_WRITETHROUGH mappings L2-uncacheable. Russell points out that
this mapping is used for the vector page. Given the regression, and the
fact this page is used often, restore the old behaviour.
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
CHAR: Delete old and now unused M48T35 RTC driver for SGI IP27.
CHAR: Delete old and now unused DS1286 driver.
MIPS: Sort out CPU type to name translation.
MIPS: Use the new byteorder headers
MIPS: Probe for watch registers on cores of all vendors, not just MTI.
MIPS: Switch FPU emulator trap to BREAK instruction.
MIPS: SMP: Do not initialize __cpu_number_map/__cpu_logical_map for CPU 0.
MIPS: Consider value of c0_ebase when computing value of exception base.
MIPS: Clean up MIPSxx-optimized bitop functions
MIPS: New feature test macro cpu_has_mips_r
MIPS: RBTX4927: Add GPIO-LED support
MIPS: TXx9: Fix RBTX4939 ethernet address initialization
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It was only used by this one SGI platform which recently was converted to
RTC_LIB and with RTC_LIB enabled the legacy drivers are no more selectable.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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It was only used by two SGI platforms which recently were converted to
RTC_LIB and with RTC_LIB enabled the legacy drivers are no more selectable.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
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As noticed by David Daney <ddaney@caviumnetworks.com>, the old long switch
statement did not comply with the Linux C coding style. It was also yet
another place of code to be changed when adding a new processor type
leading to annoying bugs for example in /proc/cpuinfo.
Fixed by moving the setting of the CPU type string into the core of the
probing code and a few BUG_ON() test to ensure the CPU probing code indeed
did its job and removing multiple now redundant tests.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Acked-by: David Daney <ddaney@caviumnetworks.com>
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Arguably using the address error handler has always been ugly. But with
processors that handle unaligned loads and stores in hardware the
current mechanism ceases to work so switch it to a BREAK instruction and
allocate break code 514 to the FPU emulator.
Yoichi Yuasa provided a build fix for CONFIG_BUG=n.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
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A system isn't necessarily booted on physical processor 0 as this code
assumes. Also the array happens to be allocated in .bss so it's zero
initialized anyway. Systems which need to override this can do so in
their mp_ops->smp_setup() method.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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It just so happens to be zero on all currently supported systems so this
hasn't bitten yet ...
[Ralf: Original patch from Cavium; handling of set_uncached_handler() and
de-ifdef'ed trap_init() implementation by me.]
Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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cpu_has_mips_r is true if a processor is MIPS32 or MIPS64, any architecture
revision.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Fix location of ethernet adddress when booted from external ROM.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
x86, gart: fix gart detection for Fam11h CPUs
x86: 64 bit print out absent pages num too
x86, kdump: fix invalid access on i386 sparsemem
x86: fix APIC_DEBUG with inquire_remote_apic
x86: AMD microcode patch loader author update
x86: microcode patch loader author update
mailmap: add Peter Oruba
x86, bts: improve help text for BTS config
doc/x86: fix doc subdirs
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Impact: fix AMD Family 11h boot hangs / USB device problems
The AMD Fam11h CPUs have a K8 northbridge. This northbridge is different
from other family's because it lacks GART support (as I just learned).
But the kernel implicitly expects a GART if it finds an AMD northbridge.
Fix this by removing the Fam11h northbridge id from the scan list of K8
northbridges. This patch also changes the message in the GART driver
about missing K8 northbridges to tell that the GART is missing which is
the correct information in this case.
Reported-by: Jouni Malinen <jkmalinen@gmail.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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so users are not confused with memhole causing big total ram
we don't need to worry about 32 bit, because memhole is always
above max_low_pfn.
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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