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* USB: pxa2xx_udc understands GPIO based VBUS sensingDavid Brownell2006-09-271-14/+1
| | | | | | | | | | | | | | | | This updates the PXA 25x UDC board-independent infrastructure for VBUS sensing and the D+ pullup. The original code evolved from rather bizarre support on Intel's "Lubbock" reference hardware, so that on more sensible hardware it doesn't work as well as it could/should. The change is just to teach the UDC driver how to use built-in PXA GPIO pins directly. This reduces the amount of board-specfic object code needed, and enables the use of a VBUS sensing IRQ on boards (like Gumstix) that have one. With VBUS sensing, the UDC is unclocked until a host is actually connected. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: move <linux/usb_otg.h> to <linux/usb/otg.h>David Brownell2006-09-271-1/+1
| | | | | | | | Move <linux/usb_otg.h> to <linux/usb/otg.h>. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* Merge branch 'release' of ↵Linus Torvalds2006-09-2719-177/+745
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6 * 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6: [IA64] minor reformatting to vmlinux.lds.S [IA64] CMC/CPE: Reverse the order of fetching log and checking poll threshold [IA64] PAL calls need physical mode, stacked [IA64] ar.fpsr not set on MCA/INIT kernel entry [IA64] printing support for MCA/INIT [IA64] trim output of show_mem() [IA64] show_mem() printk levels [IA64] Make gp value point to Region 5 in mca handler Revert "[IA64] Unwire set/get_robust_list" [IA64] Implement futex primitives [IA64-SGI] Do not request DMA memory for BTE [IA64] Move perfmon tables from thread_struct to pfm_context [IA64] Add interface so modules can discover whether multithreading is on. [IA64] kprobes: fixup the pagefault exception caused by probehandlers [IA64] kprobe opcode 16 bytes alignment on IA64 [IA64] esi-support [IA64] Add "model name" to /proc/cpuinfo
| * [IA64] minor reformatting to vmlinux.lds.SAl Stone2006-09-271-2/+6
| | | | | | | | | | | | | | | | Minor reformatting to vmlinux.lds.S to make it 80-column usable, in accordance with Linux coding style. Signed-off-by: Al Stone <ahs3@fc.hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * [IA64] CMC/CPE: Reverse the order of fetching log and checking poll thresholdHidetoshi Seto2006-09-271-8/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch reverses the order of fetching log from SAL and checking poll threshold. This will fix following trivial issues: - If SAL_GET_SATE_INFO is unbelievably slow (due to huge system or just its silly implementation) and if it takes more than 1/5 sec, CMCI/CPEI will never switch to CMCP/CPEP. - Assuming terrible flood of interrupt (continuous corrected errors let all CPUs enter to handler at once and bind them in it), CPUs will be serialized by IA64_LOG_LOCK(*). Now we check the poll threshold after the lock and log fetch, so we need to call SAL_GET_STATE_INFO (num_online_cpus() + 4) times in the worst case. if we can check the threshold before the lock, we can shut up interrupts quickly without waiting preceding log fetches, and the number of times will be reduced to (num_online_cpus()) in the same situation. Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * [IA64] ar.fpsr not set on MCA/INIT kernel entryRuss Anderson2006-09-271-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When entering the kernel due to an MCA or INIT, ar.fpsr (ar40) was not getting set to the kernel default value (remaining at the user value). The effect depends on the user setting of ar.fpsr. In the test case, the effect was addresses printing with strange hex values. Setting ar.fpsr in ia64_set_kernel_registers sets it for both the MCA and INIT paths. The user value of ar.fpsr is correctly saved (in ia64_state_save) and restored (in ia64_state_restore). Below is an example of output with very strange hex values. Anyone know the value of hex 'g'? :-) Processes interrupted by INIT - 0 (cpu 14 task 0xdfffg55g7a4c6gA) Signed-off-by: Russ Anderson (rja@sgi.com) Signed-off-by: Tony Luck <tony.luck@intel.com>
| * [IA64] printing support for MCA/INITHidetoshi Seto2006-09-264-36/+242
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Printing message to console from MCA/INIT handler is useful, however doing oops_in_progress = 1 in them exactly makes something in kernel wrong. Especially it sounds ugly if system goes wrong after returning from recoverable MCA. This patch adds ia64_mca_printk() function that collects messages into temporary-not-so-large message buffer during in MCA/INIT environment and print them out later, after returning to normal context or when handlers determine to down the system. Also this print function is exported for use in extensional MCA handler. It would be useful to describe detail about recovery. NOTE: I don't think it is sane thing if temporary message buffer is enlarged enough to hold whole stack dumps from INIT, so buffering is disabled during stack dump from INIT-monarch (= default_monarch_init_process). please fix it in future. Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Acked-by: Russ Anderson <rja@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * [IA64] trim output of show_mem()Jes Sorensen2006-09-261-5/+4
| | | | | | | | | | | | | | | | Cut the number of lines of memory info output per node from five to one line. Signed-off-by: Jes Sorensen <jes@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * [IA64] show_mem() printk levelsJes Sorensen2006-09-262-22/+24
| | | | | | | | | | | | | | | | | | Use the default sysrq printk level for printing show_mem() output both for disconfig and contig versions. This is consistent with the printk level used on other architectures (well ia32 at least). Signed-off-by: Jes Sorensen <jes@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * [IA64] Make gp value point to Region 5 in mca handlerZou Nan hai2006-09-261-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MCA dispatch code take physical address of GP passed from SAL, then call DATA_PA_TO_VA twice on GP before call into C code. The first time is in ia64_set_kernel_register, the second time is in VIRTUAL_MODE_ENTER. The gp is changed to a virtual address in region 7 because DATA_PA_TO_VA is implemented by dep instruction. However when notify blocks were called from MCA handler code, because notify blocks are supported by callback function pointers, gp value value was switched to region 5 again. The patch set gp register to kernel gp of region 5 at entry of MCA dispatch. Signed-off-by: Zou Nan hai <nanhai.zou@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * Revert "[IA64] Unwire set/get_robust_list"Tony Luck2006-09-261-2/+2
| | | | | | | | | | | | | | | | | | This reverts commit 2636255488484e04d6d54303d2b0ec30f7ef7e02. Jakub Jelinek provided the missing futex_atomic_cmpxchg_inatomic() function, so now it should be safe to re-enable these syscalls. Signed-off-by: Tony Luck <tony.luck@intel.com>
| * [IA64-SGI] Do not request DMA memory for BTEChristoph Lameter2006-09-261-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | The GFP_DMA option usually does nothing on SN2 since all of memory is in thei DMA zone and the BTE has always been capable of addressing all of memory. So there is no need to get memory from a restricted range of memory (which is what GFP_DMA is for). Remove useless __GFP_DMA option. Signed-off-by: Christoph Lameter <clameter@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * [IA64] Move perfmon tables from thread_struct to pfm_contextKeshavamurthy Anil S2006-09-261-64/+49
| | | | | | | | | | | | | | | | | | | | | | This patch renders thread_struct->pmcs[] and thread_struct->pmds[] OBSOLETE. The actual table is moved to pfm_context structure which saves space in thread_struct (in turn saving space in task_struct which frees up more space for kernel stacks). Signed-off-by: Stephane Eranian <eranian@hpl.hp.com> Signed-off-by: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * [IA64] Add interface so modules can discover whether multithreading is on.Stephane Eranian2006-09-261-0/+24
| | | | | | | | | | | | | | | | Add is_multithreading_enabled() to check whether multi-threading is enabled independently of which cpu is currently online Signed-off-by: stephane eranian <eranian@hpl.hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * [IA64] kprobes: fixup the pagefault exception caused by probehandlersKeshavamurthy Anil S2006-09-261-0/+6
| | | | | | | | | | | | | | | | | | | | If the user-specified kprobe handler causes the page fault when accessing user space address, fixup this fault since do_page_fault() should not continue as the kprobe handler are run with preemption disabled. Signed-off-by: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * [IA64] kprobe opcode 16 bytes alignment on IA64bibo mao2006-09-261-26/+29
| | | | | | | | | | | | | | | | | | | | | | | | On IA64 instruction opcode must be 16 bytes alignment, in kprobe structure there is one element to save original instruction, currently saved opcode is not statically allocated in kprobe structure, that can not assure 16 bytes alignment. This patch dynamically allocated kprobe instruction opcode to assure 16 bytes alignment. Signed-off-by: bibo mao <bibo.mao@intel.com> Acked-by: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * Pull esi-support into release branchTony Luck2006-09-265-0/+318
| |\
| | * [IA64] esi-supportDavid Mosberger-Tang2006-06-215-0/+318
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for making ESI calls [1]. ESI stands for "Extensible SAL specification" and is basically a way for invoking firmware subroutines which are identified by a GUID. I don't know whether ESI is used by vendors other than HP (if you do, please let me know) but as firmware "backdoors" go, this seems one of the cleaner methods, so it seems reasonable to support it, even though I'm not aware of any publicly documented ESI calls. I'd have liked to make the ESI module completely stand-alone, but unfortunately that is not easily (or not at all) possible because in order to make ESI calls in physical mode, a small stub similar to the EFI stub is needed in the kernel proper. I did try to create a stub that would work in user-level, but it quickly got ugly beyond recognition (e.g., the stub had to make assumptions about how the module-loader generated call-stubs work) and I didn't even get it to work (that's probably fixable, but I didn't bother because I concluded it was too ugly anyhow). While it's not terribly elegant to have kernel code which isn't actively used in the kernel proper, I think it might be worth making an exception here for two reasons: the code is trivially small (all that's really needed is esi_stub.S) and by including it in the normal kernel distro, it might encourage other OEMs to also use ESI, which I think would be far better than each inventing their own firmware "backdoor". The code was originally written by Alex. I just massaged and packaged it a bit (and perhaps messed up some things along the way...). Changes since first version of patch that was posted to mailing list: * Export ia64_esi_call and ia64_esi_call_phys() as GPL symbols. * Disallow building esi.c as a module for now. Building as a module would currently lead to an unresolved reference to "sal_lock" on SMP kernels because that symbol doesn't get exported. * Export esi_call_phys() only if ESI is enabled. * Remove internal stuff from esi.h and add a "proc_type" argument to ia64_esi_call() such that serialization-requirements can be expressed (ESI follows SAL here, where procedure calls may have to be serialized, are MP-safe, or MP-safe andr reentrant). [1] h21007.www2.hp.com/dspp/tech/tech_TechDocumentDetailPage_IDX/1,1701,919,00.html Signed-off-by: David Mosberger <David.Mosberger@acm.org> Signed-off-by: Alex Williamson <alex.williamson@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | Pull model-name into release branchTony Luck2006-09-261-10/+31
| |\ \
| | * | [IA64] Add "model name" to /proc/cpuinfoTony Luck2006-06-051-10/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Linux ia64 port tried to decode the processor family number to something human-readable, but Intel brandnames don't change synchronously with updates to the family number. Adopt a more i386-like approach and just print the family number in decimal. Add a new field "model name" that uses PAL_BRAND_INFO to find the official name for the cpu, or on older systems, falls back to using the well-known codenames (Merced, McKinley, Madison). Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | | Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6Linus Torvalds2006-09-27237-6583/+17228
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6: (108 commits) sh: Fix occasional flush_cache_4096() stack corruption. sh: Calculate shm alignment at runtime. sh: dma-mapping compile fixes. sh: Initial vsyscall page support. sh: Clean up PAGE_SIZE definition for assembly use. sh: Selective flush_cache_mm() flushing. sh: More intelligent entry_mask/way_size calculation. sh: Support for L2 cache on newer SH-4A CPUs. sh: Update kexec support for API changes. sh: Optimized readsl()/writesl() support. sh: Report movli.l/movco.l capabilities. sh: CPU flags in AT_HWCAP in ELF auxvt. sh: Add support for 4K stacks. sh: Enable /proc/kcore support. sh: stack debugging support. sh: select CONFIG_EMBEDDED. sh: machvec rework. sh: Solution Engine SH7343 board support. sh: SH7710VoIPGW board support. sh: Enable verbose BUG() support. ...
| * | | | sh: Fix occasional flush_cache_4096() stack corruption.Paul Mundt2006-09-271-11/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IRQs disabling in flush_cache_4096 for cache purge. Under certain workloads we would get an IRQ in the middle of a purge operation, and the cachelines would remain in an inconsistent state, leading to occasional stack corruption. Signed-off-by: Takeo Takahashi <takahashi.takeo@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: Calculate shm alignment at runtime.Paul Mundt2006-09-272-20/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set the SHM alignment at runtime, based off of probed cache desc. Optimize get_unmapped_area() to only colour align shared mappings. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: Initial vsyscall page support.Paul Mundt2006-09-2713-12/+418
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This implements initial support for the vsyscall page on SH. At the moment we leave it configurable due to having nommu to support from the same code base. We hook it up for the signal trampoline return at present, with more to be added later, once uClibc catches up. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: Selective flush_cache_mm() flushing.Paul Mundt2006-09-271-90/+130
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | flush_cache_mm() wraps in to flush_cache_all(), which is rather excessive given that the number of PTEs within the specified context are generally quite low. Optimize for walking the mm's VMA list and selectively flushing the VMA ranges from the dcache. Invalidate the icache only if a VMA sets VM_EXEC. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: More intelligent entry_mask/way_size calculation.Paul Mundt2006-09-271-7/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Figure out the cache desc entry_mask at runtime, and remove hard-coded assumption about the cacheline size. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: Support for L2 cache on newer SH-4A CPUs.Paul Mundt2006-09-272-2/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This implements preliminary support for the L2 caches found on newer SH-4A CPUs. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: Update kexec support for API changes.Paul Mundt2006-09-272-16/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This was falling a bit behind.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: Optimized readsl()/writesl() support.Paul Mundt2006-09-271-0/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement optimized copies of readsl()/writesl(). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: Report movli.l/movco.l capabilities.Paul Mundt2006-09-271-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add llsc to cpu_flags[] and comment cpu-features.h. Signed-off-by: Jamie Lenehan <nynaeve@twibble.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: CPU flags in AT_HWCAP in ELF auxvt.Paul Mundt2006-09-271-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Encode processor flags in AT_HWCAP in the ELF auxiliary vector. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: Add support for 4K stacks.Paul Mundt2006-09-277-23/+170
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This enables support for 4K stacks on SH. Currently this depends on DEBUG_KERNEL, but likely all boards will switch to this as the default in the future. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: Enable /proc/kcore support.Paul Mundt2006-09-271-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This was previously unimplemented.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: stack debugging support.Paul Mundt2006-09-274-8/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a DEBUG_STACK_USAGE and DEBUG_STACKOVERFLOW for SH. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: select CONFIG_EMBEDDED.Paul Mundt2006-09-271-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This solution isn't very optimal, but it's generaly the behaviour that we want.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: machvec rework.Paul Mundt2006-09-2730-774/+476
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some more machvec overhauling and setup code cleanup. Kill off get_system_type() and platform_setup(), we can do these both through the machvec. While we're add it, kill off more useless mach.c's and drop some legacy cruft from setup.c. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: Solution Engine SH7343 board support.Paul Mundt2006-09-279-13/+1626
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for the SE7343 board. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: SH7710VoIPGW board support.Paul Mundt2006-09-276-0/+1036
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for the SH7710 VoIP Gateway board. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: Cleanup IRQ disabling for hardirq handlers.Paul Mundt2006-09-2715-156/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The generic hardirq layer already takes care of a lot of the appropriate locking and disabling for us, no need to duplicate it in the handlers.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: maskreg IRQ support.Paul Mundt2006-09-273-2/+105
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Formerly implemented by ADX, we can use this generically, so move it over. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: Kill off dead boards.Paul Mundt2006-09-2732-2435/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | None of these have been maintained in years, and no one seems to be interested in doing so, so just get rid of them. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: Add support for cacheline poking through debugfs.Paul Mundt2006-09-272-0/+151
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A simple debugging aid for easier visibility of the respective cachelines. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: Fix memcpy() build error on sh4eb.Nobuhiro Iwamatsu2006-09-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A trivial bug breaking the build on sh4eb. Signed-off-by: Nobuhiro Iwamatsu <hemamu@t-base.ne.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: Kill off the rest of the legacy rtc mess.Paul Mundt2006-09-276-190/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the new RTC class driver, we can get rid of most of the old left over cruft. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: SHMIN board support.Takashi YOSHII2006-09-276-1/+890
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for the SHMIN SH7706 board. Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: Add support for SH7706/SH7710/SH7343 CPUs.Paul Mundt2006-09-2718-51/+308
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for the aforementioned CPU subtypes, and cleans up some build issues encountered as a result. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: Add setup code for various CPU subtypes.Paul Mundt2006-09-2711-0/+441
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds some simple setup code for most of the CPU subtypes, primarily simple platform device registration. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: sem2mutex conversion for clock framework.Paul Mundt2006-09-271-8/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simple sem2mutex conversion. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: pselect6 and ppoll, along with signal trampoline rework.Paul Mundt2006-09-273-91/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This implements support for ppoll() and pselect6().. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: __addr_ok() and other misc nommu fixups.Yoshinori Sato2006-09-276-17/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A few more outstanding nommu fixups.. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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