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Author
Age
Files
Lines
*
Sparseify MIPS.
Ralf Baechle
2005-10-29
15
-488
/
+516
*
On 24K we did always disable cache parity protection - obviously not
Ralf Baechle
2005-10-29
1
-9
/
+5
*
ISOify.
Ralf Baechle
2005-10-29
2
-68
/
+68
*
Moved irq_tab_alchemy to the board specific irqmap.c files.
Pete Popov
2005-10-29
6
-87
/
+64
*
Base Au1200 2.6 support.
Pete Popov
2005-10-29
15
-105
/
+730
*
Fix 'prctl' system call for IRIX. At this point IRIX 5.3 static binaries
Steven J. Hill
2005-10-29
1
-33
/
+27
*
Gross macro abuse. Get rid of gpreg_t, vaddr_t, REG_TO_VA and
Ralf Baechle
2005-10-29
3
-37
/
+31
*
Cleanup fpuemuprivate declarations.
Ralf Baechle
2005-10-29
2
-5
/
+0
*
Convert struct hw_interrupt_type initializations to ISO C99 named
Ralf Baechle
2005-10-29
20
-237
/
+211
*
No barrier needed on au1x.
Pete Popov
2005-10-29
1
-9
/
+0
*
Comment correction after further investigation of issue.
Pete Popov
2005-10-29
1
-3
/
+2
*
Fix initialization. Unbreak the wait-for-completion loops. Code cleanup.
Thiemo Seufer
2005-10-29
1
-22
/
+24
*
Switch SiByte drivers back to __raw_*() functions.
Maciej W. Rozycki
2005-10-29
10
-209
/
+220
*
Merge do_boot_cpu() into the new style __cpu_up().
Ralf Baechle
2005-10-29
1
-21
/
+9
*
On multiprocessor systems the BogoMIPS for each CPU was reported was
Ralf Baechle
2005-10-29
1
-2
/
+2
*
Resurrect Cobalt support for 2.6.
Ralf Baechle
2005-10-29
9
-196
/
+233
*
-nostdlib boilerplate.
Thiemo Seufer
2005-10-29
1
-1
/
+1
*
Fix wchan implementation, based on earlier by from Atsushi Nemoto.
Thiemo Seufer
2005-10-29
1
-58
/
+77
*
Improved modules loader, more robust and works on 64bit kernels.
Thiemo Seufer
2005-10-29
4
-529
/
+337
*
Until I figure out why NFS filesystems are having problems with
Steven J. Hill
2005-10-29
1
-103
/
+123
*
Initialize iomem_resource.
Thiemo Seufer
2005-10-29
1
-1
/
+3
*
Handle addresses beyond VMALLOC_END correctly.
Thiemo Seufer
2005-10-29
1
-1
/
+2
*
Use intermediate variable.
Thiemo Seufer
2005-10-29
1
-3
/
+3
*
O2 doesn't have _that_ much RAM.
Thiemo Seufer
2005-10-29
1
-2
/
+2
*
Changed all Au1x boards to noncoherent again.
Pete Popov
2005-10-29
1
-3
/
+3
*
32-bit compatibility for various timer-related system calls.
Ralf Baechle
2005-10-29
3
-10
/
+60
*
Update to match the native siginfo structure and code.
Ralf Baechle
2005-10-29
1
-2
/
+9
*
32-bit compatibility for ptrace GETEVENTMSG operation.
Ralf Baechle
2005-10-29
1
-1
/
+5
*
Implement 32-bit compatibility for waitid(2).
Ralf Baechle
2005-10-29
4
-2
/
+51
*
Waitid(2) now has 5 arguments.
Ralf Baechle
2005-10-29
1
-1
/
+1
*
Use generic compat_sys_wait4 to implement 32-bit wait4(2).
Ralf Baechle
2005-10-29
3
-74
/
+3
*
Replace the complicated and broken attempt to clean interrupt by
Ralf Baechle
2005-10-29
1
-16
/
+4
*
If you want RM7000 better fix it to build first ...
Ralf Baechle
2005-10-29
1
-1
/
+0
*
It's unwise to disable all interrupts of the boot node ;-)
Ralf Baechle
2005-10-29
1
-1
/
+4
*
Enable RM7000 secondary cache for Atlas and Malta boards.
Maciej W. Rozycki
2005-10-29
1
-0
/
+2
*
Moves a test which determines if we actually need to perform a
Ralf Baechle
2005-10-29
1
-7
/
+7
*
Update MIPS to use the 4-level pagetable code thereby getting rid of
Ralf Baechle
2005-10-29
12
-31
/
+76
*
Document why calling smp_call_function will deadlock when called with
Ralf Baechle
2005-10-29
1
-1
/
+13
*
25Kf is also physically indexed.
Ralf Baechle
2005-10-29
1
-0
/
+1
*
20Kc and SB1 don't suffer from aliases.
Ralf Baechle
2005-10-29
1
-0
/
+2
*
Delete duplicate copy of fixrange_init.
Ralf Baechle
2005-10-29
2
-33
/
+3
*
rm9000_init() really is __init code.
Ralf Baechle
2005-10-29
1
-1
/
+2
*
Use preempt_schedule_irq.
Ralf Baechle
2005-10-29
1
-5
/
+2
*
More oprofile bits for MIPS32-style performance counters. The code to
Ralf Baechle
2005-10-29
4
-12
/
+238
*
It works better when including arch/mips/sgi-ip27/Kconfig ...
Ralf Baechle
2005-10-29
1
-0
/
+1
*
Move missplaced code line to the right place.
Ralf Baechle
2005-10-29
2
-3
/
+56
*
Use hardware mechanism to deal with cache aliases in the 24K.
Ralf Baechle
2005-10-29
1
-2
/
+10
*
Remove old wrong bits of cache code.
Ralf Baechle
2005-10-29
1
-3
/
+0
*
Clean up SEAD interrupt initialization.
Maciej W. Rozycki
2005-10-29
1
-7
/
+5
*
Mask and ack CPU interrupts upon initialization. Keep the state
Maciej W. Rozycki
2005-10-29
1
-1
/
+6
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