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* x86/PCI: read Broadcom CNB20LE host bridge info before PCI scanBjorn Helgaas2012-01-061-23/+39
| | | | | | | | | | | | | | | We currently read the CNB20LE aperture information in a PCI quirk, which happens after we've already created the root bus. This patch changes it to read the apertures earlier so we can create the root bus with the correct resources. I believe the CNB20LE lives at "pci 0000:00:00" based on https://lkml.org/lkml/2010/8/13/220 CC: Ira W. Snyder <iws@ovro.caltech.edu> CC: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* sparc32, leon/PCI: convert to pci_scan_root_bus() for correct root bus resourcesBjorn Helgaas2012-01-061-17/+8
| | | | | | | | | | | | | Convert from pci_scan_bus_parented() to pci_scan_root_bus() and remove root bus resource fixups. This fixes the problem of "early" and "header" quirks seeing incorrect root bus resources. pci_scan_root_bus() also includes the pci_bus_add_devices() so we don't need to do that separately. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* sparc/PCI: convert to pci_create_root_bus()Bjorn Helgaas2012-01-061-11/+6
| | | | | | | | | | | | | Convert from pci_create_bus() to pci_create_root_bus(). This way the root bus resources are correct immediately. This patch doesn't fix a problem because sparc fixed the resources before scanning the bus, but it makes sparc more consistent with other architectures. v2: fix build error (from sfr) Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* sh/PCI: convert to pci_scan_root_bus() for correct root bus resourcesBjorn Helgaas2012-01-061-10/+10
| | | | | | | | | | Convert from pci_scan_bus() to pci_scan_root_bus() and remove root bus resource fixups. This fixes the problem of "early" and "header" quirks seeing incorrect root bus resources. CC: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* powerpc/PCI: convert to pci_create_root_bus()Bjorn Helgaas2012-01-061-11/+14
| | | | | | | | | | | | | Convert from pci_create_bus() to pci_create_root_bus(). This way the root bus resources are correct immediately. This patch doesn't fix a problem because powerpc fixed the resources before scanning the bus, but it makes powerpc more consistent with other architectures. v2: fix build error with resource pointer passing CC: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* powerpc/PCI: split PHB part out of pcibios_map_io_space()Bjorn Helgaas2012-01-061-19/+21
| | | | | | | | | | | No functional change. This is so we can use pcibios_phb_map_io_space() before we have a struct pci_bus. v2: fix map io phb typo CC: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* powerpc/PCI: make pcibios_setup_phb_resources() staticBjorn Helgaas2012-01-062-2/+1
| | | | | | CC: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* mn10300/PCI: convert to pci_scan_root_bus() for correct root bus resourcesBjorn Helgaas2012-01-061-6/+6
| | | | | | | | | | Convert from pci_scan_bus() to pci_scan_root_bus() and remove root bus resource fixups. This fixes the problem of "early" and "header" quirks seeing incorrect root bus resources. CC: David Howells <dhowells@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* mips/PCI: convert to pci_scan_root_bus() for correct root bus resourcesBjorn Helgaas2012-01-061-7/+10
| | | | | | | | | | | | | | Convert from pci_scan_bus() to pci_scan_root_bus() and remove root bus resource fixups. This fixes the problem of "early" and "header" quirks seeing incorrect root bus resources. Based on original patch by Deng-Cheng Zhu. Reference: https://lkml.org/lkml/2011/8/26/89 CC: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Deng-Cheng Zhu <dczhu@mips.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* microblaze/PCI: use pci_scan_root_bus()Bjorn Helgaas2012-01-061-7/+3
| | | | | | | | | | Microblaze doesn't need to replace pci_scan_child_bus() or do anything special before pci_bus_add_devices(), so we can use the more generic PCI path in pci_scan_root_bus(). CC: Michal Simek <monstr@monstr.eu> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* microblaze/PCI: convert to pci_create_root_bus() for correct root bus resourcesBjorn Helgaas2012-01-061-15/+15
| | | | | | | | | | | | Convert from pci_create_bus() to pci_create_root_bus(). This way the root bus resources are correct immediately. This patch doesn't fix a problem because microblaze fixed the resources before scanning the bus, but it makes microblaze more consistent with other architectures. It also allows us to use the pci_scan_root_bus() path safely. CC: Michal Simek <monstr@monstr.eu> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* microblaze/PCI: make pcibios_setup_phb_resources() staticBjorn Helgaas2012-01-062-2/+1
| | | | | | CC: Michal Simek <monstr@monstr.eu> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* microblaze/PCI: fix pci_bus_for_each_resource() usageBjorn Helgaas2012-01-061-2/+0
| | | | | | | | | | | The pci_bus_for_each_resource() iterator sets "res" itself, so there's no need to look it up in the bus->resource[] table. Logically part of 89a74ecccd and 8a66da71fa. CC: Michal Simek <monstr@monstr.eu> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* ia64/PCI: convert to pci_create_root_bus() for correct root bus resourcesBjorn Helgaas2012-01-061-25/+14
| | | | | | | | | | | | | | | Convert from pci_create_bus() to pci_create_root_bus(). This way the root bus resources are correct immediately. This fixes the problem of "early" and "header" quirks seeing incorrect root bus resources. We can't use pci_scan_root_bus() because, like x86, ACPI hotplug currently requires pci_bus_add_devices() in a separate host bridge .start() method. v2: fix compile error by using window resource pointer instead CC: Tony Luck <tony.luck@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* ia64/PCI: use pci_create_bus() instead of pci_scan_bus_parented()Bjorn Helgaas2012-01-061-1/+4
| | | | | | | | | This doesn't change any functionality, but it makes a subsequent patch slightly simpler. CC: Tony Luck <tony.luck@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* frv/PCI: convert to pci_scan_root_bus() for correct root bus resourcesBjorn Helgaas2012-01-061-6/+5
| | | | | | | | | | | | | | | Convert from pci_scan_bus() to pci_scan_root_bus() and remove root bus resource fixups. This fixes the problem of "early" and "header" quirks seeing incorrect root bus resources. Note that peer root buses are scanned with pci_scan_bus() (which is now deprecated), so they have the default ioport_resource and iomem_resource resources. This is unchanged from before, but these resources are incorrect, and I don't know how to discover the correct ones. CC: David Howells <dhowells@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* arm/PCI: convert to pci_scan_root_bus() for correct root bus resourcesBjorn Helgaas2012-01-0621-111/+104
| | | | | | | | | | Convert from pci_scan_bus() to pci_scan_root_bus() and remove root bus resource fixups. This fixes the problem of "early" and "header" quirks seeing incorrect root bus resources. CC: Russell King <linux@arm.linux.org.uk> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* alpha/PCI: convert to pci_scan_root_bus() for correct root bus resourcesBjorn Helgaas2012-01-061-20/+20
| | | | | | | | | | | | Convert from pci_scan_bus() to pci_scan_root_bus() and remove root bus resource fixups. This fixes the problem of "early" and "header" quirks seeing incorrect root bus resources. v2: fix up conversion CC: linux-alpha@vger.kernel.org Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: amd: Kill misleading message about enablement of IO access to PCI ECS]Andreas Herrmann2012-01-061-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | Commit 24d9b70b8c679264756a6980e668b96b3f964826 (x86: Use PCI method for enabling AMD extended config space before MSR method) added a message when IO access to PCI ECS was enabled via access to the NB_CFG PCI register. This can lead to a bogus message like [ 0.365177] Extended Config Space enabled on 0 nodes which is misleading because IO ECS access is subsequently enabled for AMD CPUs (that support this) by modifying the corresponding NB_CFG MSR. Furthermore it's not "Extended Config Space" that is enabled by this register setting. It's the IO access that is enabled for extended configruation space. IMHO the ambiguous message needs to be cancelled. Cc: Jan Beulich <jbeulich@novell.com> Cc: Robert Richter <robert.richter@amd.com> Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: x86: use generic pcibios_set_master()Myron Stowe2012-01-061-14/+0
| | | | | | | | | | | This patch removes x86's architecture-specific 'pcibios_set_master()' routine and lets the default PCI core based implementation handle PCI device 'latency timer' setup. No functional change. Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: sh: use generic pcibios_set_master()Myron Stowe2012-01-061-15/+0
| | | | | | | | | | | This patch removes sh's architecture-specific 'pcibios_set_master()' routine and lets the default PCI core based implementation handle PCI device 'latency timer' setup. No functional change. Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: mn10300: use generic pcibios_set_master()Myron Stowe2012-01-061-16/+0
| | | | | | | | | | | This patch removes mn10300's architecture-specific 'pcibios_set_master()' routine for ASB2305 and lets the default PCI core based implementation handle PCI device 'latency timer' setup. No functional change. Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: MIPS: use generic pcibios_set_master()Myron Stowe2012-01-061-15/+0
| | | | | | | | | | | | This patch removes MIPS' architecture-specific 'pcibios_set_master()' routine and lets the default PCI core based implementation handle PCI device 'latency timer' setup. No functional change. Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: frv: use generic pcibios_set_master()Myron Stowe2012-01-061-14/+0
| | | | | | | | | | | This patch removes frv's architecture-specific 'pcibios_set_master()' routine and lets the default PCI core based implementation handle PCI device 'latency timer' setup. No functional change. Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: Pull PCI 'latency timer' setup up into the coreMyron Stowe2012-01-0610-45/+0
| | | | | | | | | | | | | | | | | | | | The 'latency timer' of PCI devices, both Type 0 and Type 1, is setup in architecture-specific code [see: 'pcibios_set_master()']. There are two approaches being taken by all the architectures - check if the 'latency timer' is currently set between 16 and 255 and if not bring it within bounds, or, do nothing (and then there is the gratuitously different PA-RISC implementation). There is nothing architecture-specific about PCI's 'latency timer' so this patch pulls its setup functionality up into the PCI core by creating a generic 'pcibios_set_master()' function using the '__weak' attribute which can be used by all architectures as a default which, if necessary, can then be over-ridden by architecture-specific code. No functional change. Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: Xtensa: convert pcibios_set_master() to a non-inlined functionMyron Stowe2012-01-062-5/+5
| | | | | | | | | | | | | | | | | | | This patch converts Xtensa's architecture-specific 'pcibios_set_master()' routine to a non-inlined function. This will allow follow on patches to create a generic 'pcibios_set_master()' function using the '__weak' attribute which can be used by all architectures as a default which, if necessary, can then be over- ridden by architecture-specific code. Converting 'pci_bios_set_master()' to a non-inlined function will allow Xtensa's 'pcibios_set_master()' implementation to remain architecture-specific after the generic version is introduced and thus, not change current behavior. No functional change. Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: UniCore: convert pcibios_set_master() to a non-inlined functionMyron Stowe2012-01-062-5/+5
| | | | | | | | | | | | | | | | | | | This patch converts UniCore's architecture-specific 'pcibios_set_master()' routine to a non-inlined function. This will allow follow on patches to create a generic 'pcibios_set_master()' function using the '__weak' attribute which can be used by all architectures as a default which, if necessary, can then be over- ridden by architecture-specific code. Converting 'pci_bios_set_master()' to a non-inlined function will allow UniCore's 'pcibios_set_master()' implementation to remain architecture-specific after the generic version is introduced and thus, not change current behavior. No functional change. Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: TILE: convert pcibios_set_master() to a non-inlined functionMyron Stowe2012-01-062-7/+5
| | | | | | | | | | | | | | | | | | | This patch converts TILE's architecture-specific 'pcibios_set_master()' routine to a non-inlined function. This will allow follow on patches to create a generic 'pcibios_set_master()' function using the '__weak' attribute which can be used by all architectures as a default which, if necessary, can then be over-ridden by architecture-specific code. Converting 'pci_bios_set_master()' to a non-inlined function will allow TILE's 'pcibios_set_master()' implementation to remain architecture-specific after the generic version is introduced and thus, not change current behavior. No functional change. Acked-by: Chris Metcalf <cmetcalf@tilera.com> Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: SPARC: convert pcibios_set_master() to a non-inlined functionMyron Stowe2012-01-063-10/+5
| | | | | | | | | | | | | | | | | | | This patch converts SPARC's architecture-specific 'pcibios_set_master()' routine to a non-inlined function. This will allow follow on patches to create a generic 'pcibios_set_master()' function using the '__weak' attribute which can be used by all architectures as a default which, if necessary, can then be over- ridden by architecture-specific code. Converting 'pci_bios_set_master()' to a non-inlined function will allow SPARC's 'pcibios_set_master()' implementation to remain architecture-specific after the generic version is introduced and thus, not change current behavior. No functional change. Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: PowerPC: convert pcibios_set_master() to a non-inlined functionMyron Stowe2012-01-062-5/+5
| | | | | | | | | | | | | | | | | | | | This patch converts PowerPC's architecture-specific 'pcibios_set_master()' routine to a non-inlined function. This will allow follow on patches to create a generic 'pcibios_set_master()' function using the '__weak' attribute which can be used by all architectures as a default which, if necessary, can then be over- ridden by architecture-specific code. Converting 'pci_bios_set_master()' to a non-inlined function will allow PowerPC's 'pcibios_set_master()' implementation to remain architecture-specific after the generic version is introduced and thus, not change current behavior. No functional change. Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: MicroBlaze: convert pcibios_set_master() to a non-inlined functionMyron Stowe2012-01-062-5/+5
| | | | | | | | | | | | | | | | | | | This patch converts MicroBlaze's architecture-specific 'pcibios_set_master()' routine to a non-inlined function. This will allow follow on patches to create a generic 'pcibios_set_master()' function using the '__weak' attribute which can be used by all architectures as a default which, if necessary, can then be over- ridden by architecture-specific code. Converting 'pci_bios_set_master()' to a non-inlined function will allow MicroBlaze's 'pcibios_set_master()' implementation to remain architecture-specific after the generic version is introduced and thus, not change current behavior. No functional change. Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: IA64: convert pcibios_set_master() to a non-inlined functionMyron Stowe2012-01-062-6/+5
| | | | | | | | | | | | | | | | | | | This patch converts IA64's architecture-specific 'pcibios_set_master()' routine to a non-inlined function. This will allow follow on patches to create a generic 'pcibios_set_master()' function using the '__weak' attribute which can be used by all architectures as a default which, if necessary, can then be over-ridden by architecture- specific code. Converting 'pci_bios_set_master()' to a non-inlined function will allow IA64's 'pcibios_set_master()' implementation to remain architecture- specific after the generic version is introduced and thus, not change current behavior. No functional change. Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: ARM: convert pcibios_set_master() to a non-inlined functionMyron Stowe2012-01-063-12/+10
| | | | | | | | | | | | | | | | | | | | | | | This patch converts ARM's architecture-specific inlined 'pcibios_set_master()' routine to a non-inlined function. This will allow follow on patches to create a generic 'pcibios_set_master()' function using the '__weak' attribute which can be used by all architectures as a default which, if necessary, can then be over- ridden by architecture-specific code. Converting 'pci_bios_set_master()' to a non-inlined function will allow ARM's 'pcibios_set_master()' implementation to remain architecture- specific after the generic version is introduced and thus, not change current behavior. Note that ARM also has a non-inlined 'pcibios_set_master()' that is used if CONFIG_PCI_HOST_ITE8152 is defined. This patch does not change any behavior here either. No functional change. Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* x86/PCI: Ignore CPU non-addressable _CRS reserved memory resourcesGary Hade2012-01-061-2/+16
| | | | | | | | | | | | | | | | | This assures that a _CRS reserved host bridge window or window region is not used if it is not addressable by the CPU. The new code either trims the window to exclude the non-addressable portion or totally ignores the window if the entire window is non-addressable. The current code has been shown to be problematic with 32-bit non-PAE kernels on systems where _CRS reserves resources above 4GB. Signed-off-by: Gary Hade <garyhade@us.ibm.com> Reviewed-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Thomas Renninger <trenn@novell.com> Cc: linux-kernel@vger.kernel.org Cc: stable@kernel.org Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: Add Thinkpad SL510 to pci=nocrs blacklistDave Jones2012-01-061-0/+10
| | | | | | | | | Enabling CRS by default breaks suspend on the Thinkpad SL510. Details in https://bugzilla.redhat.com/show_bug.cgi?id=769657 Reported-by: Stefan Kirrmann <stefan.kirrmann@gmail.com> Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: Add Dell Studio 1557 to pci=nocrs blacklistDave Jones2012-01-061-0/+12
| | | | | | | | | The Dell Studio 1557 also doesn't suspend correctly when CRS is enabled. Details at https://bugzilla.redhat.com/show_bug.cgi?id=769657 Reported-by: Gregory S. Hoerner <ghoerner@transcendingthought.com> Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* PCI: add set_nouse_crs for use by a pci=nocrs blacklistDave Jones2012-01-061-0/+7
| | | | | | | | | | | | | | | | Some machines don't boot unless passed pci=nocrs. (See https://bugzilla.redhat.com/show_bug.cgi?id=770308 for details of one report. Waiting on dmidecode output for others). Currently there is a DMI whitelist, even though the default is on. v2: drop the 1536 blacklist entry, superceded by the PNP/MMCONFIG changes from Bjorn Acked-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* Merge branch 'fixes' of ↵Linus Torvalds2011-12-303-71/+55
|\ | | | | | | | | | | | | | | | | | | | | http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm * 'fixes' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm: ARM: 7237/1: PL330: Fix driver freeze ARM: 7197/1: errata: Remove SMP dependency for erratum 751472 ARM: 7196/1: errata: Remove SMP dependency for erratum 720789 ARM: 7220/1: mmc: mmci: Fixup error handling for dma ARM: 7214/1: mmc: mmci: Fixup handling of MCI_STARTBITERR
| * ARM: 7237/1: PL330: Fix driver freezeJavi Merino2011-12-231-67/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a req_running field to the pl330_thread to track which request (if any) has been submitted to the DMA. This mechanism replaces the old one in which we tried to guess the same by looking at the PC of the DMA, which could prevent the driver from sending more requests if it didn't guess correctly. Reference: <1323631637-9610-1-git-send-email-javi.merino@arm.com> Signed-off-by: Javi Merino <javi.merino@arm.com> Acked-by: Jassi Brar <jaswinder.singh@linaro.org> Tested-by: Tushar Behera <tushar.behera@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7197/1: errata: Remove SMP dependency for erratum 751472Dave Martin2011-12-232-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Activation conditions for a workaround should not be encoded in the workaround's direct dependencies if this makes otherwise reasonable configuration choices impossible. This patches uses the SMP/UP patching facilities instead to compile out the workaround if the configuration means that it is definitely not needed. This means that configs for buggy silicon can simply select ARM_ERRATA_751472, without preventing a UP kernel from being built or duplicatiing knowledge about when to activate the workaround. This seems the correct way to do things, because the erratum is a property of the silicon, irrespective of what the kernel config happens to be. Signed-off-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7196/1: errata: Remove SMP dependency for erratum 720789Dave Martin2011-12-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Activation conditions for a workaround should not be encoded in the workaround's direct dependencies if this makes otherwise reasonable configuration choices impossible. The workaround for erratum 720789 only affects a code path which is not active in UP kernels; hence it should be safe to turn on in UP kernels, without penalty. This patch simply removes the extra dependency on SMP from Kconfig. This means that configs for buggy silicon can simply select ARM_ERRATA_720789, without preventing a UP kernel from being built or duplicatiing knowledge about when to activate the workaround. Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge branch 'fixes' of ↵Linus Torvalds2011-12-3010-28/+46
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc * 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: plat-orion: make gpiochip label unique enable uncompress log on cpuimx35sd cpuimx35: fix touchscreen support cpuimx35sd: fix Kconfig clock-imx35: fix reboot in internal boot mode dma: MX3_IPU fix depends imx_v4_v5_defconfig: update default configuration cpuimx25sd: fix Kconfig arm/imx: fix cpufreq section mismatch ARM:imx:fix pwm period value ARM: OMAP: hwmod data: fix iva and mailbox hwmods for OMAP 3
| * \ Merge branch 'fixes-hwmod-regression' of ↵Olof Johansson2011-12-201-4/+0
| |\ \ | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
| | * | ARM: OMAP: hwmod data: fix iva and mailbox hwmods for OMAP 3Felipe Contreras2011-12-161-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Seems the commit 7e89098 was overly aggressive in adding iva and mailbox hwmods so now they are registered twice. ------------[ cut here ]------------ WARNING: at arch/arm/mach-omap2/omap_hwmod.c:1959 omap_hwmod_register+0x104/0x12c() omap_hwmod: iva: _register returned -22 Modules linked in: [<c0012aa4>] (unwind_backtrace+0x0/0xec) from [<c002f970>] (warn_slowpath_common+0x4c/0x64) [<c002f970>] (warn_slowpath_common+0x4c/0x64) from [<c002fa08>] (warn_slowpath_fmt+0x2c/0x3c) [<c002fa08>] (warn_slowpath_fmt+0x2c/0x3c) from [<c02fdb4c>] (omap_hwmod_register+0x104/0x12c) [<c02fdb4c>] (omap_hwmod_register+0x104/0x12c) from [<c02fbb44>] (omap3_init_early+0x1c/0x28) [<c02fbb44>] (omap3_init_early+0x1c/0x28) from [<c02f9580>] (setup_arch+0x6b8/0x7a4) [<c02f9580>] (setup_arch+0x6b8/0x7a4) from [<c02f754c>] (start_kernel+0x6c/0x264) [<c02f754c>] (start_kernel+0x6c/0x264) from [<80008040>] (0x80008040) ---[ end trace 1b75b31a2719ed1c ]--- ------------[ cut here ]------------ WARNING: at arch/arm/mach-omap2/omap_hwmod.c:1959 omap_hwmod_register+0x104/0x12c() omap_hwmod: mailbox: _register returned -22 Modules linked in: [<c0012aa4>] (unwind_backtrace+0x0/0xec) from [<c002f970>] (warn_slowpath_common+0x4c/0x64) [<c002f970>] (warn_slowpath_common+0x4c/0x64) from [<c002fa08>] (warn_slowpath_fmt+0x2c/0x3c) [<c002fa08>] (warn_slowpath_fmt+0x2c/0x3c) from [<c02fdb4c>] (omap_hwmod_register+0x104/0x12c) [<c02fdb4c>] (omap_hwmod_register+0x104/0x12c) from [<c02fbb44>] (omap3_init_early+0x1c/0x28) [<c02fbb44>] (omap3_init_early+0x1c/0x28) from [<c02f9580>] (setup_arch+0x6b8/0x7a4) [<c02f9580>] (setup_arch+0x6b8/0x7a4) from [<c02f754c>] (start_kernel+0x6c/0x264) [<c02f754c>] (start_kernel+0x6c/0x264) from [<80008040>] (0x80008040) ---[ end trace 1b75b31a2719ed1d ]--- Signed-off-by: Felipe Contreras <felipe.contreras@gmail.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| * | | ARM: plat-orion: make gpiochip label uniqueHolger Brunck2011-12-201-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The former implementation adds a fix gpiochip label string to the framework. This is confusing because orion_gpio_init is called more than once and this ends up in different gpiochips with the same label. This patch adds the already present orion_gpio_chip_count to the label string to make it unique in the system. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Cc: Lennert Buytenhek <kernel@wantstofly.org> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | enable uncompress log on cpuimx35sdEric Bénard2011-12-191-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Eric Bénard <eric@eukrea.com> Cc: Sascha Hauer <kernel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | cpuimx35: fix touchscreen supportEric Bénard2011-12-191-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Eric Bénard <eric@eukrea.com> Cc: Sascha Hauer <kernel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | cpuimx35sd: fix KconfigEric Bénard2011-12-192-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | in 0d6cfa3a75f5cde5b3ca0dde748fd22625b4f34c I fixed the mach-types records. We also need to make the name consistent in Kconfig else the machine_is_eukrea_cpuimx35sd macro fails, and thus audio codec is not properly initalized. Signed-off-by: Eric Bénard <eric@eukrea.com> Cc: Sascha Hauer <kernel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | clock-imx35: fix reboot in internal boot modeEric Bénard2011-12-191-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 8d75a26 "ARM: mx35: use generic function for displaying silicon revision" disabled IIM clock after reading silicon revision which will prevent reboot in internal boot mode. Signed-off-by: Eric Bénard <eric@eukrea.com> Cc: Jason Liu <jason.hui@linaro.org> Cc: Sascha Hauer <kernel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | imx_v4_v5_defconfig: update default configurationEric Bénard2011-12-191-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - add new machine APF9328 - update CPUIMX25 -> CPUIMX25SD - add drivers : - MXC nand driver - DM9000 - SMSC Phy - SPIdev - Led GPIO Signed-off-by: Eric Bénard <eric@eukrea.com> Cc: Sascha Hauer <kernel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-15 16:07:49 +0100