| Commit message (Collapse) | Author | Age | Files | Lines |
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* git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile:
arch/tile: check kmalloc() result
arch/tile: catch up on various minor cleanups.
arch/tile: avoid erroneous error return for PTRACE_POKEUSR.
tile: set ARCH_KMALLOC_MINALIGN
tile: remove homegrown L1_CACHE_ALIGN macro
arch/tile: Miscellaneous cleanup changes.
arch/tile: Split the icache flush code off to a generic <arch> header.
arch/tile: Fix bug in support for atomic64_xx() ops.
arch/tile: Shrink the tile-opcode files considerably.
arch/tile: Add driver to enable access to the user dynamic network.
arch/tile: Enable more sophisticated IRQ model for 32-bit chips.
Move list types from <linux/list.h> to <linux/types.h>.
Add wait4() back to the set of <asm-generic/unistd.h> syscalls.
Revert adding some arch-specific signal syscalls to <linux/syscalls.h>.
arch/tile: Do not use GFP_KERNEL for dma_alloc_coherent(). Feedback from fujita.tomonori@lab.ntt.co.jp.
arch/tile: core support for Tilera 32-bit chips.
Fix up the "generic" unistd.h ABI to be more useful.
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If kmalloc() fails exit with -ENOMEM.
Signed-off-by: Kulikov Vasiliy <segooon@gmail.com>
Acked-by: Chris Metcalf <cmetcalf@tilera.com>
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None of these changes fix any actual bugs, but are just various cleanups
that fell out along the way. In particular, some unused #defines and
includes are removed, PREFETCH_STRIDE is added (the default is right for
our shipping chips, but wrong for our next generation), our tile-specific
prefetching code is removed so the (identical) generic prefetching code
can be used instead, a comment is fixed to be proper GPL and not just a
"paste GPL here" token, a "//" comment is converted to "/* */", etc.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
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Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
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Architectures that handle DMA-non-coherent memory need to set
ARCH_KMALLOC_MINALIGN to make sure that kmalloc'ed buffer is DMA-safe:
the buffer doesn't share a cache with the others.
Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Acked-by: Chris Metcalf <cmetcalf@tilera.com>
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Let's use the standard L1_CACHE_ALIGN macro instead.
Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Acked-by: Chris Metcalf <cmetcalf@tilera.com>
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This commit is primarily changes caused by reviewing "sparse"
and "checkpatch" output on our sources, so is somewhat noisy, since
things like "printk() -> pr_err()" (or whatever) throughout the
codebase tend to get tedious to read. Rather than trying to tease
apart precisely which things changed due to which type of code
review, this commit includes various cleanups in the code:
- sparse: Add declarations in headers for globals.
- sparse: Fix __user annotations.
- sparse: Using gfp_t consistently instead of int.
- sparse: removing functions not actually used.
- checkpatch: Clean up printk() warnings by using pr_info(), etc.;
also avoid partial-line printks except in bootup code.
- checkpatch: Use exposed structs rather than typedefs.
- checkpatch: Change some C99 comments to C89 comments.
In addition, a couple of minor other changes are rolled in
to this commit:
- Add support for a "raise" instruction to cause SIGFPE, etc., to be raised.
- Remove some compat code that is unnecessary when we fully eliminate
some of the deprecated syscalls from the generic syscall ABI.
- Update the tile_defconfig to reflect current config contents.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
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This code is used in other places in our system than in Linux, so
to share it we now implement it as an inline function in our low-level
<arch> headers, and instantiate it in one file in Linux's arch/tile/lib.
The file is now cacheflush.c and is C code rather than the strangely-named
and assembler-implemented __invalidate_icache.S.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
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This wasn't properly tested until the perf-event subsystem started
to get brought up under the tile architecture.
The bug caused bogus atomic64_cmpxchg() values to be returned,
among other things.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
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The C file (tile-desc_{32,64}.c) was about 300KB before this change,
and is now shrunk down to 100K. The original file included support
for BFD in the binutils toolchain, which is not necessary in the
kernel; the kernel version only needs to include enough support to
enable the single-stepper and backtracer.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
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This network (the "UDN") connects all the cpus on the chip in a
wormhole-routed dynamic network. Subrectangles of the chip can
be allocated by a "create" ioctl on /dev/hardwall, and then to access the
UDN in that rectangle, tasks must perform an "activate" ioctl on that
same file object after affinitizing themselves to a single cpu in
the region. Sending a wormhole-routed message that tries to leave
that subrectangle causes all activated tasks to receive a SIGILL
(just as they would if they tried to access the UDN without first
activating themselves to a hardwall rectangle).
The original submission of this code to LKML had the driver
instantiated under /proc/tile/hardwall. Now we just use a character
device for this, conventionally /dev/hardwall. Some futures planning
for the TILE-Gx chip suggests that we may want to have other types of
devices that share the general model of "bind a task to a cpu, then
'activate' a file descriptor on a pseudo-device that gives access to
some hardware resource". As such, we are using a device rather
than, for example, a syscall, to set up and activate this code.
As part of this change, the compat_ptr() declaration was fixed and used
to pass the compat_ioctl argument to the normal ioctl. So far we limit
compat code to 2GB, so the difference between zero-extend and sign-extend
(the latter being correct, eventually) had been overlooked.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
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This model is based on the on-chip interrupt model used by the
TILE-Gx next-generation hardware, and interacts much more cleanly
with the Linux generic IRQ layer.
The change includes modifications to the Tilera hypervisor, which
are reflected in the hypervisor headers in arch/tile/include/arch/.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
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It turns out there is some variance on the calling conventions for
these syscalls, and <asm-generic/syscalls.h> is already the mechanism
used to handle this. Switch arch/tile over to using that mechanism and
tweak the calling conventions for a couple of tile syscalls to match
<asm-generic/syscalls.h>.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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Feedback from fujita.tomonori@lab.ntt.co.jp.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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This change is the core kernel support for TILEPro and TILE64 chips.
No driver support (except the console driver) is included yet.
This includes the relevant Linux headers in asm/; the low-level
low-level "Tile architecture" headers in arch/, which are
shared with the hypervisor, etc., and are build-system agnostic;
and the relevant hypervisor headers in hv/.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Reviewed-by: Paul Mundt <lethal@linux-sh.org>
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* 'for-linus' of git://www.jni.nu/cris: (51 commits)
CRIS: Fix alignment problem for older ld
CRIS: Always dump registers for segfaulting process.
CRIS: Add config for pausing a seg-faulting process
CRIS: Don't take faults while in_atomic
CRIS: Fixup lookup for delay slot faults
CRIS: Discard exit.text and .data at runtime
CRIS: Add cache aligned and read mostly data sections
CRIS: Return something from profile write
CRIS: Add ARTPEC-3 and timestamps for sync-serial
CRIS: Better ARTPEC-3 support for gpio
CRIS: Add include guard
CRIS: Better handling of pinmux settings
CRIS: New DMA defines for ARTPEC-3
CRIS: __do_strncpy_from_user: Don't read the byte beyond the nil
CRIS: Pagetable for ARTPEC-3
CRIS: Machine dependent memmap.h
CRIS: Check if pointer is set before using it
CRIS: Machine dependent dma.h
CRIS: Define __read_mostly for CRISv32
CRIS: Discard .note.gnu.build-id section
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CRISv10 uses a pretty old ld, which does not allow ALIGN(0),
(It becomes . = 0;) so instead we align to 1 byte.
Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Put it on a wait queue, so we can attach gdb to the process
to debug it instead of just killing it.
Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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This allows us to handle references from __bug_table.
Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Even if it doesn't matter, we should return something.
Also, clean up some formatting.
Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Add PWM support, correct comment for ARTPEC-3.
Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Depending on eth, eth_mido and geth fields in wr_hwprot, don't set
corresponding pins on gpio port b to gpio mode. This avoids
re-resetting the ethernet PHY should this already have been done.
Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Move the old one to mach-fs and replace with a new one that
only include the correct one for the machine architecture.
Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Move the old one to mach-fs and replace with a new one that
only include the correct one for the machine architecture.
Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Rename to aputs.
Also, simplify code by moving some common code out to macros.
Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Also, make DDR latency configurable.
Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Register number was incorrect in syscalls
that go via the restartblock (e.g, poll).
Signed-off-by: Edgar Iglesias <Edgar.Iglesias@axis.com>
Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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Add standard i2d-devices.
Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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