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* arm64: add hypervisor stubMarc Zyngier2012-12-054-1/+118
| | | | | | | | | | | | If booted in EL2, install an dummy hypervisor whose only purpose is to be replaced by a full fledged one. A minimal API allows to: - obtain the current HYP vectors (__hyp_get_vectors) - set new HYP vectors (__hyp_set_vectors) Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* arm64: record boot mode when entering the kernelMarc Zyngier2012-12-052-3/+73
| | | | | | | | | | | To be able to signal the availability of EL2 to other parts of the kernel, record the boot mode. Once booted, two predicates indicate if HYP mode is available, and if not, whether this is due to a boot mode mismatch or not. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* arm64: move vector entry macro to assembler.hMarc Zyngier2012-12-052-4/+8
| | | | | | | | | | This macro is also useful to other bits defining vectors (hypervisor stub, KVM...). Move it to a common location. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* arm64: add AArch32 execution modes to ptrace.hMarc Zyngier2012-12-051-0/+10
| | | | | Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* arm64: expand register mapping between AArch32 and AArch64Marc Zyngier2012-12-051-2/+19
| | | | | | | | | | | The general purpose registers in AArch32 are mapped in an architecturally defined manner into the AArch64 registers. It allows the AArch32 registers of an application or a virtual machine to be inspected by the OS or an hypervisor. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* arm64: generic timer: use virtual counter instead of physical at EL0Will Deacon2012-12-053-6/+7
| | | | | | | | | | | | | | We want to use the virtual counter at EL0, as the physical counter may not track the current clocksource for guests running under a hypervisor. This patch updates the vdso and generic timer driver to use the virtual counter. The kernel EL2 entry code is also updated to ensure that the virtual offset is initialised to zero. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* arm64: vdso: defer shifting of nanosecond component of timespecWill Deacon2012-12-052-3/+7
| | | | | | | | | | | | | Shifting the nanosecond component of the computed timespec early can lead to sub-ns inaccuracies when using the truncated value as input to further arithmetic for things like conversions to monotonic time. This patch defers the timespec shifting until after the final value has been computed. Reported-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* arm64: vdso: rework __do_get_tspec register allocation and return shiftWill Deacon2012-12-051-44/+44
| | | | | | | | | In preparation for sub-ns precision in the vdso timespec maths, change the __do_get_tspec register allocation so that we return the clocksource shift value instead of the unused xtime tspec. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* arm64: vdso: check sequence counter even for coarse realtime operationsWill Deacon2012-12-051-3/+3
| | | | | | | | | | | | | | | | When returning coarse realtime values from clock_gettime, we must still check the sequence counter to ensure that the kernel does not update the vdso datapage whilst we are loading the coarse timespec as this could potentially result in time appearing to go backwards. This patch delays the coarse realtime check until after we have loaded successfully from the vdso datapage. This does mean that we always load the wtm timespec, but conditionalising the load and adding an extra sequence test is unlikely to buy us anything other than messy code, particularly as the sequence test implies a read barrier. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* arm64: vdso: fix clocksource mask when extracting bottom 56 bitsWill Deacon2012-12-051-1/+1
| | | | | | | | | | | | | The generic timer clocksource has 56 bits of precision and as such must be masked appropriately after we have read it. The current mask generated by a movn instruction is off by 4 bits, so we accidentally include the top 4 bits in the final value. This patch fixes the broken mask. Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* ARM64: Remove incorrect Kconfig symbol HAVE_SPARSE_IRQAlexander Shiyan2012-11-291-1/+0
| | | | | | | | | | | Kernel does not contain symbol HAVE_SPARSE_IRQ. Definition in arch/arm64/Kconfig seems typo because valid symbol is MAY_HAVE_SPARSE_IRQ. In any case SPARSE_IRQ is selected by default and we just remove selecting of this symbol. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* arm64: Make !dirty ptes read-onlyCatalin Marinas2012-11-291-0/+2
| | | | | | | | | The AArch64 Linux port relies on the mm code to wrprotect clean ptes. This however is not the case with newly created ptes and PAGE_SHARED(_EXEC) is writable but !dirty. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Cc: <stable@vger.kernel.org>
* arm64: Convert empty flush_cache_{mm,page} functions to static inlineCatalin Marinas2012-11-232-11/+9
| | | | | | These functions are empty, just make them static inline in the header. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* arm64: signal: let the compiler inline compat_get_sigframeWill Deacon2012-11-231-3/+3
| | | | | | | | There's no reason to mark compat_get_sigframe inline explicitly, so remove the annotation and let the compiler decide what's best. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* arm64: signal: return struct rt_sigframe from get_sigframeWill Deacon2012-11-231-6/+6
| | | | | | | | | We only have one type of frame (rt_sigframe) for arm64, so just return that type directly and dispense with the framesize argument, which is presumably a hangover from code copied from arch/arm/. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* arm64: signal: align return types for compat and native setup_returnWill Deacon2012-11-231-9/+5
| | | | | | | | setup_return is a void function, so make compat_setup_return look the same rather then unconditionally return 0. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* arm64: signal: push the unwinding prologue on the signal stackWill Deacon2012-11-231-21/+16
| | | | | | | | | | | | | | | | | | | | | | | To allow debuggers to unwind through signal frames, we create a fake stack unwinding prologue containing the link register and frame pointer of the interrupted context. The signal frame is then offset by 16 bytes to make room for the two saved registers which are pushed onto the frame of the *interrupted* context, rather than placed directly above the signal stack. This doesn't work when an alternative signal stack is set up for a SEGV handler, which is raised in response to RLIMIT_STACK being reached. In this case, we try to push the unwinding prologue onto the full stack and subsequently take a fault which we fail to resolve, causing setup_return to return -EFAULT and handle_signal to force_sigsegv on the current task. This patch fixes the problem by including the unwinding prologue as part of the rt_sigframe definition, which is populated during setup_sigframe, ensuring that it always ends up on the signal stack. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Cc: <stable@vger.kernel.org>
* arm64: Include the clkdev.h generic headerCatalin Marinas2012-11-231-0/+1
| | | | | | | | This patch updates the arm64 asm/Kbuild file to include the clkdev.h generic header. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Viresh Kumar <Viresh.kumar@linaro.org>
* arm64: Force use of common clk at architecture levelDeepak Saxena2012-11-201-0/+1
| | | | | | | | | Force all platforms to use the common clk framework to ensure that we do not end up with platform-specific implementations ala ARM32. Signed-off-by: Deepak Saxena <dsaxena@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* Merge branch 'execve' into upstreamCatalin Marinas2012-11-197-52/+25
|\ | | | | | | | | * execve: arm64: get rid of fork/vfork/clone wrappers
| * Merge remote-tracking branch 'viro/arch-arm64' into execveCatalin Marinas2012-11-197-52/+25
| |\ | | | | | | | | | | | | * viro/arch-arm64: arm64: get rid of fork/vfork/clone wrappers
| | * Merge commit '6ba1bc826d160fe4f32bcb188687dcca4bdfaf3d' into arch-arm64Al Viro2012-11-17514-4966/+5691
| | |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | Backmerge from mainline commit that introduced a trivial conflict in arch/arm64/kernel/process.c - a bunch of functions removed next to the place where kernel_thread() used to be. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
| | * | arm64: get rid of fork/vfork/clone wrappersAl Viro2012-10-237-52/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [fixes from Catalin Marinas folded] Acked-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
* | | | Merge branch 'execve' into upstreamCatalin Marinas2012-11-1410-157/+33
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | * execve: arm64: Use generic sys_execve() implementation arm64: Use generic kernel_execve() implementation arm64: Use generic kernel_thread() implementation
| * | | Merge tag 'v3.7-rc5' into execveCatalin Marinas2012-11-13562-5114/+6050
| |\ \ \ | | |/ / | |/| | | | | | | | | | | | | | | | | | Linux 3.7-rc5 Conflicts: arch/arm64/kernel/process.c
| * | | arm64: Use generic sys_execve() implementationCatalin Marinas2012-10-177-54/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch converts the arm64 port to use the generic sys_execve() implementation removing the arm64-specific (compat_)sys_execve_wrapper() functions. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | | arm64: Use generic kernel_execve() implementationCatalin Marinas2012-10-173-44/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables CONFIG_GENERIC_KERNEL_EXECVE on arm64 and removes the arm64-specific implementation of kernel_execve(). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | | arm64: Use generic kernel_thread() implementationCatalin Marinas2012-10-174-59/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables CONFIG_GENERIC_KERNEL_THREAD on arm64, changes copy_threads to cope with kernel threads creation and adapts ret_from_fork accordingly. The arm64-specific kernel_thread implementation is no longer needed. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* | | | arm64: mm: update max_dma32 before calculating size of NORMAL zoneWill Deacon2012-11-141-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit f483a853b0b9 ("arm64: mm: fix booting on systems with no memory below 4GB") sets max_dma32 to the minimum of the maximum pfn and MAX_DMA32_PFN. This value is later used as the base of the NORMAL zone, which is incorrect when MAX_DMA32_PFN is below the minimum pfn (i.e. all memory is above 4GB). This patch fixes the problem by ensuring that max_dma32 is always set to the end of the DMA32 zone. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* | | | arm64: Make the user fault reporting more specificCatalin Marinas2012-11-141-2/+11
| |/ / |/| | | | | | | | | | | | | | | | | | | | For user space faults the kernel reports "unhandled page fault" and it gives the ESR value. With this patch the error message looked up in the fault info array to give a better description. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* | | Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparcLinus Torvalds2012-11-1034-84/+280
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull sparc fixes from David Miller: "Several build/bug fixes for sparc, including: 1) Configuring a mix of static vs. modular sparc64 crypto modules didn't work, remove an ill-conceived attempt to only have to build the device match table for these drivers once to fix the problem. Reported by Meelis Roos. 2) Make the montgomery multiple/square and mpmul instructions actually usable in 32-bit tasks. Essentially this involves providing 32-bit userspace with a way to use a 64-bit stack when it needs to. 3) Our sparc64 atomic backoffs don't yield cpu strands properly on Niagara chips. Use pause instruction when available to achieve this, otherwise use a benign instruction we know blocks the strand for some time. 4) Wire up kcmp 5) Fix the build of various drivers by removing the unnecessary blocking of OF_GPIO when SPARC. 6) Fix unintended regression wherein of_address_to_resource stopped being provided. Fix from Andreas Larsson. 7) Fix NULL dereference in leon_handle_ext_irq(), also from Andreas Larsson." * git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc: sparc64: Fix build with mix of modular vs. non-modular crypto drivers. sparc: Support atomic64_dec_if_positive properly. of/address: sparc: Declare of_address_to_resource() as an extern function for sparc again sparc32, leon: Check for existent irq_map entry in leon_handle_ext_irq sparc: Add sparc support for platform_get_irq() sparc: Allow OF_GPIO on sparc. qlogicpti: Fix build warning. sparc: Wire up sys_kcmp. sparc64: Improvde documentation and readability of atomic backoff code. sparc64: Use pause instruction when available. sparc64: Fix cpu strand yielding. sparc64: Make montmul/montsqr/mpmul usable in 32-bit threads.
| * | | sparc64: Fix build with mix of modular vs. non-modular crypto drivers.David S. Miller2012-11-109-8/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We tried linking in a single built object to hold the device table, but only works if all of the sparc64 crypto modules get built the same way (modular vs. non-modular). Just include the device ID stub into each driver source file so that the table gets compiled into the correct result in all cases. Reported-by: Meelis Roos <mroos@linux.ee> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | sparc: Support atomic64_dec_if_positive properly.David S. Miller2012-11-104-2/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sparc32 already supported it, as a consequence of using the generic atomic64 implementation. And the sparc64 implementation is rather trivial. This allows us to set ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE for all of sparc, and avoid the annoying warning from lib/atomic64_test.c Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | of/address: sparc: Declare of_address_to_resource() as an extern function ↵Andreas Larsson2012-11-101-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | for sparc again This bug-fix makes sure that of_address_to_resource is defined extern for sparc so that the sparc-specific implementation of of_address_to_resource() is once again used when including include/linux/of_address.h in a sparc context. A number of drivers in mainline relies on this function working for sparc. The bug was introduced in a850a7554442f08d3e910c6eeb4ee216868dda1e, "of/address: add empty static inlines for !CONFIG_OF". Contrary to that commit title, the static inlines are added for !CONFIG_OF_ADDRESS, and CONFIG_OF_ADDRESS is never defined for sparc. This is good behavior for the other functions in include/linux/of_address.h, as the extern functions defined in drivers/of/address.c only gets linked when OF_ADDRESS is configured. However, for of_address_to_resource there exists a sparc-specific implementation in arch/sparc/arch/sparc/kernel/of_device_common.c Solution suggested by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Andreas Larsson <andreas@gaisler.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | sparc32, leon: Check for existent irq_map entry in leon_handle_ext_irqAndreas Larsson2012-11-101-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If an irq is being unlinked concurrently with leon_handle_ext_irq, irq_map[eirq] might be null in leon_handle_ext_irq. Make sure that this is not dereferenced. Signed-off-by: Andreas Larsson <andreas@gaisler.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | sparc: Wire up sys_kcmp.David S. Miller2012-10-283-3/+5
| | | | | | | | | | | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | sparc64: Improvde documentation and readability of atomic backoff code.David S. Miller2012-10-285-10/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Document what's going on in asm/backoff.h with a large and descriptive comment. Refer to it above the cpu_relax() definition in asm/processor_64.h Rename the pause patching section to have "3insn" in it's name like the other patching sections do. Based upon feedback from Sam Ravnborg. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | sparc64: Use pause instruction when available.David S. Miller2012-10-285-16/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In atomic backoff and cpu_relax(), use the pause instruction found on SPARC-T4 and later. It makes the cpu strand unselectable for the given number of cycles, unless an intervening disrupting trap occurs. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | sparc64: Fix cpu strand yielding.David S. Miller2012-10-282-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For atomic backoff, we just loop over an exponentially backed off counter. This is extremely ineffective as it doesn't actually yield the cpu strand so that other competing strands can use the cpu core. In cpus previous to SPARC-T4 we have to do this in a slightly hackish way, by doing an operation with no side effects that also happens to mark the strand as unavailable. The mechanism we choose for this is three reads of the %ccr (condition-code) register into %g0 (the zero register). SPARC-T4 has an explicit "pause" instruction, and we'll make use of that in a subsequent commit. Yield strands also in cpu_relax(). We really should have done this a very long time ago. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | | sparc64: Make montmul/montsqr/mpmul usable in 32-bit threads.David S. Miller2012-10-2713-61/+117
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Montgomery Multiply, Montgomery Square, and Multiple-Precision Multiply instructions work by loading a combination of the floating point and multiple register windows worth of integer registers with the inputs. These values are 64-bit. But for 32-bit userland processes we only save the low 32-bits of each integer register during a register spill. This is because the register window save area is in the user stack and has a fixed layout. Therefore, the only way to use these instruction in 32-bit mode is to perform the following sequence: 1) Load the top-32bits of a choosen integer register with a sentinel, say "-1". This will be in the outer-most register window. The idea is that we're trying to see if the outer-most register window gets spilled, and thus the 64-bit values were truncated. 2) Load all the inputs for the montmul/montsqr/mpmul instruction, down to the inner-most register window. 3) Execute the opcode. 4) Traverse back up to the outer-most register window. 5) Check the sentinel, if it's still "-1" store the results. Otherwise retry the entire sequence. This retry is extremely troublesome. If you're just unlucky and an interrupt or other trap happens, it'll push that outer-most window to the stack and clear the sentinel when we restore it. We could retry forever and never make forward progress if interrupts arrive at a fast enough rate (consider perf events as one example). So we have do limited retries and fallback to software which is extremely non-deterministic. Luckily it's very straightforward to provide a mechanism to let 32-bit applications use a 64-bit stack. Stacks in 64-bit mode are biased by 2047 bytes, which means that the lowest bit is set in the actual %sp register value. So if we see bit zero set in a 32-bit application's stack we treat it like a 64-bit stack. Runtime detection of such a facility is tricky, and cumbersome at best. For example, just trying to use a biased stack and seeing if it works is hard to recover from (the signal handler will need to use an alt stack, plus something along the lines of longjmp). Therefore, we add a system call to report a bitmask of arch specific features like this in a cheap and less hairy way. With help from Andy Polyakov. Signed-off-by: David S. Miller <davem@davemloft.net>
* | | | Merge tag 'arm64-fixes' of ↵Linus Torvalds2012-11-1010-41/+14
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64 Pull arm64 fixes from Catalin Marinas: - correct argument type (pgprot_t) when calling __ioremap() - PCI_IOBASE virtual address change - use architected event for CPU cycle counter - fix ELF core dumping - select CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION - missing completion for secondary CPU boot - booting on systems with all memory beyond 4GB * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64: arm64: mm: fix booting on systems with no memory below 4GB arm64: smp: add missing completion for secondary boot arm64: compat: select CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION arm64: elf: fix core dumping definitions for GP and FP registers arm64: perf: use architected event for CPU cycle counter arm64: Move PCI_IOBASE closer to MODULES_VADDR arm64: Use pgprot_t as the last argument when invoking __ioremap()
| * | | | arm64: mm: fix booting on systems with no memory below 4GBWill Deacon2012-11-082-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Booting on a system with all of its memory above the 4GB boundary breaks for two reasons: (1) We still try to create a non-empty DMA32 zone (2) no-bootmem limits allocations to 0xffffffff This patch fixes these issues for ARM64. Tested-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | | | arm64: smp: add missing completion for secondary bootWill Deacon2012-11-081-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 149c24151e85 ("ARM: SMP: use a timing out completion for cpu hotplug") modified arm's CPU up path to use completions. It seems that we only got half of this patch for arm64, so add the missing call to complete. Reported-by: Jon Brawn <jon.brawn@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | | | arm64: compat: select CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSIONWill Deacon2012-11-082-1/+1
| | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit c1d7e01d7877 ("ipc: use Kconfig options for __ARCH_WANT_[COMPAT_]IPC_PARSE_VERSION") replaced the __ARCH_WANT_COMPAT_IPC_PARSE_VERSION token with a corresponding Kconfig option instead. This patch updates arm64 to use the latter, rather than #define an unused token. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | | arm64: elf: fix core dumping definitions for GP and FP registersWill Deacon2012-11-083-25/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | struct user_fp does not exist for arm64, so use struct user_fpsimd_state instead for the ELF core dumping definitions. Furthermore, since we use regset-based core dumping, we do not need definitions for dump_task_regs and dump_fpu. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | | arm64: perf: use architected event for CPU cycle counterWill Deacon2012-11-081-8/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We currently use a fake event encoding (0xFF) to indicate CPU cycles so that we don't waste an event counter and can target the hardware cycle counter instead. The problem with this approach is that the event space defined by the architecture permits an implementation to allocate 0xFF for some other event. This patch uses the architected cycle counter encoding (0x11) so that we avoid potentially clashing with event encodings on future CPU implementations. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | | Merge tag 'v3.7-rc4' into upstream-masterCatalin Marinas2012-11-05165-1244/+1652
| |\ \ \ | | | | | | | | | | | | | | | Linux 3.7-rc4
| * | | | arm64: Move PCI_IOBASE closer to MODULES_VADDRCatalin Marinas2012-10-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is to reuse the same pmd table that is sparsely populated with the modules space. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | | | arm64: Use pgprot_t as the last argument when invoking __ioremap()Catalin Marinas2012-10-231-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Even if it works with since the types have the same size, the correct type of the last __ioremap() argument is pgprot_t rather than pteval_t. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* | | | | Merge tag 'stable/for-linus-3.7-rc5-tag' of ↵Linus Torvalds2012-11-102-14/+18
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen Pull Xen fixes from Konrad Rzeszutek Wilk: "There are three ARM compile fixes (we forgot to export certain functions and if the drivers are built as an module - we go belly-up). There is also an mismatch of irq_enter() / exit_idle() calls sequence which were fixed some time ago in other piece of codes, but failed to appear in the Xen code. Lastly a fix for to help in the field with troubleshooting in case we cannot get the appropriate parameter and also fallback code when working with very old hypervisors." Bug-fixes: - Fix compile issues on ARM. - Fix hypercall fallback code for old hypervisors. - Print out which HVM parameter failed if it fails. - Fix idle notifier call after irq_enter. * tag 'stable/for-linus-3.7-rc5-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen: xen/arm: Fix compile errors when drivers are compiled as modules (export more). xen/arm: Fix compile errors when drivers are compiled as modules. xen/generic: Disable fallback build on ARM. xen/events: fix RCU warning, or Call idle notifier after irq_enter() xen/hvm: If we fail to fetch an HVM parameter print out which flag it is. xen/hypercall: fix hypercall fallback code for very old hypervisors
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