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* cris: nand: use the mtd instance embedded in struct nand_chipBoris BREZILLON2015-12-182-4/+2
| | | | | | | | | | struct nand_chip now embeds an mtd device. Patch all drivers to make use of this mtd instance instead of using the instance embedded in their private struct or dynamically allocated. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
*-----. Merge arch/{arm,blackfin,cris,mips}/ refactoring patches into MTD devBrian Norris2015-12-0818-22/+22
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These patches may also get merged by other arch/ maintainers, so I've based them on 4.4-rc1 instead of the latest MTD development. Bring them in now. Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| | | | * mips: nand: make use of mtd_to_nand() where appropriateBoris BREZILLON2015-12-085-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mtd_to_nand() was recently introduced to avoid direct accesses to the mtd->priv field. Update all MIPS specific implementations to use this helper. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| | | * | cris: nand: make use of mtd_to_nand() where appropriateBoris BREZILLON2015-12-082-2/+2
| | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mtd_to_nand() was recently introduced to avoid direct accesses to the mtd->priv field. Update all CRIS specific implementations to use this helper. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| | * / blackfin: nand: make use of mtd_to_nand() where appropriateBoris BREZILLON2015-12-082-2/+2
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | mtd_to_nand() was recently introduced to avoid direct accesses to the mtd->priv field. Update all blackfin specific implementations to use this helper. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * / ARM: nand: make use of mtd_to_nand() where appropriateBoris BREZILLON2015-12-089-13/+13
| |/ | | | | | | | | | | | | | | | | mtd_to_nand() was recently introduced to avoid direct accesses to the mtd->priv field. Update all ARM specific implementations to use this helper. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* / sh: nand: make use of mtd_to_nand() where appropriateBoris BREZILLON2015-12-081-1/+1
|/ | | | | | | | | mtd_to_nand() was recently introduced to avoid direct accesses to the mtd->priv field. Update all SH specific implementations to use this helper. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* Merge branch 'perf-urgent-for-linus' of ↵Linus Torvalds2015-11-151-6/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull perf updates from Thomas Gleixner: "Mostly updates to the perf tool plus two fixes to the kernel core code: - Handle tracepoint filters correctly for inherited events (Peter Zijlstra) - Prevent a deadlock in perf_lock_task_context (Paul McKenney) - Add missing newlines to some pr_err() calls (Arnaldo Carvalho de Melo) - Print full source file paths when using 'perf annotate --print-line --full-paths' (Michael Petlan) - Fix 'perf probe -d' when just one out of uprobes and kprobes is enabled (Wang Nan) - Add compiler.h to list.h to fix 'make perf-tar-src-pkg' generated tarballs, i.e. out of tree building (Arnaldo Carvalho de Melo) - Add the llvm-src-base.c and llvm-src-kbuild.c files, generated by the 'perf test' LLVM entries, when running it in-tree, to .gitignore (Yunlong Song) - libbpf error reporting improvements, using a strerror interface to more precisely tell the user about problems with the provided scriptlet, be it in C or as a ready made object file (Wang Nan) - Do not be case sensitive when searching for matching 'perf test' entries (Arnaldo Carvalho de Melo) - Inform the user about objdump failures in 'perf annotate' (Andi Kleen) - Improve the LLVM 'perf test' entry, introduce a new ones for BPF and kbuild tests to check the environment used by clang to compile .c scriptlets (Wang Nan)" * 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (32 commits) perf/x86/intel/rapl: Remove the unused RAPL_EVENT_DESC() macro tools include: Add compiler.h to list.h perf probe: Verify parameters in two functions perf session: Add missing newlines to some pr_err() calls perf annotate: Support full source file paths for srcline fix perf test: Add llvm-src-base.c and llvm-src-kbuild.c to .gitignore perf: Fix inherited events vs. tracepoint filters perf: Disable IRQs across RCU RS CS that acquires scheduler lock perf test: Do not be case sensitive when searching for matching tests perf test: Add 'perf test BPF' perf test: Enhance the LLVM tests: add kbuild test perf test: Enhance the LLVM test: update basic BPF test program perf bpf: Improve BPF related error messages perf tools: Make fetch_kernel_version() publicly available bpf tools: Add new API bpf_object__get_kversion() bpf tools: Improve libbpf error reporting perf probe: Cleanup find_perf_probe_point_from_map to reduce redundancy perf annotate: Inform the user about objdump failures in --stdio perf stat: Make stat options global perf sched latency: Fix thread pid reuse issue ...
| * perf/x86/intel/rapl: Remove the unused RAPL_EVENT_DESC() macroHuang Rui2015-11-121-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Huang Rui <ray.huang@amd.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Borislav Petkov <bp@suse.de> Cc: Dasaratharaman Chandramouli <dasaratharaman.chandramouli@intel.com> Cc: Fengguang Wu <fengguang.wu@intel.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Tony Li <tony.li@amd.com> Link: http://lkml.kernel.org/r/1446630233-3166-1-git-send-email-ray.huang@amd.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
* | Merge branch 'x86-urgent-for-linus' of ↵Linus Torvalds2015-11-159-16/+73
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 fixes from Thomas Gleixner: "A couple of fixes and updates related to x86: - Fix the W+X check regression on XEN - The real fix for the low identity map trainwreck - Probe legacy PIC early instead of unconditionally allocating legacy irqs - Add cpu verification to long mode entry - Adjust the cache topology to AMD Fam17H systems - Let Merrifield use the TSC across S3" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/cpu: Call verify_cpu() after having entered long mode too x86/setup: Fix low identity map for >= 2GB kernel range x86/mm: Skip the hypervisor range when walking PGD x86/AMD: Fix last level cache topology for AMD Fam17h systems x86/irq: Probe for PIC presence before allocating descs for legacy IRQs x86/cpu/intel: Enable X86_FEATURE_NONSTOP_TSC_S3 for Merrifield
| * | x86/cpu: Call verify_cpu() after having entered long mode tooBorislav Petkov2015-11-072-5/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we get loaded by a 64-bit bootloader, kernel entry point is startup_64 in head_64.S. We don't trust any and all bootloaders because some will fiddle with CPU configuration so we go ahead and massage each CPU into sanity again. For example, some dell BIOSes have this XD disable feature which set IA32_MISC_ENABLE[34] and disable NX. This might be some dumb workaround for other OSes but Linux sure doesn't need it. A similar thing is present in the Surface 3 firmware - see https://bugzilla.kernel.org/show_bug.cgi?id=106051 - which sets this bit only on the BSP: # rdmsr -a 0x1a0 400850089 850089 850089 850089 I know, right?! There's not even an off switch in there. So fix all those cases by sanitizing the 64-bit entry point too. For that, make verify_cpu() callable in 64-bit mode also. Requested-and-debugged-by: "H. Peter Anvin" <hpa@zytor.com> Reported-and-tested-by: Bastien Nocera <bugzilla@hadess.net> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: Matt Fleming <matt@codeblueprint.co.uk> Cc: Peter Zijlstra <peterz@infradead.org> Cc: stable@vger.kernel.org Link: http://lkml.kernel.org/r/1446739076-21303-1-git-send-email-bp@alien8.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * | x86/setup: Fix low identity map for >= 2GB kernel rangeKrzysztof Mazur2015-11-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit f5f3497cad8c extended the low identity mapping. However, if the kernel uses more than 2 GB (VMSPLIT_2G_OPT or VMSPLIT_1G memory split), the normal memory mapping is overwritten by the low identity mapping causing a crash. To avoid overwritting, limit the low identity map to cover only memory before kernel range (PAGE_OFFSET). Fixes: f5f3497cad8c "x86/setup: Extend low identity map to cover whole kernel range Signed-off-by: Krzysztof Mazur <krzysiek@podlesie.net> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Borislav Petkov <bp@alien8.de> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Matt Fleming <matt.fleming@intel.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: stable@vger.kernel.org Link: http://lkml.kernel.org/r/1446815916-22105-1-git-send-email-krzysiek@podlesie.net Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * | x86/mm: Skip the hypervisor range when walking PGDBoris Ostrovsky2015-11-071-1/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The range between 0xffff800000000000 and 0xffff87ffffffffff is reserved for hypervisor and therefore we should not try to follow PGD's indexes corresponding to those addresses. While this has always been a problem, with the new W+X warning mechanism ptdump_walk_pgd_level_core() can now be called during boot, causing a PV Xen guest to crash. [ tglx: Replaced the macro with a readable inline ] Fixes: e1a58320a38d "x86/mm: Warn on W^X mappings" Reported-by: Sander Eikelenboom <linux@eikelenboom.it> Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com> Cc: xen-devel@lists.xen.org Link: http://lkml.kernel.org/r/1446749795-27764-1-git-send-email-boris.ostrovsky@oracle.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * | x86/AMD: Fix last level cache topology for AMD Fam17h systemsAravind Gopalakrishnan2015-11-071-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On AMD Fam17h systems, the last level cache is not resident in the northbridge. Therefore, we cannot assign cpu_llc_id to the same value as Node ID as we have been doing until now. We should rather look at the ApicID bits of the core to provide us the last level cache ID info. Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Huang Rui <ray.huang@amd.com> Cc: Ingo Molnar <mingo@kernel.org> Cc: Jacob Shin <jacob.w.shin@gmail.com> Link: http://lkml.kernel.org/r/1446582899-9378-1-git-send-email-Aravind.Gopalakrishnan@amd.com Signed-off-by: Borislav Petkov <bp@suse.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * | x86/irq: Probe for PIC presence before allocating descs for legacy IRQsVitaly Kuznetsov2015-11-073-9/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit d32932d02e18 ("x86/irq: Convert IOAPIC to use hierarchical irqdomain interfaces") brought a regression for Hyper-V Gen2 instances. These instances don't have i8259 legacy PIC but they use legacy IRQs for serial port, rtc, and acpi. With this commit included we end up with these IRQs not initialized. Earlier, there was a special workaround for legacy IRQs in mp_map_pin_to_irq() doing mp_irqdomain_map() without looking at nr_legacy_irqs() and now we fail in __irq_domain_alloc_irqs() when irq_domain_alloc_descs() returns -EEXIST. The essence of the issue seems to be that early_irq_init() calls arch_probe_nr_irqs() to figure out the number of legacy IRQs before we probe for i8259 and gets 16. Later when init_8259A() is called we switch to NULL legacy PIC and nr_legacy_irqs() starts to return 0 but we already have 16 descs allocated. Solve the issue by separating i8259 probe from init and calling it in arch_probe_nr_irqs() before we actually use nr_legacy_irqs() information. Fixes: d32932d02e18 ("x86/irq: Convert IOAPIC to use hierarchical irqdomain interfaces") Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: K. Y. Srinivasan <kys@microsoft.com> Cc: stable@vger.kernel.org Link: http://lkml.kernel.org/r/1446543614-3621-1-git-send-email-vkuznets@redhat.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * | x86/cpu/intel: Enable X86_FEATURE_NONSTOP_TSC_S3 for MerrifieldAndy Shevchenko2015-11-071-0/+1
| |/ | | | | | | | | | | | | | | | | | | | | The Intel Merrifield SoC is a successor of the Intel MID line of SoCs. Let's set the neccessary capability for that chip. See commit c54fdbb2823d (x86: Add cpu capability flag X86_FEATURE_NONSTOP_TSC_S3) for the details. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: http://lkml.kernel.org/r/1444319786-36125-1-git-send-email-andriy.shevchenko@linux.intel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2015-11-15147-746/+4472
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MIPS updates from Ralf Baechle: "These are the highlists of the main MIPS pull request for 4.4: - Add latencytop support - Support appended DTBs - VDSO support and initially use it for gettimeofday. - Drop the .MIPS.abiflags and ELF NOTE sections from vmlinux - Support for the 5KE, an internal test core. - Switch all MIPS platfroms to libata drivers. - Improved support, cleanups for ralink and Lantiq platforms. - Support for the new xilfpga platform. - A number of DTB improvments for BMIPS. - Improved support for CM and CPS. - Minor JZ4740 and BCM47xx enhancements" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (120 commits) MIPS: idle: add case for CPU_5KE MIPS: Octeon: Support APPENDED_DTB MIPS: vmlinux: create a section for appended DTB MIPS: Clean up compat_siginfo_t MIPS: Fix PAGE_MASK definition MIPS: BMIPS: Enable GZIP ramdisk and timed printks MIPS: Add xilfpga defconfig MIPS: xilfpga: Add mipsfpga platform code MIPS: xilfpga: Add xilfpga device tree files. dt-bindings: MIPS: Document xilfpga bindings and boot style MIPS: Make MIPS_CMDLINE_DTB default MIPS: Make the kernel arguments from dtb available MIPS: Use USE_OF as the guard for appended dtb MIPS: BCM63XX: Use pr_* instead of printk MIPS: Loongson: Cleanup CONFIG_LOONGSON_SUSPEND. MIPS: lantiq: Disable xbar fpi burst mode MIPS: lantiq: Force the crossbar to big endian MIPS: lantiq: Initialize the USB core on boot MIPS: lantiq: Return correct value for fpi clock on ar9 MIPS: ralink: Add missing clock on rt305x ...
| * \ Merge branch '4.3-fixes' into mips-for-linux-nextRalf Baechle2015-11-125-4/+26
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| | * | MIPS: OCTEON: omit ELF NOTE segmentsDavid Daney2015-11-101-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OCTEON Pre-SDK-1.8.1 bootloaders can not handle PT_NOTE program headers, so do not emit them. Before the patch: $ readelf --program-headers octeon-vmlinux Elf file type is EXEC (Executable file) Entry point 0xffffffff815d09d0 There are 2 program headers, starting at offset 64 Program Headers: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flags Align LOAD 0x0000000000001000 0xffffffff81100000 0xffffffff81100000 0x0000000000b57f80 0x0000000001b86360 RWE 1000 NOTE 0x00000000004e02e0 0xffffffff815df2e0 0xffffffff815df2e0 0x0000000000000024 0x0000000000000024 R 4 After the patch: $ readelf --program-headers octeon-vmlinux Elf file type is EXEC (Executable file) Entry point 0xffffffff815d09d0 There are 1 program headers, starting at offset 64 Program Headers: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flags Align LOAD 0x0000000000001000 0xffffffff81100000 0xffffffff81100000 0x0000000000b57f80 0x0000000001b86360 RWE 1000 The patch was tested on DSR-1000N router. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Matthew Fortune <Matthew.Fortune@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11403/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * | MIPS: vmlinux: discard .MIPS.abiflagsAaro Koskinen2015-11-101-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Discard .MIPS.abiflags from vmlinux. It's not needed and will cause issues e.g. with old OCTEON bootloaders that cannot tolerate additional program headers. Before the patch: $ readelf --program-headers octeon-vmlinux Elf file type is EXEC (Executable file) Entry point 0xffffffff815d09d0 There are 3 program headers, starting at offset 64 Program Headers: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flags Align ABIFLAGS 0x00000000005e77f0 0xffffffff816e67f0 0xffffffff816e67f0 0x0000000000000018 0x0000000000000018 R 8 LOAD 0x0000000000001000 0xffffffff81100000 0xffffffff81100000 0x0000000000b57f80 0x0000000001b86360 RWE 1000 NOTE 0x00000000004e02e0 0xffffffff815df2e0 0xffffffff815df2e0 0x0000000000000024 0x0000000000000024 R 4 After the patch: $ readelf --program-headers octeon-vmlinux Elf file type is EXEC (Executable file) Entry point 0xffffffff815d09d0 There are 2 program headers, starting at offset 64 Program Headers: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flags Align LOAD 0x0000000000001000 0xffffffff81100000 0xffffffff81100000 0x0000000000b57f80 0x0000000001b86360 RWE 1000 NOTE 0x00000000004e02e0 0xffffffff815df2e0 0xffffffff815df2e0 0x0000000000000024 0x0000000000000024 R 4 Suggested-by: Matthew Fortune <matthew.fortune@imgtec.com> Suggested-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: linux-mips@linux-mips.org Cc: David Daney <ddaney.cavm@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/11402/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * | MIPS: Switch BMIPS5000 to use r4k_wait_irqoff()Petri Gynther2015-11-091-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BCM7425 CPU Interface Zephyr Processor, pages 5-309 and 5-310 BCM7428B0 CPU Interface Zephyr Processor, pages 5-337 and 5-338 WAIT instruction: Thread enters wait state. No instructions are executed until an interrupt occurs. The processor's clocks are stopped if both threads are in idle mode. Description: Execution of this instruction puts the thread into wait state, an idle mode in which no instructions are fetched or executed. The thread remains in wait state until an interrupt occurs that is not masked by the interrupt mask field in the Status register. Then, if interrupts are enabled by the IE bit in the Status register, the interrupt is serviced. The ERET instruction returns to the instruction following the WAIT instruction. If interrupts are disabled, the processor resumes executing instructions with the next sequential instruction. Programming notes: The WAIT instruction should be executed while interrupts are disabled by the IE bit in the Status register. This avoids a potential timing hazard, which occurs if an interrupt is taken between testing the counter and executing the WAIT instruction. In this hazard case, the interrupt will have been completed before the WAIT instruction is executed, so the processor will remain indefinitely in wait state until the next interrupt. Signed-off-by: Petri Gynther <pgynther@google.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Cc: cernekee@gmail.com Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11322/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * | MIPS: add nmi_enter() + nmi_exit() to nmi_exception_handler()Petri Gynther2015-11-091-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to enter NMI context when NMI interrupt fires. Signed-off-by: Petri Gynther <pgynther@google.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11323/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * | MIPS: CDMM: Add builtin_mips_cdmm_driver() macroJames Hogan2015-11-051-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add helper macro builtin_mips_cdmm_driver() for builtin CDMM drivers that don't do anything special in init and have no exit. The module_mips_cdmm_driver() helper isn't really appropriate for drivers that can't be built as a module. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jiri Slaby <jslaby@suse.com> Cc: linux-mips@linux-mips.org Cc: <stable@vger.kernel.org> # 4.2.x- Patchwork: http://patchwork.linux-mips.org/patch/11264/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * | MIPS: lantiq: add clk_round_rate()Hauke Mehrtens2015-10-261-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a basic implementation of clk_round_rate() The clk_round_rate() function is called by multiple drivers and subsystems now and the lantiq clk driver is supposed to export this, but doesn't do so, this causes linking problems like this one: ERROR: "clk_round_rate" [drivers/media/v4l2-core/videodev.ko] undefined! Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: John Crispin <blogic@openwrt.org> Cc: <stable@vger.kernel.org> # 4.1+ Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11358/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * | MIPS: atomic: Fix comment describing atomic64_add_unless's return value.Ralf Baechle2015-10-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Fixes: f24219b4e90cf70ec4a211b17fbabc725a0ddf3c (cherry picked from commit f0a232cde7be18a207fd057dd79bbac8a0a45dec)
| * | | MIPS: idle: add case for CPU_5KEAurelien Jarno2015-11-121-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While the 5KE processors have never been taped out, they exists though a CP0.PRId and experimental RTLs or QEMU implementations. Add a case entry in the idle code, as they can use the standard idle loop like the 5K processors. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11099/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: Octeon: Support APPENDED_DTBAaro Koskinen2015-11-121-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use appended DTB when available. Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11115/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: vmlinux: create a section for appended DTBAaro Koskinen2015-11-123-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For bootloaders that support booting only ELF kernels and load only ELF segments to memory there is no easy way to supply DTB without kernel recompilation. For that purpose, create a section called .appended_dtb that can be later updated with board-specific DTB using binutils e.g. at kernel installation time. Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11114/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: Clean up compat_siginfo_tAmanieu d'Antras2015-11-121-28/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While mips can't use the generic compat_siginfo_t directly because its si_code and si_errno are inverted, we can still make it as close to the generic version as possible. This makes it easier to update when new members are added to siginfo_t. The main changes are adding a missing _sigsys union member and eliminating the unused _irix_sigchld one. Signed-off-by: Amanieu d'Antras <amanieu@gmail.com> Cc: linux-kernel@vger.kernel.org Cc: Oleg Nesterov <oleg@redhat.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11455/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: Fix PAGE_MASK definitionDan Williams2015-11-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make PAGE_MASK an unsigned long, like it is on x86, to avoid: In file included from arch/mips/kernel/asm-offsets.c:14:0: include/linux/mm.h: In function '__pfn_to_pfn_t': include/linux/mm.h:1050:2: warning: left shift count >= width of type pfn_t pfn_t = { .val = pfn | (flags & PFN_FLAGS_MASK), }; ...where PFN_FLAGS_MASK is: #define PFN_FLAGS_MASK (~PAGE_MASK << (BITS_PER_LONG - PAGE_SHIFT)) Signed-off-by: Dan Williams <dan.j.williams@intel.com> Cc: ross.zwisler@linux.intel.com Cc: hch@lst.de Cc: linux-mips@linux-mips.org Cc: linux-nvdimm@lists.01.org Cc: linux-kernel@vger.kernel.org Cc: linux-mm@kvack.org Patchwork: https://patchwork.linux-mips.org/patch/11280/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: BMIPS: Enable GZIP ramdisk and timed printksFlorian Fainelli2015-11-112-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update bmips_be_defconfig and bmips_stb_defconfig to have GZIP ramdisk support enabled by default as well was timed printks. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Kevin Cernekee <cernekee@gmail.com> Reviewed-by: Dragan Stancevic <dragan.stancevic@gmail.com> Cc: linux-mips@linux-mips.org Cc: blogic@openwrt.org Cc: jogo@openwrt.org Patchwork: https://patchwork.linux-mips.org/patch/11307/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: Add xilfpga defconfigZubair Lutfullah Kakakhel2015-11-111-0/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add defconfig for MIPSfpga Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Cc: robh+dt@kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/11363/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: xilfpga: Add mipsfpga platform codeZubair Lutfullah Kakakhel2015-11-119-0/+184
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The xilfpga platform will be DT only. Add required platform code. DT files have already been added separately. Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Cc: robh+dt@kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/11364/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: xilfpga: Add xilfpga device tree files.Zubair Lutfullah Kakakhel2015-11-114-0/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add device tree files for the MIPSfpga platform. See Documentation/devicetree/bindings/mips/img/xilfpga.txt for details about MIPSfpga Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Cc: robh+dt@kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/11362/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: Make MIPS_CMDLINE_DTB defaultJonas Gorski2015-11-116-7/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Seval of-enabled machines (bmips, lantiq, xlp, pistachio, ralink) copied the arguments from dtb to arcs_command_line to prevent the kernel from overwriting them. Since there is now an option to keep the dtb arguments, default to the new option remove the "backup" to arcs_command_line in case of USE_OF is enabled, except for those platforms that still take the bootloader arguments or do not use any at all. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: Ganesan Ramalingam <ganesanr@broadcom.com> Cc: Jayachandran C <jchandra@broadcom.com> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: James Hartley <james.hartley@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/11285/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: Make the kernel arguments from dtb availableJonas Gorski2015-11-112-7/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Similar to how arm allows using selecting between bootloader arguments, dtb arguments and both, allow to select them on mips. But since we have less control over the place of the dtb do not modify it but instead use the boot_command_line for merging them. The default is "use bootloader arguments" to keep the current behaviour as default. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: Ganesan Ramalingam <ganesanr@broadcom.com> Cc: Jayachandran C <jchandra@broadcom.com> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: James Hartley <james.hartley@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/11284/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: Use USE_OF as the guard for appended dtbJonas Gorski2015-11-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since OF is now a user selectable symbol, the choice for appended dtb support should only be visible when USE_OF is selected, as this indicates actual machine support for device tree in MIPS. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: Ganesan Ramalingam <ganesanr@broadcom.com> Cc: Jayachandran C <jchandra@broadcom.com> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: James Hartley <james.hartley@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/11283/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: BCM63XX: Use pr_* instead of printkGregory Fong2015-11-116-20/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Gregory Fong <gregory.0xf0@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Jonas Gorski <jogo@openwrt.org> Cc: Joe Perches <joe@perches.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Nicolas Schichan <nschichan@freebox.fr> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/11300/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: Loongson: Cleanup CONFIG_LOONGSON_SUSPEND.Huacai Chen2015-11-113-7/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now LOONGSON_CHIPCFG register definition doesn't depend on CPUFREQ any more, so CPU_SUPPORTS_CPUFREQ is no longer needed for suspend/resume. Remove CONFIG_LOONGSON_SUSPEND and use CONFIG_SUSPEND instead. Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11274/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: lantiq: Disable xbar fpi burst modeJohn Crispin2015-11-111-0/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11458/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: lantiq: Force the crossbar to big endianJohn Crispin2015-11-111-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11450/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: lantiq: Initialize the USB core on bootJohn Crispin2015-11-111-0/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a DWC2 USB core in these SoCs. To make USB work we need to first reset and power the state machine. These are SoC specific registers and not part of the actual USB core. Signed-off-by: Antti Seppälä <a.seppala@gmail.com> Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11449/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: lantiq: Return correct value for fpi clock on ar9John Crispin2015-11-111-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some configurations of AR9 reported the incorrect speed for the fpi bus. Signed-off-by: Ben Mulvihill <ben.mulvihill@gmail.com> Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11448/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: ralink: Add missing clock on rt305xJohn Crispin2015-11-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The rt305x support is missing a clock required by the ethernet driver. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11447/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: ralink: Put the pci bus into reset state before rebooting the SoCJohn Crispin2015-11-111-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some pcie cards have problems after a reboot without this. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11446/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: ralink: Don't set pm_power_offJohn Crispin2015-11-111-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Setting pm_power_off is apprently wrong and makes drivers such as gpio-poweroff not work. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11445/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: ralink: Remove check for CONFIG_PCI on non-PCI SoCsJohn Crispin2015-11-111-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code currently panics if PCI is enabled but the SoC has no PCI bus. This check is superfluous as the driver only loads if enabled in the devicetree. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11444/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: ralink: Fix invalid tick countJohn Crispin2015-11-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current code adds the delta twice, which is obviously wrong. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11443/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: ralink: Add tty detectionJohn Crispin2015-11-111-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MT7688 has several uarts that can be used for console. There are several boards in the wild, that use ttyS1 or ttyS2. This patch applies a simply autodetection routine to figure out which ttyS the bootloader used as console. The uarts come up in 6 bit mode by default. The bootloader will have set 8 bit mode on the console. Find that 8bit tty and use it. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11459/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: ralink: Fix usb issue during frequency scalingJohn Crispin2015-11-111-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the USB HCD is running and the cpu is scaled too low, then the USB stops working. Increase the idle speed of the core to fix this if the kernel is built with USB support. The "magic" values are taken from the Ralink SDK Kernel. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11441/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-24 10:43:24 +0100