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* [PATCH] ARM: Fix IXP2000 serial port resource range. For real this time.Deepak Saxena2005-10-011-1/+1
| | | | | | | | | Serial port only needs 32 bytes of resource space but we are currently asking for 64K. Signed-off-by: Deepak Saxena <dsaxena@plexity.net> [ diff went missing first time due to corrupted patch ] Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] pmac: fix cpufreq for old tipb 550MhzBenjamin Herrenschmidt2005-10-011-0/+7
| | | | | | | | | | | | | | The old 550Mhz titanium powerbook can switch to a lower frequency (500Mhz). A user has been repeately reporting overtemp conditions on his machine at high speed so this simple patch adds support to PowerMac cpufreq for this machine. The difference in frequency isn't big but seem enough to fix that user's problems. The patch has been around for some time now and doesn't seem to cause any problem, so I suppose it could go in now. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Alain RICHARD <alain.richard@equation.fr> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86_64 early numa init fixRavikiran G Thirumalai2005-09-301-3/+2
| | | | | | | | | | | | | | | | | | | | | The tests Alok carried out on Petr's box confirmed that cpu_to_node[BP] is not setup early enough by numa_init_array due to the x86_64 changes in 2.6.14-rc*, and unfortunately set wrongly by the work around code in numa_init_array(). cpu_to_node[0] gets set with 1 early and later gets set properly to 0 during identify_cpu() when all cpus are brought up, but confusing the numa slab in the process. Here is a quick fix for this. The right fix obviously is to have cpu_to_node[bsp] setup early for numa_init_array(). The following patch will fix the problem now, and the code can stay on even when cpu_to_node{BP] gets fixed early correctly. Thanks to Petr for access to his box. Signed off by: Ravikiran Thirumalai <kiran@scalex86.org> Signed-off-by: Alok N Kataria <alokk@calsoftinc.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86_64: fix the BP node_to_cpumaskRavikiran G Thirumalai2005-09-301-4/+1
| | | | | | | | | | | | | | | Fix the BP node_to_cpumask. 2.6.14-rc* broke the boot cpu bit as the cpu_to_node(0) is now not setup early enough for numa_init_array. cpu_to_node[] is setup much later at srat_detect_node on acpi srat based em64t machines. This seems like a problem on amd machines too, Tested on em64t though. /sys/devices/system/node/node0/cpumap shows up sanely after this patch. Signed off by: Ravikiran Thirumalai <kiran@scalex86.org> Signed-off-by: Shai Fultheim <shai@scalex86.org> Cc: Andi Kleen <ak@muc.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] utilization of kprobe_mutex is incorrect on x86_64Zhang, Yanmin2005-09-301-4/+4
| | | | | | | | | | | | | | | The up()/down() orders are incorrect in arch/x86_64/kprobes.c file. kprobe_mutext is used to protect the free kprobe instruction slot list. arch_prepare_kprobe applies for a slot from the free list, and arch_remove_kprobe returns a slot to the free list. The incorrect up()/down() orders to operate on kprobe_mutex fail to protect the free list. If 2 threads try to get/return kprobe instruction slot at the same time, the free slot list might be broken, or a free slot might be applied by 2 threads. Signed-off-by: Zhang Yanmin <Yanmin.zhang@intel.com> Cc: Andi Kleen <ak@muc.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] uml: revert "run mconsole "sysrq" in process context"Paolo 'Blaisorblade' Giarrusso2005-09-301-1/+1
| | | | | | | | | | | | | | | | | | Revert commit 12ebcd73e40e09f0dfddf89e465cc0541e0ff8b1, i.e. [PATCH] uml: run mconsole "sysrq" in process context on request from Jeff Dike. a) sysrq may be run when the scheduler is non-functioning b) the warning I wanted to fix actually came from the fault handler run in atomic context. But I fixed that not to take the semaphore in a separate patch. c) the fault handler is run because of a fault, and that fault was unaffected by this patch. Signed-off-by: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] uml: clear SKAS0/3 flags when running in TT modePaolo 'Blaisorblade' Giarrusso2005-09-302-0/+6
| | | | | | | | | | SEGV_MAYBE_FIXABLE tests ptrace_faultinfo, and depends on it being 1 only in SKAS3 mode, while currently when running with mode=tt it will be 1 anyway. Fix this, and do the same for proc_mm. Signed-off-by: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] uml: fix page faults in SKAS3 mode.Paolo 'Blaisorblade' Giarrusso2005-09-303-3/+17
| | | | | | | | | | | | I hadn't been running a SKAS3 host when testing the "uml: fix hang in TT mode on fault" patch (commit 546fe1cbf91d4d62e3849517c31a2327c992e5c5), and I didn't think enough to the missing trap_no in SKAS3 mode. In fact, the resulting kernel doesn't work at all in SKAS3 mode. Signed-off-by: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] i386: include linux/irq.h rather than asm/hw_irq.hNick Piggin2005-09-303-3/+3
| | | | | | | | | | | | I need the following patch to compile -git8 here, otherwise these files fail to compile (asm/hw_irq.h needs definitions from linux/irq.h and that file provides the required include ordering). I did not do a full audit, though there looks to be many other places that should get the same treatment, if this is the right way to do it. Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] useless includes of linux/irq.h (arch/ppc)Al Viro2005-09-3026-27/+0
| | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6Linus Torvalds2005-09-3017-671/+359
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| * [SPARC64]: Fix several bugs in flush_ptrace_access().David S. Miller2005-09-301-3/+11
| | | | | | | | | | | | | | | | | | 1) Use cpudata cache line sizes, not magic constants. 2) Align start address in cheetah case so we do not get unaligned address traps. (pgrep was good at triggering this, via /proc/${pid}/cmdline accesses) Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Kill arch/sparc64/prom/memory.cDavid S. Miller2005-09-303-156/+1
| | | | | | | | | | | | No longer used. Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Rewrite convoluted physical memory probing.David S. Miller2005-09-302-192/+112
| | | | | | | | | | | | | | | | Delete all of the code working with sp_banks[] and replace with clean acquisition and sorting of physical memory parameters from the firmware. Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Solidify check in cheetah_check_main_memory().David S. Miller2005-09-291-0/+3
| | | | | | | | | | | | | | Need to make sure the address is below high_memory before passing it to kern_addr_valid(). Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Kill all external references to sp_banks[]David S. Miller2005-09-293-30/+28
| | | | | | | | | | | | Thus, we can mark sp_banks[] static in arch/sparc64/mm/init.c Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Move phys_base, kern_{base,size}, and sp_banks[] init to paging_initDavid S. Miller2005-09-293-67/+61
| | | | | | | | | | | | Also, move prom_probe_memory() into arch/sparc64/mm/init.c Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC]: Declare paging_init() in asm/pgtable.hDavid S. Miller2005-09-292-4/+0
| | | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Simplify user fault fixup handling.David S. Miller2005-09-292-42/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | Instead of doing byte-at-a-time user accesses to figure out where the fault occurred, read the saved fault_address from the current thread structure. For the sake of defensive programming, if the fault_address does not fall into the user buffer range, simply assume the whole area faulted. This will cause the fixup for copy_from_user() to clear the entire kernel side buffer. Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Fix fault handling in unaligned trap handler.David S. Miller2005-09-295-87/+94
| | | | | | | | | | | | | | | | | | | | | | | | We were not calling kernel_mna_trap_fault() correctly. Instead of being fancy, just return 0 vs. -EFAULT from the assembler stubs, and handle that return value as appropriate. Create an "__retl_efault" stub for assembler exception table entries and use it where possible. Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Convert to use generic exception table support.David S. Miller2005-09-296-171/+99
| | | | | | | | | | | | | | | | | | | | | | The funny "range" exception table entries we had were only used by the compat layer socketcall assembly, and it wasn't even needed there. For free we now get proper exception table sorting and fast binary searching. Signed-off-by: David S. Miller <davem@davemloft.net>
* | [PATCH] bogus BUILD_BUG_ON() in bpa_iommuAl Viro2005-09-301-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | BUILD_BUG_ON(1) is asking for trouble (and getting it) when used in that manner - dead code elimination happens after we parse it and invalid type is invalid type, dead code or not. It might be version-dependent, but at least 4.0.1 refuses to accept that. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] useless linux/irq.h includes (arch/um)Al Viro2005-09-302-2/+0
| | | | | | | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2005-09-3023-38/+29
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| * | [ARM] 2940/1: Fix BTB entry flush in arch/arm/mm/cache-v6.SGen FUKATSU2005-09-301-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Gen FUKATSU Invalidate BTB entry instruction flushes two instruction at a time. Therefore this instruction should be done four times after invalidate instruction cache line. Signed-off-by: Gen Fukatsu Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 2942/1: Fix the warning in arch/arm/common/gic.cCatalin Marinas2005-09-301-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Catalin Marinas The warning is caused by the gic_set_cpu() function being defined but not used if CONFIG_SMP is not defined. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 2939/1: Fix compilation error in arch/arm/mm/flush.cCatalin Marinas2005-09-301-18/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Catalin Marinas When CONFIG_CPU_CACHE_VIPT is defined, the flush_pfn_alias() function is implicitely declared and it later conflicts with its actual definition. This patch moves the function definition to the beginning of the file. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] Don't include mach-types.h unnecessarilyRussell King2005-09-2918-18/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | It's pointless to include mach-types.h if you're not going to use anything from it. These references were removed as a result of: grep -lr 'asm/mach-types\.h' . | xargs grep -L 'machine_is_\|MACH_TYPE_\|MACHINE_START\|machine_type' Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] Don't include asm/arch/hardware.h directlyRussell King2005-09-291-1/+0
| | | | | | | | | | | | | | | | | | | | | Since asm/hardware.h's only reason for existing is to include asm/arch/hardware.h, it's completely pointless to include both. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] Fix warning in arch/arm/mach-pxa/generic.cRussell King2005-09-291-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Fix arch/arm/mach-pxa/generic.c:242: warning: 'struct i2c_pxa_platform_data' declared inside parameter list caused by missing asm/arch/i2c.h include. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | [PATCH] x86_64: Fix mce_logMike Waychison2005-09-301-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The attempt to fixup the lockless mce log buffer introduced an infinite loop when trying to find a free entry. And: Using rcu_dereference() to load mcelog.next doesn't seem to be sufficient enough to ensure that mcelog.next is loaded each time around the loop in mce_log(). Instead, use an explicit rmb() to ensure that the compiler gets it right. AK: turned the smp_wmbs into true wmbs to make sure they are not reordered by the compiler on UP. Signed-off-by: Mike Waychison <mikew@google.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | [PATCH] Fix up TLB flush filter disablingAndi Kleen2005-09-302-10/+28
| | | | | | | | | | | | | | | | | | | | | | | | I checked with AMD and they requested to only disable it for family 15. Also disable it for i386 too. And some style fixes. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | [PATCH] Fix thinko in previous ARM 2917/1 patchDeepak Saxena2005-09-291-1/+1
| | | | | | | | | | | | | | | | | | | | | Previous patch accidently add IXDP425 mach entry when IXDP465 is configured. Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6Linus Torvalds2005-09-293-6/+13
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| * | [SPARC64]: Fix bug in unaligned load endianness swappingDavid S. Miller2005-09-291-5/+5
| | | | | | | | | | | | | | | | | | | | | The in-memory value was being swapped, not the value we loaded into the register. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | [SPARC64]: Add missing IDs for newer cpus.David S. Miller2005-09-282-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | Also, the us3_cpufreq driver can work on Ultra-IV and IV+. They use the SAFARI bus register to control the clock divider just like Ultra-III and III+ do. Signed-off-by: David S. Miller <davem@davemloft.net>
* | | [PATCH] mv64x60 iomem annotationsAl Viro2005-09-291-2/+2
| | | | | | | | | | | | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | [PATCH] ppc32 ld.script fix for building on ppc64Al Viro2005-09-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In arch/ppc/boot/ld.script we need OUTPUT_ARCH(powerpc:common) for the same reasons why we need it in vmlinux.lds.S; when we build on ppc64 box, we need to be explicit about the target. See http://linus.bkbits.net:8080/linux-2.5/cset@1.1784.8.10 for the corresponding fix in vmlinux.lds.S. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | [PATCH] s390 signal annotationsAl Viro2005-09-292-5/+5
| | | | | | | | | | | | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | [PATCH] arm/versatile iomem annotationsAl Viro2005-09-291-21/+22
| | | | | | | | | | | | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | [PATCH] uml makefiles sanitizedAl Viro2005-09-2933-573/+240
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | UML makefiles sanitized: - number of generated headers reduced to 2 (from user-offsets.c and kernel-offsets.c resp.). The rest is made constant and simply includes those two. - mk_... helpers are gone now that we don't need to generate these headers - arch/um/include2 removed since everything under arch/um/include/sysdep is constant now and symlink can point straight to source tree. - dependencies seriously simplified. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] ppc64: More hugepage fixesBenjamin Herrenschmidt2005-09-282-4/+5
| | | | | | | | | | | | | | | | | | | | | | My previous patch fixing invalidation of huge PTEs wasn't good enough, we still had an issue if a PTE invalidation batch contained both small and large pages. This patch fixes this by making sure the batch is flushed if the page size fed to it changes. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] ppc64: Add missing barrier() in kexec codeAnton Blanchard2005-09-281-0/+1
| | | | | | | | | | | | | | | | | | | | Mikey and I were testing kexec and hit a lockup. It turns out gcc 4.0 optimises the kexec_prepare_cpus loop so we avoid reloading paca.hw_cpu_id. A gcc barrier() fixes the problem. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] x86-64: Fix bad assumption that dualcore cpus have synced TSCsjohn stultz2005-09-281-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This should resolve the issue seen in bugme bug #5105, where it is assumed that dualcore x86_64 systems have synced TSCs. This is not the case, and alternate timesources should be used instead. For more details, see: http://bugzilla.kernel.org/show_bug.cgi?id=5105 Andi's earlier concerns that the TSCs should be synced on dualcore systems have been resolved by confirmation from AMD folks that they can be unsynced. Acked-by: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] ppc: fix stupid thinko in oprofile fixBenjamin Herrenschmidt2005-09-281-2/+1
|/ | | | | | | | I did something stupid in my oprofile fix, here's the obvious fix: Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6Linus Torvalds2005-09-2724-1170/+856
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| * [SPARC64]: Do not do TLB pre-filling any more.David S. Miller2005-09-272-35/+0
| | | | | | | | | | | | | | | | | | | | | | In order to do it correctly on UltraSPARC-III+ and later we'd need to add some complicated code to set the TAG access extension register before loading the TLB. Since this optimization gives questionable gains, it's best to just remove it for now instead of adding the fix for Ultra-III+ Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Simplify Spitfire D-cache page flush.David S. Miller2005-09-271-46/+23
| | | | | | | | | | | | | | | | | | | | It tries to batch up the tag loads and comparisons, and then the stores. And this is just complicated instead of efficient. Also, make the symbol of the Cheetah version more grepable. Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Probe D/I/E-cache config and use.David S. Miller2005-09-265-23/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At boot time, determine the D-cache, I-cache and E-cache size and line-size. Use them in cache flushes when appropriate. This change was motivated by discovering that the D-cache on UltraSparc-IIIi and later are 64K not 32K, and the flushes done by the Cheetah error handlers were assuming a 32K size. There are still some pieces of code that are hard coding things and will need to be fixed up at some point. While we're here, fix the D-cache and I-cache parity error handlers to run with interrupts disabled, and when the trap occurs at trap level > 1 log the event via a counter displayed in /proc/cpuinfo. Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Add CONFIG_DEBUG_PAGEALLOC support.David S. Miller2005-09-265-12/+147
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The trick is that we do the kernel linear mapping TLB miss starting with an instruction sequence like this: ba,pt %xcc, kvmap_load xor %g2, %g4, %g5 succeeded by an instruction sequence which performs a full page table walk starting at swapper_pg_dir. We first take over the trap table from the firmware. Then, using this constant PTE generation for the linear mapping area above, we build the kernel page tables for the linear mapping. After this is setup, we patch that branch above into a "nop", which will cause TLB misses to fall through to the full page table walk. With this, the page unmapping for CONFIG_DEBUG_PAGEALLOC is trivial. Signed-off-by: David S. Miller <davem@davemloft.net>