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* Merge tag 'openrisc-for-linus' of git://github.com/openrisc/linuxLinus Torvalds2017-02-2523-187/+1058
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull OpenRISC updates from Stafford Horne: "Highlights include: - optimized memset and memcpy routines, ~20% boot time saving - support for cpu idling - adding support for l.swa and l.lwa atomic operations (in spec from 2014) - use atomics to implement: bitops, cmpxchg, futex - the atomics are in preparation for SMP support" * tag 'openrisc-for-linus' of git://github.com/openrisc/linux: (25 commits) openrisc: head: Init r0 to 0 on start openrisc: Export ioremap symbols used by modules arch/openrisc/lib/memcpy.c: use correct OR1200 option openrisc: head: Remove unused strings openrisc: head: Move init strings to rodata section openrisc: entry: Fix delay slot detection openrisc: entry: Whitespace and comment cleanups scripts/checkstack.pl: Add openrisc support MAINTAINERS: Add the openrisc official repository openrisc: Add .gitignore openrisc: Add optimized memcpy routine openrisc: Add optimized memset openrisc: Initial support for the idle state openrisc: Fix the bitmask for the unit present register openrisc: remove unnecessary stddef.h include openrisc: add futex_atomic_* implementations openrisc: add optimized atomic operations openrisc: add cmpxchg and xchg implementations openrisc: add atomic bitops openrisc: add l.lwa/l.swa emulation ...
| * openrisc: head: Init r0 to 0 on startStafford Horne2017-02-241-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | Originally openrisc spec 0 specified that r0 would be wired to ground. This is no longer the case. r0 is not guaranteed to be 0 at init, so we need to initialize it to 0 before using it. Also, if we are clearing r0 we cant use r0 to clear itself. Change the the CLEAR_GPR macro to use movhi for clearing. Reported-by: Jakob Viketoft <jakob.viketoft@aacmicrotec.com> Signed-off-by: Stafford Horne <shorne@gmail.com>
| * openrisc: Export ioremap symbols used by modulesStafford Horne2017-02-241-0/+2
| | | | | | | | | | | | | | | | Noticed this when building with allyesconfig. Got build failures due to iounmap and __ioremap symbols missing. This patch exports them so modules can use them. This is inline with other architectures. Signed-off-by: Stafford Horne <shorne@gmail.com>
| * arch/openrisc/lib/memcpy.c: use correct OR1200 optionValentin Rothberg2017-02-241-1/+1
| | | | | | | | | | | | | | The Kconfig option for OR12000 is OR1K_1200. Signed-off-by: Valentin Rothberg <valentinrothberg@gmail.com> Signed-off-by: Stafford Horne <shorne@gmail.com>
| * openrisc: head: Remove unused stringsStafford Horne2017-02-241-11/+0
| | | | | | | | | | | | | | These string definitions are no longer used removed them. Noticed this while working on a CONFIG_DEBUG_INFO build issue. Signed-off-by: Stafford Horne <shorne@gmail.com>
| * openrisc: head: Move init strings to rodata sectionStafford Horne2017-02-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | The strings used during the head/init phase of openrisc bootup were stored in the executable section of the binary. This causes compilation to fail when using CONFIG_DEBUG_INFO with error: Error: unaligned opcodes detected in executable segment Signed-off-by: Stafford Horne <shorne@gmail.com>
| * openrisc: entry: Fix delay slot detectionStafford Horne2017-02-241-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Use execption SR stored in pt_regs for detection, the current SR is not correct as the handler is running after return from exception. Also, The code that checks for a delay slot uses a flag bitmask and then wants to check if the result is not zero. The test it implemented was wrong. Correct it by changing the test to check result against non zero. Signed-off-by: Stafford Horne <shorne@gmail.com>
| * openrisc: entry: Whitespace and comment cleanupsStafford Horne2017-02-241-20/+18
| | | | | | | | | | | | | | | | | | | | | | | | Cleanups to whitespace and add some comments. Reading through the delay slot logic I noticed some things: - Delay slot instructions were not indented - Some comments are not lined up - Use tabs and spaces consistent with other code No functional change Signed-off-by: Stafford Horne <shorne@gmail.com>
| * openrisc: Add .gitignoreStafford Horne2017-02-241-0/+1
| | | | | | | | | | | | This helps to suppress the vmlinux.lds file. Signed-off-by: Stafford Horne <shorne@gmail.com>
| * openrisc: Add optimized memcpy routineStafford Horne2017-02-244-2/+128
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The generic memcpy routine provided in kernel does only byte copies. Using word copies we can lower boot time and cycles spend in memcpy quite significantly. Booting on my de0 nano I see boot times go from 7.2 to 5.6 seconds. The avg cycles in memcpy during boot go from 6467 to 1887. I tested several algorithms (see code in previous patch mails) The implementations I tested and avg cycles: - Word Copies + Loop Unrolls + Non Aligned 1882 - Word Copies + Loop Unrolls 1887 - Word Copies 2441 - Byte Copies + Loop Unrolls 6467 - Byte Copies 7600 In the end I ended up going with Word Copies + Loop Unrolls as it provides best tradeoff between simplicity and boot speedups. Signed-off-by: Stafford Horne <shorne@gmail.com>
| * openrisc: Add optimized memsetOlof Kindgren2017-02-244-1/+107
| | | | | | | | | | | | | | | | | | This adds a hand-optimized assembler version of memset and sets __HAVE_ARCH_MEMSET to use this version instead of the generic C routine Signed-off-by: Olof Kindgren <olof.kindgren@gmail.com> Signed-off-by: Stafford Horne <shorne@gmail.com>
| * openrisc: Initial support for the idle stateSebastian Macke2017-02-241-0/+11
| | | | | | | | | | | | | | | | | | | | | | This patch adds basic support for the idle state of the cpu. The patch overrides the regular idle function, enables the interupts, checks for the power management unit and enables the cpu doze mode if available. Signed-off-by: Sebastian Macke <sebastian@macke.de> [shorne@gmail.com: Fixed checkpatch, blankline after declarations] Signed-off-by: Stafford Horne <shorne@gmail.com>
| * openrisc: Fix the bitmask for the unit present registerSebastian Macke2017-02-241-2/+2
| | | | | | | | | | | | | | | | | | | | The bits were swapped, as per spec and processor implementation the power management present bit is 9 and PIC bit is 8. This patch brings the definitions into spec. Signed-off-by: Sebastian Macke <sebastian@macke.de> [shorne@gmail.com: Added commit body] Signed-off-by: Stafford Horne <shorne@gmail.com>
| * openrisc: remove unnecessary stddef.h includeStefan Kristiansson2017-02-241-1/+0
| | | | | | | | | | | | | | This causes the build to fail when building with the or1k-musl-linux- toolchain and it is not needed. Signed-off-by: Stafford Horne <shorne@gmail.com>
| * openrisc: add futex_atomic_* implementationsStefan Kristiansson2017-02-242-1/+135
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Support for the futex_atomic_* operations by using the load-link/store-conditional l.lwa/l.swa instructions. Most openrisc cores provide these instructions now if not available, emulation is provided. Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> [shorne@gmail.com: remove OPENRISC_HAVE_INST_LWA_SWA config suggesed by Alan Cox https://lkml.org/lkml/2014/7/23/666] Signed-off-by: Stafford Horne <shorne@gmail.com>
| * openrisc: add optimized atomic operationsStefan Kristiansson2017-02-242-1/+126
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using the l.lwa and l.swa atomic instruction pair. Most openrisc processor cores provide these instructions now. If the instructions are not available emulation is provided. Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> [shorne@gmail.com: remove OPENRISC_HAVE_INST_LWA_SWA config suggesed by Alan Cox https://lkml.org/lkml/2014/7/23/666] [shorne@gmail.com: expand to implement all ops suggested by Peter Zijlstra https://lkml.org/lkml/2017/2/20/317] Signed-off-by: Stafford Horne <shorne@gmail.com>
| * openrisc: add cmpxchg and xchg implementationsStefan Kristiansson2017-02-242-2/+83
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Optimized version that make use of the l.lwa and l.swa atomic instruction pair. Most openrisc cores provide these instructions now, if not available emulation is provided. Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> [shorne@gmail.com: remove OPENRISC_HAVE_INST_LWA_SWA config suggesed by Alan Cox https://lkml.org/lkml/2014/7/23/666] [shorne@gmail.com: fixed unused calculated value compiler warning in define cmpxchg] Signed-off-by: Stafford Horne <shorne@gmail.com>
| * openrisc: add atomic bitopsStefan Kristiansson2017-02-242-1/+124
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This utilize the load-link/store-conditional l.lwa and l.swa instructions to implement the atomic bitops. When those instructions are not available emulation is provided. Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> [shorne@gmail.com: remove OPENRISC_HAVE_INST_LWA_SWA config suggesed by Alan Cox https://lkml.org/lkml/2014/7/23/666, implement test_and_change_bit] Signed-off-by: Stafford Horne <shorne@gmail.com>
| * openrisc: add l.lwa/l.swa emulationStefan Kristiansson2017-02-063-2/+206
| | | | | | | | | | | | | | | | | | | | | | This adds an emulation layer for implementations that lack the l.lwa and l.swa instructions. It handles these instructions both in kernel space and user space. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> [shorne@gmail.com: Added delay slot pc adjust logic] Signed-off-by: Stafford Horne <shorne@gmail.com>
| * openrisc: head: refactor out tlb flush into it's own functionStefan Kristiansson2017-02-061-16/+22
| | | | | | | | | | | | | | | | | | | | This brings it inline with the other setup oprations done like the cache enables _ic_enable and _dc_enable. Also, this is going to make it easier to initialize additional cpu's when smp is introduced. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> [shorne@gmail.com: Added commit body] Signed-off-by: Stafford Horne <shorne@gmail.com>
| * openrisc: head: use THREAD_SIZE instead of magic constantStefan Kristiansson2017-02-061-1/+3
| | | | | | | | | | | | | | | | | | The stack size was hard coded to 0x2000, use the standard THREAD_SIZE definition loaded from thread_info.h. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> [shorne@gmail.com: Added body to the commit message] Signed-off-by: Stafford Horne <shorne@gmail.com>
| * openrisc: tlb miss handler optimizationsStefan Kristiansson2017-02-061-95/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | By slightly reorganizing the code, the number of registers used in the tlb miss handlers can be reduced by two, thus removing the need to save them to memory. Also, some dead and commented out code is removed. No functional change. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> Signed-off-by: Jonas Bonn <jonas@southpole.se> Signed-off-by: Stafford Horne <shorne@gmail.com>
| * openrisc: add cache way information to cpuinfoStefan Kristiansson2017-02-062-31/+38
| | | | | | | | | | | | | | | | | | | | Motivation for this is to be able to print the way information properly in print_cpuinfo(), instead of hardcoding it to one. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> Signed-off-by: Jonas Bonn <jonas@southpole.se> [shorne@gmail.com fixed conflict with show_cpuinfo change] Signed-off-by: Stafford Horne <shorne@gmail.com>
| * openrisc: use SPARSE_IRQJonas Bonn2017-02-062-0/+2
| | | | | | | | | | | | | | The sparse IRQ framework is preferred nowadays so switch over to it. Signed-off-by: Jonas Bonn <jonas@southpole.se> Signed-off-by: Stafford Horne <shorne@gmail.com>
* | Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparcLinus Torvalds2017-02-2513-171/+449
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull sparc updates from David Miller: 1) Support multiple huge page sizes, from Nitin Gupta. 2) Improve boot time on large memory configurations, from Pavel Tatashin. 3) Make BRK handling more consistent and documented, from Vijay Kumar. * git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc: sparc64: Fix build error in flush_tsb_user_page sparc64: memblock resizes are not handled properly sparc64: use latency groups to improve add_node_ranges speed sparc64: Add 64K page size support sparc64: Multi-page size support Documentation/sparc: Steps for sending break on sunhv console sparc64: Send break twice from console to return to boot prom sparc64: Migrate hvcons irq to panicked cpu sparc64: Set cpu state to offline when stopped sunvdc: Add support for setting physical sector size sparc64: fix for user probes in high memory sparc: topology_64.h: Fix condition for including cpudata.h sparc32: mm: srmmu: add __ro_after_init to sparc32_cachetlb_ops structures
| * | sparc64: Fix build error in flush_tsb_user_pageNitin Gupta2017-02-242-6/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch "sparc64: Add 64K page size support" unconditionally used __flush_huge_tsb_one_entry() which is available only when hugetlb support is enabled. Another issue was incorrect TSB flushing for 64K pages in flush_tsb_user(). Signed-off-by: Nitin Gupta <nitin.m.gupta@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc64: memblock resizes are not handled properlyPavel Tatashin2017-02-231-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In add_node_ranges() when memblock resize happens, the iterator keeps using the previous freed array. This bug cause hangs on machine where there are over 128 memory blocks during boot. For example, on machines where memory interleaving is small. The problem is seen on T4-4 because it cant have 2T of memory, and memory is interleaved at 8G. So we have 2T/8G = 256 regions to set node IDs. The starting size of regions array is 128. Thus, we have to double at least one time (actually we have to double twice because some memory is already reserved and thus we need more than 256 regions). We start using an incorrect pointer to the array after the first doubling. Signed-off-by: Pavel Tatashin <pasha.tatashin@oracle.com> Signed-off-by: Babu Moger <babu.moger@oracle.com> Reviewed-by: Babu Moger <babu.moger@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc64: use latency groups to improve add_node_ranges speedPavel Tatashin2017-02-231-95/+113
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add_node_ranges() takes 2.6s - 3.6s per 1T of boot time. On machine with 6T memory it takes 15.4s, on 32T it would take 82s-115s of boot time. This function sets NUMA ids for memory blocks, and scans the whole memory a page at a time to do so. But, we could use values in latency groups mask and match to determine the boundaries without checking every single page. With the fix the add_node_ranges() time is reduced from 15.4s down to 0.2s on machine with 6T memory. Signed-off-by: Pavel Tatashin <pasha.tatashin@oracle.com> Reviewed-by: Babu Moger <babu.moger@oracle.com> Reviewed-by: Bob Picco <bob.picco@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc64: Add 64K page size supportNitin Gupta2017-02-234-14/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch depends on: [v6] sparc64: Multi-page size support - Testing Tested on Sonoma by running stream benchmark instance which allocated 48G worth of 64K pages. boot params: default_hugepagesz=64K hugepagesz=64K hugepages=1310720 Signed-off-by: Nitin Gupta <nitin.m.gupta@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc64: Multi-page size supportNitin Gupta2017-02-238-62/+253
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for using multiple hugepage sizes simultaneously on mainline. Currently, support for 256M has been added which can be used along with 8M pages. Page tables are set like this (e.g. for 256M page): VA + (8M * x) -> PA + (8M * x) (sz bit = 256M) where x in [0, 31] and TSB is set similarly: VA + (4M * x) -> PA + (4M * x) (sz bit = 256M) where x in [0, 63] - Testing Tested on Sonoma (which supports 256M pages) by running stream benchmark instances in parallel: one instance uses 8M pages and another uses 256M pages, consuming 48G each. Boot params used: default_hugepagesz=256M hugepagesz=256M hugepages=300 hugepagesz=8M hugepages=10000 Signed-off-by: Nitin Gupta <nitin.m.gupta@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc64: Migrate hvcons irq to panicked cpuVijay Kumar2017-02-232-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | On panic, all other CPUs are stopped except the one which had hit panic. To keep console alive, we need to migrate hvcons irq to panicked CPU. Signed-off-by: Vijay Kumar <vijay.ac.kumar@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc64: Set cpu state to offline when stoppedVijay Kumar2017-02-231-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CPU needs to be marked offline before stopping it. When not marked offline, the xcall receives HV_EWOULDBLOCK and so assumes that not all CPUs received the message, and retries. After 10000 retries, it finally fails with fatal mondo timeout. Signed-off-by: Vijay Kumar <vijay.ac.kumar@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc64: fix for user probes in high memoryEric Saint Etienne2017-02-231-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When returning from the user probe code into userspace process, PC & NPC are truncated to 32 bits. Due to shared libraries getting loaded very high in the virtual address space of the process, placing a user probe inside a shared library makes the kernel return into the process at the wrong address, causing it to seg'fault most of the time. This patch prevents truncating PC and NPC. Signed-off-by: Eric Saint Etienne <eric.saint.etienne@oracle.com> Reviewed-by: David Aldridge <david.j.aldridge@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc: topology_64.h: Fix condition for including cpudata.hBen Hutchings2017-02-231-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We currently define macros referring to cpu_data if CONFIG_SMP is defined, but only include the declaration if CONFIG_NUMA is defined. Fixes: 541cc39433a8 ("sparc: fix a building error reported by kbuild") Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Acked-by: Gonglei <arei.gonglei@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc32: mm: srmmu: add __ro_after_init to sparc32_cachetlb_ops structuresBhumika Goyal2017-02-231-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The objects viking_ops, viking_sun4d_smp_ops and smp_cachetlb_ops of type sparc32_cachetlb_ops are not modified anywhere after getting modified in the init functions. Inside init their reference is also stored in a pointer of type const struct sparc32_cachetlb_ops *. So these structures are never modified after init, therefore add __ro_after to the declaration of these structures. Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | Merge tag 'drm-for-v4.11-less-shouty' of ↵Linus Torvalds2017-02-241-0/+1
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://people.freedesktop.org/~airlied/linux Pull drm updates from Dave Airlie: "This is the main drm pull request for v4.11. Nothing too major, the tinydrm and mmu-less support should make writing smaller drivers easier for some of the simpler platforms, and there are a bunch of documentation updates. Intel grew displayport MST audio support which is hopefully useful to people, and FBC is on by default for GEN9+ (so people know where to look for regressions). AMDGPU has a lot of fixes that would like new firmware files installed for some GPUs. Other than that it's pretty scattered all over. I may have a follow up pull request as I know BenH has a bunch of AST rework and fixes and I'd like to get those in once they've been tested by AST, and I've got at least one pull request I'm just trying to get the author to fix up. Core: - drm_mm reworked - Connector list locking and iterators - Documentation updates - Format handling rework - MMU-less support for fbdev helpers - drm_crtc_from_index helper - Core CRC API - Remove drm_framebuffer_unregister_private - Debugfs cleanup - EDID/Infoframe fixes - Release callback - Tinydrm support (smaller drivers for simple hw) panel: - Add support for some new simple panels i915: - FBC by default for gen9+ - Shared dpll cleanups and docs - GEN8 powerdomain cleanup - DMC support on GLK - DP MST audio support - HuC loading support - GVT init ordering fixes - GVT IOMMU workaround fix amdgpu/radeon: - Power/clockgating improvements - Preliminary SR-IOV support - TTM buffer priority and eviction fixes - SI DPM quirks removed due to firmware fixes - Powerplay improvements - VCE/UVD powergating fixes - Cleanup SI GFX code to match CI/VI - Support for > 2 displays on 3/5 crtc asics - SI headless fixes nouveau: - Rework securre boot code in prep for GP10x secure boot - Channel recovery improvements - Initial power budget code - MMU rework preperation vmwgfx: - Bunch of fixes and cleanups exynos: - Runtime PM support for MIC driver - Cleanups to use atomic helpers - UHD Support for TM2/TM2E boards - Trigger mode fix for Rinato board etnaviv: - Shader performance fix - Command stream validator fixes - Command buffer suballocator rockchip: - CDN DisplayPort support - IOMMU support for arm64 platform imx-drm: - Fix i.MX5 TV encoder probing - Remove lower fb size limits msm: - Support for HW cursor on MDP5 devices - DSI encoder cleanup - GPU DT bindings cleanup sti: - stih410 cleanups - Create fbdev at binding - HQVDP fixes - Remove stih416 chip functionality - DVI/HDMI mode selection fixes - FPS statistic reporting omapdrm: - IRQ code cleanup dwi-hdmi bridge: - Cleanups and fixes adv-bridge: - Updates for nexus sii8520 bridge: - Add interlace mode support - Rework HDMI and lots of fixes qxl: - probing/teardown cleanups ZTE drm: - HDMI audio via SPDIF interface - Video Layer overlay plane support - Add TV encoder output device atmel-hlcdc: - Rework fbdev creation logic tegra: - OF node fix fsl-dcu: - Minor fixes mali-dp: - Assorted fixes sunxi: - Minor fix" [ This was the "fixed" pull, that still had build warnings due to people not even having build tested the result. I'm not a happy camper I've fixed the things I noticed up in this merge. - Linus ] * tag 'drm-for-v4.11-less-shouty' of git://people.freedesktop.org/~airlied/linux: (1177 commits) lib/Kconfig: make PRIME_NUMBERS not user selectable drm/tinydrm: helpers: Properly fix backlight dependency drm/tinydrm: mipi-dbi: Fix field width specifier warning drm/tinydrm: mipi-dbi: Silence: ‘cmd’ may be used uninitialized drm/sti: fix build warnings in sti_drv.c and sti_vtg.c files drm/amd/powerplay: fix PSI feature on Polars12 drm/amdgpu: refuse to reserve io mem for split VRAM buffers drm/ttm: fix use-after-free races in vm fault handling drm/tinydrm: Add support for Multi-Inno MI0283QT display dt-bindings: Add Multi-Inno MI0283QT binding dt-bindings: display/panel: Add common rotation property of: Add vendor prefix for Multi-Inno drm/tinydrm: Add MIPI DBI support drm/tinydrm: Add helper functions drm: Add DRM support for tiny LCD displays drm/amd/amdgpu: post card if there is real hw resetting performed drm/nouveau/tmr: provide backtrace when a timeout is hit drm/nouveau/pci/g92: Fix rearm drm/nouveau/drm/therm/fan: add a fallback if no fan control is specified in the vbios drm/nouveau/hwmon: expose power_max and power_crit ..
| * \ \ Merge tag 'v4.10-rc8' into drm-nextDave Airlie2017-02-2383-453/+655
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Linux 4.10-rc8 Backmerge Linus rc8 to fix some conflicts, but also to avoid pulling it in via a fixes pull from someone.
| * \ \ \ Merge branch 'master' of ↵Dave Airlie2017-01-27117-347/+869
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into drm-next Backmerge Linus master to get the connector locking revert. * 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux: (645 commits) sysctl: fix proc_doulongvec_ms_jiffies_minmax() Revert "drm/probe-helpers: Drop locking from poll_enable" MAINTAINERS: add Dan Streetman to zbud maintainers MAINTAINERS: add Dan Streetman to zswap maintainers mm: do not export ioremap_page_range symbol for external module mn10300: fix build error of missing fpu_save() romfs: use different way to generate fsid for BLOCK or MTD frv: add missing atomic64 operations mm, page_alloc: fix premature OOM when racing with cpuset mems update mm, page_alloc: move cpuset seqcount checking to slowpath mm, page_alloc: fix fast-path race with cpuset update or removal mm, page_alloc: fix check for NULL preferred_zone kernel/panic.c: add missing \n fbdev: color map copying bounds checking frv: add atomic64_add_unless() mm/mempolicy.c: do not put mempolicy before using its nodemask radix-tree: fix private list warnings Documentation/filesystems/proc.txt: add VmPin mm, memcg: do not retry precharge charges proc: add a schedule point in proc_pid_readdir() ...
| * \ \ \ \ Merge tag 'drm-misc-next-2017-01-09' of ↵Dave Airlie2017-01-091-0/+1
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://anongit.freedesktop.org/git/drm-misc into drm-next Back to regular -misc pulls with reasonable sizes: - dma_fence error clarification (Chris) - drm_crtc_from_index helper (Shawn), pile more patches on the m-l to roll this out to drivers - mmu-less support for fbdev helpers from Benjamin - piles of kerneldoc work - some polish for crc support from Tomeu and Benjamin - odd misc stuff all over * tag 'drm-misc-next-2017-01-09' of git://anongit.freedesktop.org/git/drm-misc: (48 commits) dma-fence: Introduce drm_fence_set_error() helper dma-fence: Wrap querying the fence->status dma-fence: Clear fence->status during dma_fence_init() drm: fix compilations issues introduced by "drm: allow to use mmuless SoC" drm: Change the return type of the unload hook to void drm: add more document for drm_crtc_from_index() drm: remove useless parameters from drm_pick_cmdline_mode function drm: crc: Call wake_up_interruptible() each time there is a new CRC entry drm: allow to use mmuless SoC drm: compile drm_vm.c only when needed fbmem: add a default get_fb_unmapped_area function drm: crc: Wait for a frame before returning from open() drm: Move locking into drm_debugfs_crtc_crc_add drm/imx: imx-tve: Remove unused variable Revert "drm: nouveau: fix build when LEDS_CLASS=m" drm: Add kernel-doc for drm_crtc_commit_get/put drm/atomic: Fix outdated comment. drm: reference count event->completion gpu: drm: mgag200: mgag200_main:- Handle error from pci_iomap drm: Document deprecated load/unload hook ...
| | * | | | | drm: fix compilations issues introduced by "drm: allow to use mmuless SoC"Benjamin Gaignard2017-01-091-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Removing MMU configuration flag from DRM make few automatic build failed when they answer yes to all flags. Add asm/vga.h file on Blackfin architecture to not broke compilation. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Fixes: 62a0d98a188c ("drm: allow to use mmuless SoC") Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1483789151-6603-1-git-send-email-benjamin.gaignard@linaro.org
| | * | | | | Merge tag 'docs-4.10' of git://git.lwn.net/linux into drm-misc-nextDaniel Vetter2016-12-131-1/+1
| | |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Backmerge the docs-next branch from Jon into drm-misc so that we can apply the dma-buf documentation cleanup patches. Git found a conflict where there was none because both drm-misc and docs had identical patches to clean up file rename issues in the rst include directives. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
* | | \ \ \ \ \ Merge tag 'armsoc-drivers' of ↵Linus Torvalds2017-02-242-15/+3
|\ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Arnd Bergmann: "Driver updates for ARM SoCs. A handful of driver changes this time around. The larger changes are: - Reset drivers for hi3660 and zx2967 - AHCI driver for Davinci, acked by Tejun and brought in here due to platform dependencies - Cleanups of atmel-ebi (External Bus Interface) - Tweaks for Rockchip GRF (General Register File) usage (kitchensink misc register range on the SoCs) - PM domains changes for support of two new ZTE SoCs (zx296718 and zx2967)" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (53 commits) soc: samsung: pmu: Add register defines for pad retention control reset: make zx2967 explicitly non-modular reset: core: fix reset_control_put soc: samsung: pm_domains: Read domain name from the new label property soc: samsung: pm_domains: Remove message about failed memory allocation soc: samsung: pm_domains: Remove unused name field soc: samsung: pm_domains: Use full names in subdomains registration log sata: ahci-da850: un-hardcode the MPY bits sata: ahci-da850: add a workaround for controller instability sata: ahci: export ahci_do_hardreset() locally sata: ahci-da850: implement a workaround for the softreset quirk sata: ahci-da850: add device tree match table sata: ahci-da850: get the sata clock using a connection id soc: samsung: pmu: Remove duplicated define for ARM_L2_OPTION register memory: atmel-ebi: Enable the SMC clock if specified soc: samsung: pmu: Remove unused and duplicated defines memory: atmel-ebi: Properly handle multiple reference to the same CS memory: atmel-ebi: Fix the test to enable generic SMC logic soc: samsung: pm_domains: Add new Exynos5433 compatible soc: samsung: pmu: Add dummy support for Exynos5433 SoC ...
| * \ \ \ \ \ \ \ Merge tag 'samsung-drivers-soc-pmu-4.11-2' of ↵Olof Johansson2017-01-301-3/+3
| |\ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/drivers Continuation of improvements for Exynos PM drivers for v4.11: 1. Add support for Exynos5433 to Power Management Unit (PMU) and Power Domains drivers. 2. Cleanups of duplicated and unused defines. * tag 'samsung-drivers-soc-pmu-4.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: soc: samsung: pmu: Remove duplicated define for ARM_L2_OPTION register soc: samsung: pmu: Remove unused and duplicated defines soc: samsung: pm_domains: Add new Exynos5433 compatible soc: samsung: pmu: Add dummy support for Exynos5433 SoC Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | | | soc: samsung: pmu: Remove duplicated define for ARM_L2_OPTION registerKrzysztof Kozlowski2017-01-271-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The register ARM_L2_OPTION (0x2608 in Exynos4 and Exynos5 PMU) was defined twice. Both names were used in the Exynos542x code. Simplify this. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
| * | | | | | | | | Merge tag 'v4.11-armsoc-drivers1' of ↵Olof Johansson2017-01-291-12/+0
| |\ \ \ \ \ \ \ \ \ | | |_|/ / / / / / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/drivers Some extensions to the power-domain driver to support domains in hiword registers (write-mask in upper 16bit) and domain-definitions for the rk3328 soc. Secondly a "driver" that attaches to the already existing grf nodes and is able to set static defaults for settings that cannot really be attached to any specific subsystem. Most GRF settings can already be set from drivers using them, but there are some behavioural settings like the mmc/jtag switch that cannot. As the commit message states this is really meant as a last line of defence for things that neither belong to a subsystem nor to the Having this here allows arm64 socs to have this as well and also moves another bit of code out of the arm32 mach-rockchip. * tag 'v4.11-armsoc-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: rockchip: drop rk3288 jtag/mmc switch handling soc: rockchip: add driver handling grf setup dt-bindings: add used but undocumented rockchip grf compatible values soc: rockchip: power-domain: add power domain support for rk3328 dt-bindings: add binding for rk3328 power domains dt-bindings: power: add RK3328 SoCs header for idle-request soc: rockchip: power-domain: Support domain control in hiword-registers Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | | | ARM: rockchip: drop rk3288 jtag/mmc switch handlingHeiko Stuebner2017-01-061-12/+0
| | |/ / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We moved that functionality to a more generic place where it can also be used for other socs, so drop it from architecture code. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
* | | | | | | | | Merge tag 'armsoc-dt64' of ↵Linus Torvalds2017-02-2466-1503/+4749
|\ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM 64-bit DT updates from Arnd Bergmann: "ARM64 DT updates are fairly small this time, only two new SoCs and a handful of new machines get added, all of them similar to other hardware we already support. New SoC: - HiSilicon Kirin960/Hi3660 and HiKey960 development board - NXP LS1012a with three reference boards: http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/qoriq-layerscape-arm-processors/qoriq-layerscape-1012a-low-power-communication-processor:LS1012A New development board: - Banana Pi M64, based on Allwinner A64: http://www.banana-pi.org/m64.html - SolidRun MACCHIATOBin based on Marvell Armada 8K: https://www.solid-run.com/marvell-armada-family/armada-8040-community-board/ - Broadcom BCM958712DxXMC NorthStar2 reference board (another one) A lot of platforms improve support for existing machines by adding extra devices for which a binding and driver is availabe: Allwinner: - MMC, USB ARM Juno: - Coresight, STM Broadcom: - NS2 GICv2m irqchip and PCIe Marvell: - Armada 3700 SPI, I2C, ethernet switch Mediatek: - MT8173 thermal NXP i.MX: - LS1046A thermal Qualcomm: - coresight on MSM8916, HDMI, WCNSS, SCM Renesas: - r8a779[56] thermal, powerdomain, ethernet, sound, pwm, can, can fd Rockchip: - thermal, eDP, pinctrl enhancements Samsung: - TM2 touchkey, Exynos5433 HDMI and power management improvements UniPhier: - SD reset, eMMC controller ZTE: - oppv2 cpufreq" * tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (110 commits) arm64: dts: qcom: Add msm8916 CoreSight components arm64: dts: marvell: adjust name of sd-mmc-gop clock in syscon arm64: allwinner: add BananaPi-M64 support arm64: allwinner: a64: add UART1 pin nodes arm64: allwinner: pine64: add MMC support arm64: allwinner: a64: Increase the MMC max frequency arm64: allwinner: a64: Add MMC pinctrl nodes arm64: allwinner: a64: Add MMC nodes dt-bindings: clockgen: Add compatible string for LS1012A Documentation: DT: add LS1012A compatible for SCFG and DCFG Documentation: DT: Add entry for FSL LS1012A RDB, FRDM, QDS boards arm64: dts: marvell: add generic-ahci compatibles for CP110 ahci arm64: tegra: Use symbolic reset identifiers arm64: dts: r8a7796: Mark EthernetAVB device node disabled arm64: dts: r8a7795: Mark EthernetAVB device node disabled arm64: dts: r8a7795: tidyup audma definition order arm64: dts: r8a7796: Link ARM GIC to clock and clock domain arm64: dts: r8a7795: Link ARM GIC to clock and clock domain arm64: dts: r8a7796: Add R-Car Gen3 thermal support arm64: dts: r8a7795: Add R-Car Gen3 thermal support ...
| * \ \ \ \ \ \ \ \ Merge tag 'mvebu-dt64-4.11-3' of git://git.infradead.org/linux-mvebu into ↵Arnd Bergmann2017-02-092-2/+2
| |\ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | next/dt64 Pull "mvebu dt for 4.11 (part 3)" from Gregory CLEMENT: adjust name of sd-mmc-gop clock in sysco for Armada 7K/8K * tag 'mvebu-dt64-4.11-3' of git://git.infradead.org/linux-mvebu: arm64: dts: marvell: adjust name of sd-mmc-gop clock in syscon
| | * | | | | | | | | arm64: dts: marvell: adjust name of sd-mmc-gop clock in sysconThomas Petazzoni2017-01-312-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adjusts the names of gatable clock #18 of the Marvell Armada CP110 system controller. This clock not only controls SD/MMC, but also the GOP (Group Of Ports) used for networking. So the clock is renamed to {cpm,cps}-sd-mmc-gop instead of {cpm,cps}-sd-mmc. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
| * | | | | | | | | | Merge tag 'qcom-arm64-for-4.11-2' of ↵Arnd Bergmann2017-02-091-0/+240
| |\ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt64 Pull "Qualcomm ARM64 Updates for v4.11 Part 2" from Andy Gross: * Add CoreSight nodes for MSM8916 * tag 'qcom-arm64-for-4.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: arm64: dts: qcom: Add msm8916 CoreSight components
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-09 19:13:49 +0100