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* ARM: i.MX clk: Move clock check function in common locationAlexander Shiyan2014-07-1813-73/+32
| | | | | | | | This patch moves clock check function in common i.MX location and switch i.MX clk drivers to use this new function. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: i.MX27 clk: Use of_clk_init() for DT caseAlexander Shiyan2014-07-183-35/+29
| | | | | | | Replace .init_time() hook with of_clk_init() for DT targets. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: i.MX27 clk: Separate DT and non-DT init procedureAlexander Shiyan2014-07-181-15/+24
| | | | | | | | This patch separates DT and non-DT clock initialization procedure, so we can avoid a lot of unneeded clk_register_clkdev() for DT case. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: i.MX: Remove excess variableAlexander Shiyan2014-07-181-8/+7
| | | | | | | | Base address for driver is global, there are no need to use intermediate variable for it. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: i.MX: Use of_clk_get_by_name() for timer clocks for DT case.Alexander Shiyan2014-07-187-28/+25
| | | | | | | | | Use of_clk_get_by_name() for timer clocks for DT case. This patch eliminates a lot of unneeded clk_register_clkdev() calls for GPT. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx: defconfig: Select CONFIG_FHANDLEFabio Estevam2014-07-183-0/+3
| | | | | | | | CONFIG_FHANDLE=y is needed when running systemd with version >=210, so that it can spawn a serial tty via getty. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: remove mx51.h and mx53.hShawn Guo2014-07-185-654/+0
| | | | | | | Now all the macros in mx51.h and mx53.h are used nowhere, so remove them. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: clean function declarations in mx51.hShawn Guo2014-07-182-5/+1
| | | | | | | The mx51_display_revision() is a dead declaration. Remove it. Also, move mx51_revision() into common.h. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: remove file mm-imx5.cShawn Guo2014-07-186-67/+1
| | | | | | | | The only code left in mm-imx5.c is to create static mapping. While all IMX platform code are moved to use dynamic mapping, the file can just be removed now. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: move init hooks into mach-imx5x.cShawn Guo2014-07-184-48/+50
| | | | | | | | | | | | | | | These imx5 init_early[late] hooks are called only from mach-imx5x.c. Let's move them into mach-imx5x.c. While at it, replace the static mapping in imx51_ipu_mipi_setup() with dynamic mapping. Also this function and imx_src_init() do not necessarily to be called at .init_early hook, so move them into .init_machine. The mxc_iomux_v3_init() is dropped from imx51_init_early() in the moving, since it's only needed by non-DT boot. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: use dynamic mapping for Cortex and GPC blockShawn Guo2014-07-183-34/+60
| | | | | | | | The imx5 pm code uses static mapping to access Cortex and GPC registers. The patch create struct imx5_pm_data to encode physical address of Cortex and GPC block, and create dynamic mapping for them at run-time. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: reuse clock CCM mapping in pm codeShawn Guo2014-07-183-4/+17
| | | | | | | | The imx5 pm code needs to access CCM registers. Let's remove the use of CCM static mapping in pm code by reusing the dynamic mapping created in clock code. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: use dynamic mapping for DPLL blockShawn Guo2014-07-181-17/+48
| | | | | | | | | | | Replace the static mapping of DPLL block with dynamic mapping by calling ioremap(). Ideally, this should be done by calling of_iomap(), so that the physical address of DPLL can also be retrieved from device tree. But unfortunately, DPLL blocks are not defined in DT in the first place. So to maintain the compatibility of existing DTB, we use ioremap() with physical address defines in the code. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: use dynamic mapping for CCM blockShawn Guo2014-07-181-39/+51
| | | | | | | | | Replace the static mapping of CCM block with dynamic mapping and retrieve CCM base address from device tree. Though it's not nice to encode the variable ccm_base in macros, it helps to avoid a massive churn on the code. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: remove header crm-regs-imx5.hShawn Guo2014-07-183-602/+70
| | | | | | | Most of the macros in crm-regs-imx5.h are used nowhere. Let's move the needed ones into the C files, and remove the header. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: retrieve iim base from device treeShawn Guo2014-07-181-4/+21
| | | | | | | | Instead of using static define and mapping, the patch changes imx5 code that reads chip revision from IIM to retrieve base address from device tree and use dynamic mapping. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: call mxc_timer_init_dt() on imx51Shawn Guo2014-07-181-1/+1
| | | | | | | Since i.MX51 supports DT only, it's more appropriate to call mxc_timer_init_dt() than mxc_timer_init() to initialize timer. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: remove function imx51_soc_init()Shawn Guo2014-07-182-34/+0
| | | | | | | The function imx51_soc_init() was used by non-DT boot only. Since i.MX51 supports DT only, the function can be removed now. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: tzic_init_irq() can directly be .init_irq hookShawn Guo2014-07-186-26/+10
| | | | | | | | After i.MX51 supports DT only, tzic_init_irq() can figure out the tzic_base on its own. Thus, it can directly be .init_irq hook, and mx51[53]_init_irq() can be saved. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: drop arguments from mx5_clocks_common_init()Shawn Guo2014-07-181-10/+8
| | | | | | | | | The function mx5_clocks_common_init() was created with a number of arguments to pass oscillator clock rate in non-DT boot. Since i.MX5 is DT only platform, the arguments can be dropped, and the clock rate can just be retrieved from device tree. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: make mx51_clocks_init() a DT callShawn Guo2014-07-182-15/+3
| | | | | | | Since i.MX51 becomes a DT only platform, we can make mx51_clocks_init() a DT call and save function mx51_clocks_init_dt() now. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: remove i.MX5 non-DT device registration helpersShawn Guo2014-07-1813-190/+1
| | | | | | | i.MX5 is DT only platforms, so these non-DT device registration helpers is used nowhere. Remove them. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: remove imx51 non-DT support filesShawn Guo2014-07-185-1073/+1
| | | | | | | Since i.MX51 becomes a DT only platform, those non-DT support files can be removed now. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: drop option MACH_IMX51_DTShawn Guo2014-07-185-10/+6
| | | | | | | | | Since i.MX51 becomes DT only now, we can drop option MACH_IMX51_DT and just use SOC_IMX51 instead. While at it, rename imx51-dt.c to mach-imx51.c to align with the name schema of other IMX DT only platforms. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: move SOC_IMX5 and SOC_IMX51 into 'Device tree only'Shawn Guo2014-07-181-12/+11
| | | | | | | | | | | After moving SOC_IMX51 support over to device tree, all i.MX5 support becomes device tree only now. So options SOC_IMX5 and SOC_IMX51 can just be under 'Device tree only'. While at it, 'select ARCH_MXC_IOMUX_V3' is dropped, since it's only needed by non-DT build before. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx: move EHCI platform defines out of platform_data headerShawn Guo2014-07-1826-0/+75
| | | | | | | | The platform_data header usb-ehci-mxc.h has a lot of stuff used by only IMX platform code. They shouldn't be really in this header but a IMX platform local header. Create ehci.h and move these stuff into it. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: i.MX: Remove registration helper for i.MX1 USB UDCAlexander Shiyan2014-07-184-95/+0
| | | | | | | | | imx_udc driver was removed from the kernel of about 10 months ago. This patch removes a registration helper for this driver and orphaned driver header. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: i.MX1 clk: Add devicetree supportAlexander Shiyan2014-07-181-71/+82
| | | | | | | This patch adds devicetree support CCM module for i.MX1 (MC9328MX1) CPUs. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx: remove unused definesPaul Bolle2014-07-181-33/+0
| | | | | | | | | None of the defines "for modules using static and dynamic DMA channels" are used. Remove these. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: i.MX: Select HAVE_IMX_SRC for i.MX5 globallyAlexander Shiyan2014-07-181-3/+1
| | | | | | | | No reason to choose a symbol HAVE_IMX_SRC separately for each supported i.MX5 CPU, this patch selects this symbol globally for i.MX5. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: clk-imx6q: parent lvds_sel input from upstream clock gatesLucas Stach2014-07-181-2/+2
| | | | | | | | | | | | | | | | | | | | The i.MX6 reference manual doesn't make a clear distinction between the fixed clock divider and the enable gate for the pcie and sata reference clocks. This lead to the lvds mux inputs in the imx6q clk driver to be parented from the ref clock (which is the divider) instead of the actual gate, which in turn prevents the upstream clock to actually be enabled when lvds clk out is active. This fixes a hard machine hang regression in kernel 3.16 for boards where only pcie is active but no sata, as with this kernel version the imx6-pcie driver is no longer enabling the upstream clock directly but only lvds clk out. Reported-by: Arne Ruhnau <arne.ruhnau@target-sg.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Tested-by: Arne Ruhnau <arne.ruhnau@target-sg.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-armLinus Torvalds2014-06-295-6/+42
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM fixes from Russell King: "Another round of ARM fixes. The largest change here is the L2 changes to work around problems for the Armada 37x/380 devices, where most of the size comes down to comments rather than code. The other significant fix here is for the ptrace code, to ensure that rewritten syscalls work as intended. This was pointed out by Kees Cook, but Will Deacon reworked the patch to be more elegant. The remainder are fairly trivial changes" * 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: ARM: 8087/1: ptrace: reload syscall number after secure_computing() check ARM: 8086/1: Set memblock limit for nommu ARM: 8085/1: sa1100: collie: add top boot mtd partition ARM: 8084/1: sa1100: collie: revert back to cfi_probe ARM: 8080/1: mcpm.h: remove unused variable declaration ARM: 8076/1: mm: add support for HW coherent systems in PL310 cache
| * ARM: 8087/1: ptrace: reload syscall number after secure_computing() checkWill Deacon2014-06-291-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the syscall tracing path, we call out to secure_computing() to allow seccomp to check the syscall number being attempted. As part of this, a SIGTRAP may be sent to the tracer and the syscall could be re-written by a subsequent SET_SYSCALL ptrace request. Unfortunately, this new syscall is ignored by the current code unless TIF_SYSCALL_TRACE is also set on the current thread. This patch slightly reworks the enter path of the syscall tracing code so that we always reload the syscall number from current_thread_info()->syscall after the potential ptrace traps. Acked-by: Kees Cook <keescook@chromium.org> Tested-by: Kees Cook <keescook@chromium.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 8086/1: Set memblock limit for nommuLaura Abbott2014-06-291-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Commit 1c2f87c (ARM: 8025/1: Get rid of meminfo) changed find_limits to use memblock_get_current_limit for calculating the max_low pfn. nommu targets never actually set a limit on memblock though which means memblock_get_current_limit will just return the default value. Set the memblock_limit to be the end of DDR to make sure bounds are calculated correctly. Signed-off-by: Laura Abbott <lauraa@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 8085/1: sa1100: collie: add top boot mtd partitionAndrea Adami2014-06-291-0/+5
| | | | | | | | | | | | | | | | The CFI mapping is now perfect so we can expose the top block, read only. There isn't much to read, though, just the sharpsl_params values. Signed-off-by: Andrea Adami <andrea.adami@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 8084/1: sa1100: collie: revert back to cfi_probeAndrea Adami2014-06-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Reverts commit d26b17edafc45187c30cae134a5e5429d58ad676 ARM: sa1100: collie.c: fall back to jedec_probe flash detection Unfortunately the detection was challenged on the defective unit used for tests: one of the NOR chips did not respond to the CFI query. Moreover that bad device needed extra delays on erase-suspend/resume cycles. Tested personally on 3 different units and with feedback of two other users. Signed-off-by: Andrea Adami <andrea.adami@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 8080/1: mcpm.h: remove unused variable declarationNicolas Pitre2014-06-291-2/+0
| | | | | | | | | | | | | | | | The sync_phys variable has been replaced by link time computation in mcpm_head.S before the code was submitted upstream. Signed-off-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 8076/1: mm: add support for HW coherent systems in PL310 cacheThomas Petazzoni2014-06-291-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a PL310 cache is used on a system that provides hardware coherency, the outer cache sync operation is useless, and can be skipped. Moreover, on some systems, it is harmful as it causes deadlocks between the Marvell coherency mechanism, the Marvell PCIe controller and the Cortex-A9. To avoid this, this commit introduces a new Device Tree property 'arm,io-coherent' for the L2 cache controller node, valid only for the PL310 cache. It identifies the usage of the PL310 cache in an I/O coherent configuration. Internally, it makes the driver disable the outer cache sync operation. Note that technically speaking, a fully coherent system wouldn't require any of the other .outer_cache operations. However, in practice, when booting secondary CPUs, these are not yet coherent, and therefore a set of cache maintenance operations are necessary at this point. This explains why we keep the other .outer_cache operations and only ->sync is disabled. While in theory any write to a PL310 register could cause the deadlock, in practice, disabling ->sync is sufficient to workaround the deadlock, since the other cache maintenance operations are only used in very specific situations. Contrary to previous versions of this patch, this new version does not simply NULL-ify the ->sync member, because the l2c_init_data structures are now 'const' and therefore cannot be modified, which is a good thing. Therefore, this patch introduces a separate l2c_init_data instance, called of_l2c310_coherent_data. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge branch 'x86/urgent' of ↵Linus Torvalds2014-06-2811-124/+297
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 fixes from Peter Anvin: "A pile of fixes related to the VDSO, EFI and 32-bit badsys handling. It turns out that removing the section headers from the VDSO breaks gdb, so this puts back most of them. A very simple typo broke rt_sigreturn on some versions of glibc, with obviously disastrous results. The rest is pretty much fixes for the corresponding fallout. The EFI fixes fixes an arithmetic overflow on 32-bit systems and quiets some build warnings. Finally, when invoking an invalid system call number on x86-32, we bypass a bunch of handling, which can make the audit code oops" * 'x86/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: efi-pstore: Fix an overflow on 32-bit builds x86/vdso: Error out in vdso2c if DT_RELA is present x86/vdso: Move DISABLE_BRANCH_PROFILING into the vdso makefile x86_32, signal: Fix vdso rt_sigreturn x86_32, entry: Do syscall exit work on badsys (CVE-2014-4508) x86/vdso: Create .build-id links for unstripped vdso files x86/vdso: Remove some redundant in-memory section headers x86/vdso: Improve the fake section headers x86/vdso2c: Use better macros for ELF bitness x86/vdso: Discard the __bug_table section efi: Fix compiler warnings (unused, const, type)
| * | x86/vdso: Error out in vdso2c if DT_RELA is presentAndy Lutomirski2014-06-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | vdso2c was checking for various types of relocations to detect when the vdso had undefined symbols or was otherwise dependent on relocation at load time. Undefined symbols in the vdso would fail if accessed at runtime, and certain implementation errors (e.g. branch profiling or incorrect symbol visibilities) could result in data access through the GOT that requires relocations. This could be as simple as: extern char foo; return foo; Without some kind of visibility control, the compiler would assume that foo could be interposed at load time and would generate a relocation. x86-64 and x32 (as opposed to i386) use explicit-addent (RELA) instead of implicit-addent (REL) relocations for data access, and vdso2c forgot to detect those. Whether these bad relocations would actually fail at runtime depends on what the linker sticks in the unrelocated references. Nonetheless, these relocations have no business existing in the vDSO and should be fixed rather than silently ignored. This error could trigger on some configurations due to branch profiling. The previous patch fixed that. Signed-off-by: Andy Lutomirski <luto@amacapital.net> Link: http://lkml.kernel.org/r/74ef0c00b4d2a3b573e00a4113874e62f772e348.1403642755.git.luto@amacapital.net Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
| * | x86/vdso: Move DISABLE_BRANCH_PROFILING into the vdso makefileAndy Lutomirski2014-06-242-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DISABLE_BRANCH_PROFILING turns off branch profiling (i.e. a redefinition of 'if'). Branch profiling depends on a bunch of kernel-internal symbols and generates extra output sections, none of which are useful or functional in the vDSO. It's currently turned off for vclock_gettime.c, but vgetcpu.c also triggers branch profiling, so just turn it off in the makefile. This fixes the build on some configurations: the vdso could contain undefined symbols, and the fake section table overflowed due to ftrace's added sections. Signed-off-by: Andy Lutomirski <luto@amacapital.net> Link: http://lkml.kernel.org/r/bf1ec29e03b2bbc081f6dcaefa64db1c3a83fb21.1403642755.git.luto@amacapital.net Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
| * | x86_32, signal: Fix vdso rt_sigreturnAndy Lutomirski2014-06-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit: commit 6f121e548f83674ab4920a4e60afb58d4f61b829 Author: Andy Lutomirski <luto@amacapital.net> Date: Mon May 5 12:19:34 2014 -0700 x86, vdso: Reimplement vdso.so preparation in build-time C Contained this obvious typo: - restorer = VDSO32_SYMBOL(current->mm->context.vdso, rt_sigreturn); + restorer = current->mm->context.vdso + + selected_vdso32->sym___kernel_sigreturn; Note the missing 'rt_' in the new code. Fix it. Signed-off-by: Andy Lutomirski <luto@amacapital.net> Link: http://lkml.kernel.org/r/1eb40ad923acde2e18357ef2832867432e70ac42.1403361010.git.luto@amacapital.net Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
| * | x86_32, entry: Do syscall exit work on badsys (CVE-2014-4508)Andy Lutomirski2014-06-231-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The bad syscall nr paths are their own incomprehensible route through the entry control flow. Rearrange them to work just like syscalls that return -ENOSYS. This fixes an OOPS in the audit code when fast-path auditing is enabled and sysenter gets a bad syscall nr (CVE-2014-4508). This has probably been broken since Linux 2.6.27: af0575bba0 i386 syscall audit fast-path Cc: stable@vger.kernel.org Cc: Roland McGrath <roland@redhat.com> Reported-by: Toralf Förster <toralf.foerster@gmx.de> Signed-off-by: Andy Lutomirski <luto@amacapital.net> Link: http://lkml.kernel.org/r/e09c499eade6fc321266dd6b54da7beb28d6991c.1403558229.git.luto@amacapital.net Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
| * | x86/vdso: Create .build-id links for unstripped vdso filesAndy Lutomirski2014-06-201-3/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With this change, doing 'make vdso_install' and telling gdb: set debug-file-directory /lib/modules/KVER/vdso will enable vdso debugging with symbols. This is useful for testing, but kernel RPM builds will probably want to manually delete these symlinks or otherwise do something sensible when they strip the vdso/*.so files. If ld does not support --build-id, then the symlinks will not be created. Note that kernel packagers that use vdso_install may need to adjust their packaging scripts to accomdate this change. For example, Fedora's scripts create build-id symlinks themselves in a different location, so the spec should probably be updated to remove the symlinks created by make vdso_install. Signed-off-by: Andy Lutomirski <luto@amacapital.net> Link: http://lkml.kernel.org/r/a424b189ce3ced85fe1e82d032a20e765e0fe0d3.1403291930.git.luto@amacapital.net Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
| * | x86/vdso: Remove some redundant in-memory section headersAndy Lutomirski2014-06-203-24/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | .data doesn't need to be separate from .rodata: they're both readonly. .altinstructions and .altinstr_replacement aren't needed by anything except vdso2c; strip them from the final image. While we're at it, rather than aligning the actual executable text, just shove some unused-at-runtime data in between real data and text. My vdso image is still above 4k, but I'm disinclined to try to trim it harder for 3.16. For future trimming, I suspect that these sections could be moved to later in the file and dropped from the in-memory image: .gnu.version and .gnu.version_d (this may lose versions in gdb) .eh_frame (should be harmless) .eh_frame_hdr (I'm not really sure) .hash (AFAIK nothing needs this section header) Signed-off-by: Andy Lutomirski <luto@amacapital.net> Link: http://lkml.kernel.org/r/2e96d0c49016ea6d026a614ae645e93edd325961.1403129369.git.luto@amacapital.net Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
| * | x86/vdso: Improve the fake section headersAndy Lutomirski2014-06-208-67/+237
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fully stripping the vDSO has other unfortunate side effects: - binutils is unable to find ELF notes without a SHT_NOTE section. - Even elfutils has trouble: it can find ELF notes without a section table at all, but if a section table is present, it won't look for PT_NOTE. - gdb wants section names to match between stripped DSOs and their symbols; otherwise it will corrupt symbol addresses. We're also breaking the rules: section 0 is supposed to be SHT_NULL. Fix these problems by building a better fake section table. While we're at it, we might as well let buggy Go versions keep working well by giving the SHT_DYNSYM entry the correct size. This is a bit unfortunate: it adds quite a bit of size to the vdso image. If/when binutils improves and the improved versions become widespread, it would be worth considering dropping most of this. Signed-off-by: Andy Lutomirski <luto@amacapital.net> Link: http://lkml.kernel.org/r/0e546a5eeaafdf1840e6ee654a55c1e727c26663.1403129369.git.luto@amacapital.net Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
| * | x86/vdso2c: Use better macros for ELF bitnessAndy Lutomirski2014-06-202-40/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than using a separate macro for each replacement, use generic macros. Signed-off-by: Andy Lutomirski <luto@amacapital.net> Link: http://lkml.kernel.org/r/d953cd2e70ceee1400985d091188cdd65fba2f05.1403129369.git.luto@amacapital.net Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
| * | x86/vdso: Discard the __bug_table sectionAndy Lutomirski2014-06-201-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | It serves no purpose in user code. Signed-off-by: Andy Lutomirski <luto@amacapital.net> Link: http://lkml.kernel.org/r/2a5bebff42defd8a5e81d96f7dc00f21143c80e8.1403129369.git.luto@amacapital.net Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
* | | Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2014-06-2817-495/+201
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MIPS fixes from Ralf Baechle: "This is dominated by a large number of changes necessary for the MIPS BPF code. code. Aside of that there are - a fix for the MSC system controller support code. - a Turbochannel fix. - a recordmcount fix that's MIPS-specific. - barrier fixes to smp-cps / pm-cps after unrelated changes elsewhere in the kernel. - revert support for MSA registers in the signal frames. The reverted patch did modify the signal stack frame which of course is inacceptable. - fix math-emu build breakage with older compilers. - some related cleanup. - fix Lasat build error if CONFIG_CRC32 isn't set to y by the user" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (27 commits) MIPS: Lasat: Fix build error if CRC32 is not enabled. TC: Handle device_register() errors. MIPS: MSC: Prevent out-of-bounds writes to MIPS SC ioremap'd region MIPS: bpf: Fix stack space allocation for BPF memwords on MIPS64 MIPS: BPF: Use 32 or 64-bit load instruction to load an address to register MIPS: bpf: Fix PKT_TYPE case for big-endian cores MIPS: BPF: Prevent kernel fall over for >=32bit shifts MIPS: bpf: Drop update_on_xread and always initialize the X register MIPS: bpf: Fix is_range() semantics MIPS: bpf: Use pr_debug instead of pr_warn for unhandled opcodes MIPS: bpf: Fix return values for VLAN_TAG_PRESENT case MIPS: bpf: Use correct mask for VLAN_TAG case MIPS: bpf: Fix branch conditional for BPF_J{GT/GE} cases MIPS: bpf: Add SEEN_SKB to flags when looking for the PKT_TYPE MIPS: bpf: Use 'andi' instead of 'and' for the VLAN cases MIPS: bpf: Return error code if the offset is a negative number MIPS: bpf: Use the LO register to get division's quotient MIPS: mm: uasm: Fix lh micro-assembler instruction MIPS: uasm: Add SLT uasm instruction MIPS: uasm: Add s3s1s2 instruction builder ...
| * | | MIPS: Lasat: Fix build error if CRC32 is not enabled.Ralf Baechle2014-06-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Kconfig doesn't select CRC32 so it's possible to build a Lasat kernel without CONFIG_CRC32 resulting in a build error: LD vmlinux arch/mips/built-in.o: In function `lasat_init_board_info': (.text+0x22c): undefined reference to `crc32_le' arch/mips/built-in.o: In function `lasat_write_eeprom_info': (.text+0x7fc): undefined reference to `crc32_le' make: *** [vmlinux] Error 1 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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