summaryrefslogtreecommitdiffstats
path: root/arch (follow)
Commit message (Collapse)AuthorAgeFilesLines
* Merge branch 'for-linus' of ↵Linus Torvalds2011-03-1745-835/+1284
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: (41 commits) m68knommu: external interrupt support to ColdFire intc-simr controller m68knommu: external interrupt support to ColdFire intc-2 controller m68knommu: remove ColdFire CLOCK_DIV config option m68knommu: fix gpio warnings for ColdFire 5407 targets m68knommu: fix gpio warnings for ColdFire 532x targets m68knommu: fix gpio warnings for ColdFire 5307 targets m68knommu: fix gpio warnings for ColdFire 527x targets m68knommu: fix gpio warnings for ColdFire 5272 targets m68knommu: fix gpio warnings for ColdFire 5249 targets m68knommu: fix gpio warnings for ColdFire 523x targets m68knommu: fix gpio warnings for ColdFire 520x targets m68knommu: fix gpio warnings for ColdFire 5206e targets m68knommu: fix gpio warnings for ColdFire 5206 targets m68knommu: fixing compiler warnings m68knommu: limit interrupts supported by ColdFire intc-simr driver m68knommu: move some init code out of unmask routine for ColdFire intc-2 m68knommu: limit interrupts supported by ColdFire intc-2 driver m68knommu: add basic support for the ColdFire based FireBee board m68knommu: make ColdFire internal peripheral region configurable m68knommu: clean up definitions of ColdFire peripheral base registers ...
| * m68knommu: external interrupt support to ColdFire intc-simr controllerGreg Ungerer2011-03-152-4/+113
| | | | | | | | | | | | | | | | | | | | The EDGE Port module of some ColdFire parts using the intc-simr interrupt controller provides support for 7 external interrupts. These interrupts go off-chip (that is they are not for internal peripherals). They need some special handling and have some extra setup registers. Add code to support them. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: external interrupt support to ColdFire intc-2 controllerGreg Ungerer2011-03-154-4/+97
| | | | | | | | | | | | | | | | | | | | The EDGE Port module of some ColdFire parts using the intc-2 interrupt controller provides support for 7 external interrupts. These interrupts go off-chip (that is they are not for internal peripherals). They need some special handling and have some extra setup registers. Add code to support them. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: remove ColdFire CLOCK_DIV config optionGreg Ungerer2011-03-1513-16/+15
| | | | | | | | | | | | | | | | | | | | The reality is that you do not need the abiltity to configure the clock divider for ColdFire CPUs. It is a fixed ratio on any given ColdFire family member. It is not the same for all ColdFire parts, but it is always the same in a model range. So hard define the divider for each supported ColdFire CPU type and remove the Kconfig option. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: fix gpio warnings for ColdFire 5407 targetsGreg Ungerer2011-03-151-3/+3
| | | | | | | | | | | | | | | | | | | | Fix these compiler warnings: arch/m68knommu/platform/5407/gpio.c:35:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5407/gpio.c:36:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5407/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: fix gpio warnings for ColdFire 532x targetsGreg Ungerer2011-03-151-83/+83
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix these compiler warnings: arch/m68knommu/platform/532x/gpio.c:35:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/532x/gpio.c:36:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/532x/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/532x/gpio.c:51:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/532x/gpio.c:52:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/532x/gpio.c:53:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/532x/gpio.c:54:3: warning: initialisation makes pointer from integer without a cast ... Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: fix gpio warnings for ColdFire 5307 targetsGreg Ungerer2011-03-151-3/+3
| | | | | | | | | | | | | | | | | | | | Fix these compiler warnings: arch/m68knommu/platform/5307/gpio.c:35:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5307/gpio.c:36:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5307/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: fix gpio warnings for ColdFire 527x targetsGreg Ungerer2011-03-151-156/+156
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix these compiler warnings: arch/m68knommu/platform/527x/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/527x/gpio.c:38:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/527x/gpio.c:39:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/527x/gpio.c:53:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/527x/gpio.c:54:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/527x/gpio.c:55:3: warning: initialisation makes pointer from integer without a cast ... Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: fix gpio warnings for ColdFire 5272 targetsGreg Ungerer2011-03-151-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix these compiler warnings: arch/m68knommu/platform/5272/gpio.c:35:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5272/gpio.c:36:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5272/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5272/gpio.c:51:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5272/gpio.c:52:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5272/gpio.c:53:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5272/gpio.c:67:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5272/gpio.c:68:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5272/gpio.c:69:3: warning: initialisation makes pointer from integer without a cast Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: fix gpio warnings for ColdFire 5249 targetsGreg Ungerer2011-03-151-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | Fix these compiler warnings: arch/m68knommu/platform/5249/gpio.c:35:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5249/gpio.c:36:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5249/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5249/gpio.c:51:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5249/gpio.c:52:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5249/gpio.c:53:3: warning: initialisation makes pointer from integer without a cast Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: fix gpio warnings for ColdFire 523x targetsGreg Ungerer2011-03-151-68/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | Fix these compiler warnings: arch/m68knommu/platform/523x/gpio.c:36:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/523x/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/523x/gpio.c:38:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/523x/gpio.c:52:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/523x/gpio.c:53:3: warning: initialisation makes pointer from integer without a cast ... Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: fix gpio warnings for ColdFire 520x targetsGreg Ungerer2011-03-151-48/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | Fix these compiler warnings: rch/m68knommu/platform/520x/gpio.c:35:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/520x/gpio.c:36:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/520x/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/520x/gpio.c:51:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/520x/gpio.c:52:3: warning: initialisation makes pointer from integer without a cast ... Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: fix gpio warnings for ColdFire 5206e targetsGreg Ungerer2011-03-151-3/+3
| | | | | | | | | | | | | | | | | | | | Fix these compiler warnings: arch/m68knommu/platform/5206e/gpio.c:35:3: warning: initialisation makes pointer from integer without a cast CC kernel/panic.o arch/m68knommu/platform/5206e/gpio.c:36:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5206e/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: fix gpio warnings for ColdFire 5206 targetsGreg Ungerer2011-03-151-3/+3
| | | | | | | | | | | | | | | | | | | | Fix these compiler warnings: arch/m68knommu/platform/5206/gpio.c:35:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5206/gpio.c:36:3: warning: initialisation makes pointer from integer without a cast arch/m68knommu/platform/5206/gpio.c:37:3: warning: initialisation makes pointer from integer without a cast Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: fixing compiler warningsAlexander Kurz2011-03-151-105/+105
| | | | | | | | | | Signed-off-by: Alexander Kurz <linux@kbdbabel.org> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: limit interrupts supported by ColdFire intc-simr driverGreg Ungerer2011-03-151-23/+24
| | | | | | | | | | | | | | | | | | | | The intc-simr interrupt controller on some ColdFire CPUs has a set range of interrupts its supports (64 through 128 or 192 depending on model). We shouldn't be setting this handler for every possible interrupt from 0 to 255. Set more appropriate limits, and this means we can drop the interrupt number check in the mask and unmask routines. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: move some init code out of unmask routine for ColdFire intc-2Greg Ungerer2011-03-151-15/+32
| | | | | | | | | | | | | | | | Use a proper irq_startup() routine to intialize the interrupt priority and level register in the ColdFire intc-2 controller code. We shouldn't be checking if the priority/level has been set on every unmask operation. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: limit interrupts supported by ColdFire intc-2 driverGreg Ungerer2011-03-151-33/+25
| | | | | | | | | | | | | | | | | | | | The intc-2 interrupt controller on some ColdFire CPUs has a set range of interrupts its supports (64 through 128 or 192 depending on model). We shouldn't be setting this handler for every possible interrupt from 0 to 255. Set more appropriate limits, and this means we can drop the interrupt number check in the mask and unmask routines. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: add basic support for the ColdFire based FireBee boardGreg Ungerer2011-03-153-0/+93
| | | | | | | | | | | | | | The FireBee is a ColdFire 5475 based board. Add a configuration option to support it, and the basic platform flash layout code. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: make ColdFire internal peripheral region configurableGreg Ungerer2011-03-152-6/+49
| | | | | | | | | | | | | | | | | | | | | | | | Most ColdFire CPUs have an internal peripheral set that can be mapped at a user selectable address. Different ColdFire parts either use an MBAR register of an IPSBAR register to map the peripheral region. Most boards use the Freescale default mappings - but not all. Make the setting of the MBAR or IPSBAR register configurable. And only make the selection available on the appropriate ColdFire CPU types. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: clean up definitions of ColdFire peripheral base registersGreg Ungerer2011-03-151-6/+11
| | | | | | | | | | | | | | | | | | | | | | | | Different ColdFire CPUs have different ways of defining where their internal peripheral registers sit in their address space. Some use an MBAR register, some use and IPSBAR register, some have a fixed mapping. Now that most of the peripheral address definitions have been cleaned up we can clean up the setting of the MBAR and IPSBAR defines to limit them to just where they are needed (and where they actually exist). Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: clean up use of MBAR for DRAM registers on ColdFire startGreg Ungerer2011-03-158-49/+49
| | | | | | | | | | | | | | | | | | | | | | | | In some of the RAM size autodetection code on ColdFire CPU startup we reference DRAM registers relative to the MBAR register. Not all of the supported ColdFire CPUs have an MBAR, and currently this works because we fake an MBAR address on those registers. In an effort to clean this up, and eventually remove the fake MBAR setting make the DRAM register address definitions actually contain the MBAR (or IPSBAR as appropriate) value as required. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: remove use of MBAR in old-style ColdFire timerGreg Ungerer2011-03-158-26/+37
| | | | | | | | | | | | | | | | | | Not all ColdFire CPUs that use the old style timer hardware module use an MBAR set peripheral region. Move the TIMER base address defines to the per-CPU header files where we can set it correctly based on how the peripherals are mapped - instead of using a fake MBAR for some platforms. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: move ColdFire DMA register addresses to per-cpu headersGreg Ungerer2011-03-1510-27/+58
| | | | | | | | | | | | | | | | | | | | | | The base addresses of the ColdFire DMA unit registers belong with all the other address definitions in the per-cpu headers. The current definitions assume they are relative to an MBAR register. Not all ColdFire CPUs have an MBAR register. A clean address define can only be acheived in the per-cpu headers along with all the other chips peripheral base addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: remove use of MBAR value for ColdFire 528x peripheral addressingGreg Ungerer2011-03-152-10/+16
| | | | | | | | | | | | | | | | The ColdFire 528x family of CPUs does not have an MBAR register, so don't define its peripheral addresses relative to one. Its internal peripherals are relative to the IPSBAR register, so make sure to use that. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: remove use of MBAR value for ColdFire 527x peripheral addressingGreg Ungerer2011-03-152-10/+18
| | | | | | | | | | | | | | | | The ColdFire 527x family of CPUs does not have an MBAR register, so don't define its peripheral addresses relative to one. Its internal peripherals are relative to the IPSBAR register, so make sure to use that. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: remove use of MBAR value for ColdFire 523x peripheral addressingGreg Ungerer2011-03-152-8/+17
| | | | | | | | | | | | | | | | The ColdFire 523x family of CPUs does not have an MBAR register, so don't define its peripheral addresses relative to one. Its internal peripherals are relative to the IPSBAR register, so make sure to use that. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: remove MBAR and IPSBAR hacks for the ColdFire 520x CPUsGreg Ungerer2011-03-154-43/+44
| | | | | | | | | | | | | | | | | | | | The ColdFire 5207 and 5208 CPUs have fixed peripheral addresses. They do not use the setable peripheral address registers like the MBAR and IPSBAR used on many other ColdFire parts. Don't use fake values of MBAR and IPSBAR when using peripheral addresses for them, there is no need to. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: move ColdFire PIT timer base addressesGreg Ungerer2011-03-156-20/+32
| | | | | | | | | | | | | | | | | | | | | | | | The PIT hardware timer module used in some ColdFire CPU's is not always addressed relative to an IPSBAR register. Parts like the ColdFire 5207 and 5208 have fixed peripheral addresses. So lets not define the register addresses of the PIT relative to an IPSBAR definition. Move the base address definitions into the per-part headers. This is a lot more consistent since all the other peripheral base addresses are defined in the per-part header files already. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: remove bogus definition of MBAR for ColdFire 532x familyGreg Ungerer2011-03-151-3/+0
| | | | | | | | | | | | | | | | | | | | | | Remove the bogus definition of the MBAR register for the ColdFire 532x family. It doesn't have an MBAR register, its peripheral registers are at fixed addresses and are not relative to a settable base. All the code that relyed on this definition existing has been cleaned up. The register address definitions now include the base as required. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: remove kludge seting of MCF_IPSBAR for ColdFire 54xxGreg Ungerer2011-03-156-18/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ColdFire 54xx family shares the same interrupt controller used on the 523x, 527x and 528x ColdFire parts, but it isn't offset relative to the IPSBAR register. The 54xx doesn't have an IPSBAR register. By including the base address of the peripheral registers in the register definitions (MCFICM_INTC0 and MCFICM_INTC1 in this case) we can avoid having to define a fake IPSBAR for the 54xx. And this makes the register address definitions of these more consistent, the majority of the other register address defines include the peripheral base address already. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: move ColdFire 5249 MBAR2 definitionGreg Ungerer2011-03-152-1/+5
| | | | | | | | | | | | | | The MBAR2 register is only used on the ColdFire 5249 part, so move its definition out of the common coldfire.h and into the 5249 support header. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: Select GENERIC_HARDIRQS_NO_DEPRECATEDThomas Gleixner2011-03-151-0/+1
| | | | | | | | | | | | | | All chips converted and proper accessor functions used. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: Use proper irq_desc accessors inThomas Gleixner2011-03-151-2/+4
| | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: Convert 5249 intc irq_chip to new functionsThomas Gleixner2011-03-151-10/+10
| | | | | | | | | | | | | | /me idly wonders what sets the handlers for this chip. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: Convert 5272 intc irq_chip to new functionsThomas Gleixner2011-03-151-10/+18
| | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: Convert 68360 ints irq_chip to new functionsThomas Gleixner2011-03-151-9/+9
| | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: Convert 68328 ints irq_chip to new functionsThomas Gleixner2011-03-151-6/+6
| | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: Convert coldfire intc-simr irq_chip to newThomas Gleixner2011-03-151-6/+12
| | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: Convert coldfire intc-2 irq_chip to newThomas Gleixner2011-03-151-6/+10
| | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: Convert coldfire intc irq_chip to newThomas Gleixner2011-03-151-10/+10
| | | | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * m68knommu: 5772: Replace private irq flow handlerThomas Gleixner2011-03-151-4/+1
| | | | | | | | | | | | | | | | | | | | | | That handler lacks the minimal checks for action being zero etc. Keep the weird flow - ack before handling - intact and call into handle_simple_irq which does the right thing. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Greg Ungerer <gerg@uclinux.org> LKML-Reference: <20110202212552.413849952@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* | Merge branch 'release' of ↵Linus Torvalds2011-03-176-3/+10
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6 * 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6: [IA64] tioca: Fix assignment from incompatible pointer warnings [IA64] mca.c: Fix cast from integer to pointer warning [IA64] setup.c Typo fix "Architechtuallly" [IA64] Add CONFIG_MISC_DEVICES=y to configs that need it. [IA64] disable interrupts at end of ia64_mca_cpe_int_handler() [IA64] Add DMA_ERROR_CODE define. pstore: fix build warning for unused return value from sysfs_create_file pstore: X86 platform interface using ACPI/APEI/ERST pstore: new filesystem interface to platform persistent storage
| * \ Pull misc-2.6.39 into release branchTony Luck2011-03-166-3/+10
| |\ \ | | |/ | |/|
| | * [IA64] tioca: Fix assignment from incompatible pointer warningsJeff Mahoney2011-03-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The prototype for sn_pci_provider->{dma_map,dma_map_consistent} expects an unsigned long instead of a u64. Signed-off-by: Jeff Mahoney <jeffm@suse.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * [IA64] mca.c: Fix cast from integer to pointer warningJeff Mahoney2011-03-021-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ia64_mca_cpu_init has a void *data local variable that is assigned the value from either __get_free_pages() or mca_bootmem(). The problem is that __get_free_pages returns an unsigned long and mca_bootmem, via alloc_bootmem(), returns a void *. format_mca_init_stack takes the void *, and it's also used with __pa(), but that casts it to long anyway. This results in the following build warning: arch/ia64/kernel/mca.c:1898: warning: assignment makes pointer from integer without a cast Cast the return of __get_free_pages to a void * to avoid the warning. Signed-off-by: Jeff Mahoney <jeffm@suse.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * [IA64] setup.c Typo fix "Architechtuallly"Justin P. Mattock2011-03-021-1/+1
| | | | | | | | | | | | | | | | | | | | | s/Architechtuallly/Architecturally/ Signed-off-by: Justin P. Mattock <justinmattock@gmail.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * [IA64] Add CONFIG_MISC_DEVICES=y to configs that need it.Tony Luck2011-03-022-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> wrote: > While working on an defconfig (arm/mx27) I noticed that just updating > it results in removing CONFIG_EEPROM_AT24=y. The reason is that > since commit > > v2.6.36-5965-g5f2365d (misc devices: do not enable by default) > > MISC_DEVICES isn't enabled anymore by default. So all defconfigs that > have CONFIG_SOME_SYMBOL=y (or =m) (with SOME_SYMBOL depending on > MISC_DEVICES) but not CONFIG_MISC_DEVICES=y suffer from the same > problem. Reported-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * [IA64] disable interrupts at end of ia64_mca_cpe_int_handler()Tony Luck2011-02-251-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SAL requires that interrupts be enabled when making some calls to it to pick up error records, so we enable interrupts inside this handler. We should disable them again at the end. Found by a new WARN_ONCE that tglx added to handle_irq_event_percpu() Signed-off-by: Tony Luck <tony.luck@intel.com>
| | * [IA64] Add DMA_ERROR_CODE define.Konrad Rzeszutek Wilk2011-01-111-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This piggybacks on git commit 8fd524b355daef0945692227e726fb444cebcd4f ("x86: Kill bad_dma_address variable") wherein we use now the dma_map_ops->mapping_error to check for errors and the standard check is against DMA_ERROR_CODE. Introduce it to the IA64 world. CC: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> CC: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-26 22:36:00 +0100