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* Merge branch 'for-next/cpus_have_const_cap' into for-next/coreCatalin Marinas2023-10-2647-271/+402
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| * arm64: Remove cpus_have_const_cap()Mark Rutland2023-10-162-37/+2
| * arm64: Avoid cpus_have_const_cap() for ARM64_WORKAROUND_REPEAT_TLBIMark Rutland2023-10-162-3/+4
| * arm64: Avoid cpus_have_const_cap() for ARM64_WORKAROUND_NVIDIA_CARMEL_CNPMark Rutland2023-10-162-1/+3
| * arm64: Avoid cpus_have_const_cap() for ARM64_WORKAROUND_CAVIUM_23154Mark Rutland2023-10-162-0/+10
| * arm64: Avoid cpus_have_const_cap() for ARM64_WORKAROUND_2645198Mark Rutland2023-10-163-4/+4
| * arm64: Avoid cpus_have_const_cap() for ARM64_WORKAROUND_1742098Mark Rutland2023-10-162-3/+5
| * arm64: Avoid cpus_have_const_cap() for ARM64_WORKAROUND_1542419Mark Rutland2023-10-162-2/+2
| * arm64: Avoid cpus_have_const_cap() for ARM64_WORKAROUND_843419Mark Rutland2023-10-163-6/+6
| * arm64: Avoid cpus_have_const_cap() for ARM64_UNMAP_KERNEL_AT_EL0Mark Rutland2023-10-164-3/+5
| * arm64: Avoid cpus_have_const_cap() for ARM64_{SVE,SME,SME2,FA64}Mark Rutland2023-10-162-6/+6
| * arm64: Avoid cpus_have_const_cap() for ARM64_SPECTRE_V2Mark Rutland2023-10-161-1/+1
| * arm64: Avoid cpus_have_const_cap() for ARM64_SSBSMark Rutland2023-10-161-1/+1
| * arm64: Avoid cpus_have_const_cap() for ARM64_MTEMark Rutland2023-10-161-1/+1
| * arm64: Avoid cpus_have_const_cap() for ARM64_HAS_TLB_RANGEMark Rutland2023-10-161-1/+1
| * arm64: Avoid cpus_have_const_cap() for ARM64_HAS_WFXTMark Rutland2023-10-161-1/+1
| * arm64: Avoid cpus_have_const_cap() for ARM64_HAS_RNGMark Rutland2023-10-161-1/+1
| * arm64: Avoid cpus_have_const_cap() for ARM64_HAS_EPANMark Rutland2023-10-163-2/+4
| * arm64: Avoid cpus_have_const_cap() for ARM64_HAS_PANMark Rutland2023-10-162-2/+3
| * arm64: Avoid cpus_have_const_cap() for ARM64_HAS_GIC_PRIO_MASKINGMark Rutland2023-10-162-14/+8
| * arm64: Avoid cpus_have_const_cap() for ARM64_HAS_DITMark Rutland2023-10-161-1/+10
| * arm64: Avoid cpus_have_const_cap() for ARM64_HAS_CNPMark Rutland2023-10-164-14/+20
| * arm64: Avoid cpus_have_const_cap() for ARM64_HAS_CACHE_DICMark Rutland2023-10-161-1/+1
| * arm64: Avoid cpus_have_const_cap() for ARM64_HAS_BTIMark Rutland2023-10-165-10/+11
| * arm64: Avoid cpus_have_const_cap() for ARM64_HAS_ARMv8_4_TTLMark Rutland2023-10-161-1/+1
| * arm64: Avoid cpus_have_const_cap() for ARM64_HAS_{ADDRESS,GENERIC}_AUTHMark Rutland2023-10-161-2/+2
| * arm64: Use a positive cpucap for FP/SIMDMark Rutland2023-10-166-26/+44
| * arm64: Rename SVE/SME cpu_enable functionsMark Rutland2023-10-163-16/+12
| * arm64: Use build-time assertions for cpucap orderingMark Rutland2023-10-161-8/+6
| * arm64: Explicitly save/restore CPACR when probing SVE and SMEMark Rutland2023-10-163-7/+50
| * arm64: kvm: Use cpus_have_final_cap() explicitlyMark Rutland2023-10-169-15/+15
| * arm64: Split kpti_install_ng_mappings()Mark Rutland2023-10-161-21/+33
| * arm64: Fixup user features at boot timeMark Rutland2023-10-163-17/+15
| * arm64: Rework setup_cpu_features()Mark Rutland2023-10-163-24/+26
| * arm64: Add cpus_have_final_boot_cap()Mark Rutland2023-10-161-2/+25
| * arm64: Add cpucap_is_possible()Mark Rutland2023-10-163-29/+59
| * arm64: Factor out cpucap definitionsMark Rutland2023-10-164-6/+14
| * arm64/arm: xen: enlighten: Fix KPTI checksMark Rutland2023-10-161-9/+16
* | Merge branch 'for-next/feat_lse128' into for-next/coreCatalin Marinas2023-10-265-0/+5
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| * | arm64: add FEAT_LSE128 HWCAPJoey Gouly2023-10-135-0/+5
* | | Merge branch 'for-next/feat_lrcpc3' into for-next/coreCatalin Marinas2023-10-265-0/+5
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| * | arm64: add FEAT_LRCPC3 HWCAPJoey Gouly2023-10-135-0/+5
* | | Merge branch 'for-next/feat_sve_b16b16' into for-next/coreCatalin Marinas2023-10-265-1/+11
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| * | arm64/sve: Report FEAT_SVE_B16B16 to userspaceMark Brown2023-09-295-1/+11
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*-----. \ Merge branches 'for-next/sve-remove-pseudo-regs', 'for-next/backtrace-ipi', '...Catalin Marinas2023-10-2619-223/+206
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| | | | * arm64: cpufeature: Change DBM to display enabled coresJeremy Linton2023-10-231-25/+8
| | | | * arm64: cpufeature: Display the set of cores with a featureJeremy Linton2023-10-232-9/+15
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| | | * arm64: Restrict CPU_BIG_ENDIAN to GNU as or LLVM IAS 15.x or newerNathan Chancellor2023-10-261-0/+2
| | | * arm64: module: Fix PLT counting when CONFIG_RANDOMIZE_BASE=nMaria Yu2023-10-241-6/+0
| | | * arm64, irqchip/gic-v3, ACPI: Move MADT GICC enabled check into a helperJames Morse2023-10-241-1/+1
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