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* x86/boot/64: Explicitly map boot_params and command lineArvind Sankar2020-10-192-3/+23
* x86/head/64: Disable stack protection for head$(BITS).oArvind Sankar2020-10-191-0/+2
* x86/boot/64: Initialize 5-level paging variables earlierArvind Sankar2020-10-193-14/+16
* Merge tag 'x86_seves_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds2020-10-1467-450/+3986
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| * x86/sev-es: Use GHCB accessor for setting the MMIO scratch bufferTom Lendacky2020-09-251-1/+1
| * x86/sev-es: Check required CPU features for SEV-ESMartin Radev2020-09-105-6/+24
| * x86/efi: Add GHCB mappings when SEV-ES is activeTom Lendacky2020-09-104-0/+43
| * x86/sev-es: Handle NMI StateJoerg Roedel2020-09-094-0/+32
| * x86/sev-es: Support CPU offline/onlineJoerg Roedel2020-09-092-0/+64
| * x86/head/64: Don't call verify_cpu() on starting APsJoerg Roedel2020-09-093-0/+19
| * x86/smpboot: Load TSS and getcpu GDT entry before loading IDTJoerg Roedel2020-09-093-1/+25
| * x86/realmode: Setup AP jump tableTom Lendacky2020-09-094-2/+93
| * x86/realmode: Add SEV-ES specific trampoline entry pointJoerg Roedel2020-09-093-0/+26
| * x86/vmware: Add VMware-specific handling for VMMCALL under SEV-ESDoug Covelli2020-09-091-5/+45
| * x86/kvm: Add KVM-specific VMMCALL handling under SEV-ESTom Lendacky2020-09-091-6/+29
| * x86/paravirt: Allow hypervisor-specific VMMCALL handling under SEV-ESJoerg Roedel2020-09-092-1/+27
| * x86/sev-es: Handle #DB EventsJoerg Roedel2020-09-091-0/+17
| * x86/sev-es: Handle #AC EventsJoerg Roedel2020-09-091-0/+19
| * x86/sev-es: Handle VMMCALL EventsTom Lendacky2020-09-091-0/+23
| * x86/sev-es: Handle MWAIT/MWAITX EventsTom Lendacky2020-09-091-0/+10
| * x86/sev-es: Handle MONITOR/MONITORX EventsTom Lendacky2020-09-091-0/+13
| * x86/sev-es: Handle INVD EventsTom Lendacky2020-09-091-0/+4
| * x86/sev-es: Handle RDPMC EventsTom Lendacky2020-09-091-0/+22
| * x86/sev-es: Handle RDTSC(P) EventsTom Lendacky2020-09-093-0/+31
| * x86/sev-es: Handle WBINVD EventsTom Lendacky2020-09-091-0/+9
| * x86/sev-es: Handle DR7 read/write eventsTom Lendacky2020-09-091-0/+85
| * x86/sev-es: Handle MSR eventsTom Lendacky2020-09-091-0/+28
| * x86/sev-es: Handle MMIO String InstructionsJoerg Roedel2020-09-091-0/+77
| * x86/sev-es: Handle MMIO eventsTom Lendacky2020-09-092-0/+227
| * x86/sev-es: Handle instruction fetches from user-spaceJoerg Roedel2020-09-091-9/+22
| * x86/sev-es: Wire up existing #VC exit-code handlersJoerg Roedel2020-09-092-4/+9
| * x86/sev-es: Add a Runtime #VC Exception HandlerTom Lendacky2020-09-093-8/+255
| * x86/entry/64: Add entry code for #VC handlerJoerg Roedel2020-09-095-0/+171
| * x86/dumpstack/64: Add noinstr version of get_stack_info()Joerg Roedel2020-09-094-20/+30
| * x86/sev-es: Adjust #VC IST Stack on entering NMI handlerJoerg Roedel2020-09-093-0/+81
| * x86/sev-es: Allocate and map an IST stack for #VC handlerJoerg Roedel2020-09-095-14/+63
| * x86/sev-es: Setup per-CPU GHCBs for the runtime handlerTom Lendacky2020-09-093-1/+60
| * x86/sev-es: Setup GHCB-based boot #VC handlerJoerg Roedel2020-09-099-8/+176
| * x86/sev-es: Setup an early #VC handlerJoerg Roedel2020-09-093-1/+57
| * x86/sev-es: Compile early handler code into kernel imageJoerg Roedel2020-09-093-10/+175
| * x86/sev-es: Print SEV-ES info into the kernel logJoerg Roedel2020-09-081-3/+26
| * x86/sev-es: Add SEV-ES Feature DetectionJoerg Roedel2020-09-074-1/+16
| * x86/head/64: Move early exception dispatch to C codeJoerg Roedel2020-09-074-16/+20
| * x86/idt: Make IDT init functions static inlinesJoerg Roedel2020-09-073-34/+34
| * x86/head/64: Install a CPU bringup IDTJoerg Roedel2020-09-073-0/+45
| * x86/head/64: Switch to initial stack earlierJoerg Roedel2020-09-071-3/+6
| * x86/head/64: Load segment registers earlierJoerg Roedel2020-09-071-26/+26
| * x86/head/64: Load GDT after switch to virtual addressesJoerg Roedel2020-09-071-8/+8
| * x86/head/64: Install startup GDTJoerg Roedel2020-09-073-0/+48
| * x86/idt: Split idt_data setup out of set_intr_gate()Joerg Roedel2020-09-071-8/+14
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