summaryrefslogtreecommitdiffstats
path: root/arch (follow)
Commit message (Collapse)AuthorAgeFilesLines
* ARM: mmp: select CPU_PJ4Haojian Zhuang2010-12-182-4/+5
| | | | | | | | Since CPU_PJ4 is shared between PXA95x and MMP2, select CPU_PJ4 in MMP2 configuration. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* ARM: pxa: support saarb platformHaojian Zhuang2010-12-183-0/+119
| | | | | | | Saarb platform is a handheld platform that supports Marvell PXA955 silicon. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* ARM: pxa: support pxa95xHaojian Zhuang2010-12-1815-151/+486
| | | | | | | | The core of PXA955 is PJ4. Add new PJ4 support. And add new macro CONFIG_PXA95x. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* ARM: pxa: introduce pxa3xx_clock_sysclass for clock suspend/resumeEric Miao2010-12-184-28/+51
| | | | | Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* ARM: pxa: introduce pxa2xx_clock_sysclass for clock suspend/resumeEric Miao2010-12-164-8/+35
| | | | Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* ARM: pxa: remove get_memclk_frequency_10khz()Eric Miao2010-12-164-31/+21
| | | | | | | Introduce 'struct clk' for memory and remove get_memclk_frequency_10khz(). Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* ARM: pxa: separate the clock support into clock-{pxa2xx,pxa3xx}.cEric Miao2010-12-168-240/+266
| | | | Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* ARM: pxa: replace duplicated macro DEFINE_PXA3_CK() with DEFINE_CK()Eric Miao2010-12-162-17/+12
| | | | Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* ARM: pxa: redefine irqs.hHaojian Zhuang2010-12-162-36/+22
| | | | | | | | | | Define all IRQs in irqs.h. If some IRQs are sharing one IRQ number, define them together. If some IRQs are sharing same name with different IRQ number, define different IRQ. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Cc: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* ARM: pxa: redefine the cpu_is_pxa3xxHaojian Zhuang2010-12-161-5/+6
| | | | | | | | | | | | | | After introducing pxa930/pxa935 and new silicons, original cpuid rules of XScale generation 3 can't fit new silicons. Now redefine the rule of PXA3xx. Only PXA300/PXA310/PXA320/PXA930/PXA935 are family members of PXA3xx. PXA930/PXA935 are family members of PXA93x. PXA93x can be considered as PXA3xx + CP. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Cc: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* ARM: mmp: fix the typo - MMP2 is compatible with ARMv7Haojian Zhuang2010-12-161-2/+2
| | | | | Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* ARM: mmp: append brownstone supportHaojian Zhuang2010-12-163-0/+178
| | | | | Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* ARM: mmp: add usb clock for pxa168/pxa910cxie42010-12-161-0/+2
| | | | | Signed-off-by: Chao Xie <chao.xie@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* ARM: pxa/raumfeld: enable PXA3XX_GCU driverDaniel Mack2010-12-161-0/+5
| | | | | Signed-off-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* ARM: mmp: add sd card to jasperZhangfei Gao2010-12-161-0/+35
| | | | | | Signed-off-by: Zhangfei Gao <zhangfei.gao@marvell.com> Acked-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* ARM: mmp: add mmc resourceZhangfei Gao2010-12-163-0/+59
| | | | | | Signed-off-by: Zhangfei Gao <zhangfei.gao@marvell.com> Acked-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* ARM: pxa: Access SMEMC via virtual addressesMarek Vasut2010-12-1621-128/+156
| | | | | | | | | | | | | This is important because on PXA3xx, the physical mapping of SMEMC registers differs from the one on PXA2xx. In order to get PCMCIA working on both PXA2xx and PXA320, the PCMCIA driver was adjusted accordingly as well. Also, various places in the kernel had to be patched to use __raw_read/__raw_write. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* ARM: pxa: Introduce pxa{25x,27x,3xx}_map_io()Marek Vasut2010-12-1653-86/+143
| | | | | | | | | | | This patch introduces pxa2xx_map_io() and pxa3xx_map_io() to distinguish between PXA25x/PXA27x and PXA3xx memory mapping. Also, fixup for platforms broken after introducing pxa{25x,27x}_map_io() and pxa3xx_map_io() is included. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* ARM: pxa: introduce addr-map.h for large bus addresses and rangesEric Miao2010-12-164-20/+50
| | | | Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* ARM: pxa: remove un-used mapping of camera registersEric Miao2010-12-161-5/+0
| | | | | | | | The camera registers start and range are encoded into the platform device, and are actually handled by ioremap()'ed, thus the mapping in pxa_map_io() is not necessary. Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* crypto: ghash-intel - ghash-clmulni-intel_glue needs err.hRandy Dunlap2010-12-151-0/+1
| | | | | | | | | | Add missing header file: arch/x86/crypto/ghash-clmulni-intel_glue.c:256: error: implicit declaration of function 'IS_ERR' arch/x86/crypto/ghash-clmulni-intel_glue.c:257: error: implicit declaration of function 'PTR_ERR' Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* Merge branch 'sh-fixes-for-linus' of ↵Linus Torvalds2010-12-153-2/+5
|\ | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6 * 'sh-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: sh: wire up accept4 syscall (non-multiplexed path) sh: Enable deprecated IRQ chip APIs for MFD and GPIOLIB drivers.
| * sh: wire up accept4 syscall (non-multiplexed path)Carmelo AMOROSO2010-12-142-1/+3
| | | | | | | | | | Signed-off-by: Carmelo Amoroso <carmelo.amoroso@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: Enable deprecated IRQ chip APIs for MFD and GPIOLIB drivers.Paul Mundt2010-12-131-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There are still quite a number of MFD and GPIO expander drivers that are using the old irq_chip APIs that haven't had a chance to update during the .37 cycle, resulting in allyes/modconfig errors on some configurations. Mark Brown has done most of the legwork to get these fixed up in .38, so this should just be a .37 stop-gap that we can drop at the end of the .38 merge window. Reported-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | Merge branch 'omap-fixes-for-linus' of ↵Linus Torvalds2010-12-158-36/+79
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 * 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: OMAP2: PRCM: fix some SHIFT macros that were actually bitmasks OMAP2+: PM/serial: fix console semaphore acquire during suspend OMAP1: SRAM: fix size for OMAP1611 SoCs arm: omap2: io: fix clk_get() error check arm: plat-omap: counter_32k: use IS_ERR() instead of NULL check omap: nand: remove hardware ECC as default omap: zoom: wl1271 slot is MMC_CAP_POWER_OFF_CARD omap: PM debug: fix wake-on-timer debugfs dependency
| * | OMAP2: PRCM: fix some SHIFT macros that were actually bitmasksPaul Walmsley2010-12-111-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After Charu's GPIO hwmod patches, GPIO initialization on N800 emits the following messages for all GPIO banks: omap_hwmod: gpio1: cannot be enabled (3) This is due to OMAP24XX_ST_GPIOS_SHIFT being defined as a bitmask. Fix this and also fix two other macros that had the same problem. Thanks to Tony Lindgren <tony@atomide.com> for originally reporting this bug. Signed-off-by: Paul Walmsley <paul@pwsan.com Cc: Charulatha Varadarajan <charu@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | OMAP2+: PM/serial: fix console semaphore acquire during suspendKevin Hilman2010-12-102-10/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 0d8e2d0dad98a693bad88aea6876ac8b94ad95c6 (OMAP2+: PM/serial: hold console semaphore while OMAP UARTs are disabled) added use of the console semaphore to protect UARTs from being accessed after disabled during idle, but this causes problems in suspend. During suspend, the console semaphore is acquired by the console suspend method (console_suspend()) so the try_acquire_console_sem() will always fail and suspend will be aborted. To fix, introduce a check so the console semaphore is only attempted during idle, and not during suspend. Also use the same check so that the console semaphore is not prematurely released during resume. Thanks to Paul Walmsley for suggesting adding the same check during resume. Cc: Paul Walmsley <paul@pwsan.com> Tested-by: Jean Pihet <j-pihet@ti.com> Tested-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | OMAP1: SRAM: fix size for OMAP1611 SoCsKevin Hilman2010-12-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Kernel was failing to boot on omap1611 based OSK boards due to mis-configured SRAM size. Existing code was using a hard-coded value for 250k, which was then rounded down by PAGE_SIZE. Increasing this to 256k allows kernel to boot on omap1611 SoCs. Problem reported by and initial fix suggested by Tim Bird. Thanks to Tony Lindgren for helping diagnose the problem to being specific to OMAP1611 and not affecting OMAP1610/OMAP1623. Reported-by: Tim Bird <tim.bird@am.sony.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | arm: omap2: io: fix clk_get() error checkAaro Koskinen2010-12-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | clk_get() return value should be checked with IS_ERR(). Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | arm: plat-omap: counter_32k: use IS_ERR() instead of NULL checkVasiliy Kulikov2010-12-071-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | clk_get() returns ERR_PTR() on error, not NULL. Signed-off-by: Vasiliy Kulikov <segoon@openwall.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> [tony@atomide.com: updated to include err.h to compile on omap1] Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | omap: zoom: wl1271 slot is MMC_CAP_POWER_OFF_CARDOhad Ben-Cohen2010-12-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch complements ed919b0 "mmc: sdio: fix runtime PM anomalies by introducing MMC_CAP_POWER_OFF_CARD" by declaring MMC_CAP_POWER_OFF_CARD on the ZOOM's wl1271 mmc slot. This is required in order not to break runtime PM support for the wl1271 sdio driver. Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Signed-off-by: Chris Ball <cjb@laptop.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | omap: PM debug: fix wake-on-timer debugfs dependencyKevin Hilman2010-12-031-17/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Wakeup-on-timer code does not have/need debugfs dependency. Move the function out of debugfs ifdef. Fixes compile error when CONFIG_DEBUG_FS is disabled but PM debug is enabled. Reported-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2010-12-157-32/+236
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/home/rmk/linux-2.6-arm: ARM: 6535/1: V6 MPCore v6_dma_inv_range and v6_dma_flush_range RWFO fix ARM: 6534/1: Make CONFIG_FPE_NWFPE depend on !CONFIG_THUMB2_KERNEL ARM: 6533/1: Thumb-2: Make CONFIG_THUMB2_KERNEL depend on !CPU_V6 Change bcmring Maintainer list. ARM: Update mach-types ARM: 6528/1: Use CTR for the I-cache line size on ARMv7 ARM: 6527/1: Use CTR instead of CCSIDR for the D-cache line size on ARMv7 ARM: pxa/palm: fix ifdef around gen_nand driver registration ARM: pxa: fix pxa2xx-flash section mismatch ARM: mmp2: remove not used clk_rtc
| * | | ARM: 6535/1: V6 MPCore v6_dma_inv_range and v6_dma_flush_range RWFO fixValentine Barshak2010-12-141-8/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cache ownership must be acquired by reading/writing data from the cache line to make cache operation have the desired effect on the SMP MPCore CPU. However, the ownership is never acquired in the v6_dma_inv_range function when cleaning the first line and flushing the last one, in case the address is not aligned to D_CACHE_LINE_SIZE boundary. Fix this by reading/writing data if needed, before performing cache operations. While at it, fix v6_dma_flush_range to prevent RWFO outside the buffer. Cc: stable@kernel.org Signed-off-by: Valentine Barshak <vbarshak@mvista.com> Signed-off-by: George G. Davis <gdavis@mvista.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 6534/1: Make CONFIG_FPE_NWFPE depend on !CONFIG_THUMB2_KERNELDave Martin2010-12-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because the nwfpe support is unlikely to be used on new platforms and requires CONFIG_OABI_COMPAT, which is not generally used with ARMv7+, we shouldn't expect to build nwfpe support into a Thumb-2 kernel. At present, nwfpe contains assembly code which isn't Thumb-2 compatible, and for now it doesn't appear useful to port this code. All ARMv7-A/R platforms necessarily have VFPv3 hardware floating- point natively, making emulation unnecessary. Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 6533/1: Thumb-2: Make CONFIG_THUMB2_KERNEL depend on !CPU_V6Dave Martin2010-12-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This makes sense, because Thumb-2 code can't execute on plain ARMv6 processors. This will avoid accidentally configuring a broken kernel where the config otherwise would allow multiple architecture versions to coexist in the same kernel. Not adding !CPU_V5 etc., because the chance of anyone trying to put v5 and v7 in the same kernel is low, and I'm not aware of any mach which can do this. These could be added later if it matters. Note that the rules may need to be refined if support for the ARM1156J(F)-S processor is later added to the kernel, since this processor supports the rare ARMv6T2 extensions, which add support for Thumb-2 and a few other ARMv7 features. Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | Merge branch 'fix' of ↵Russell King2010-12-132-2/+2
| |\ \ \ | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6
| | * | | ARM: pxa/palm: fix ifdef around gen_nand driver registrationMarek Vasut2010-11-301-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reported-by: Rafael Gandolfi <kaillasse91@hotmail.fr> Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
| | * | | ARM: mmp2: remove not used clk_rtcJason Chagas2010-11-301-1/+0
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | RTC clock will remain at 32KHz and powered on, there is no need for it at this moment. Signed-off-by: Jason Chagas <jason.chagas@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
| * | | ARM: Update mach-typesRussell King2010-12-131-4/+179
| | | | | | | | | | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 6528/1: Use CTR for the I-cache line size on ARMv7Catalin Marinas2010-12-132-10/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current implementation of the v7_coherent_*_range function assumes that the D and I cache lines have the same size, which is incorrect architecturally. This patch adds the icache_line_size macro which reads the CTR register. The main loop in v7_coherent_*_range is split in two independent loops or the D and I caches. This also has the performance advantage that the DSB is moved outside the main loop. Reported-by: Kevin Sapp <ksapp@quicinc.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 6527/1: Use CTR instead of CCSIDR for the D-cache line size on ARMv7Catalin Marinas2010-12-131-6/+6
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | The current implementation of the dcache_line_size macro reads the L1 cache size from the CCSIDR register. This, however, is not guaranteed to be the smallest cache line in the cache hierarchy. The patch changes to the macro to use the more architecturally correct CTR register. Reported-by: Kevin Sapp <ksapp@quicinc.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6Linus Torvalds2010-12-1513-409/+64
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6: sparc: Write to prom console using indirect buffer. sparc: Delete prom_*getchar(). sparc: Pass buffer pointer all the way down to prom_{get,put}char(). sparc: Do not export prom_nb{get,put}char(). sparc64: Delete prom_setcallback(). sparc64: Unexport prom_service_exists(). sparc: Kill prom devops_{32,64}.c sparc: Remove prom_pathtoinode() sparc64: Delete prom_puts() unused. SPARC/LEON: removed constant timer initialization as if HZ=100, now it reflects the value of HZ
| * | sparc: Write to prom console using indirect buffer.David S. Miller2010-12-015-29/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sparc64 systems have a restriction in that passing in buffer addressses above 4GB to prom calls is not reliable. We end up violating this when we do prom console writes, because we use an on-stack buffer to translate '\n' into '\r\n'. So instead, do this translation into an intermediate buffer, which is in the kernel image and thus below 4GB, then pass that to the PROM console write calls. On the 32-bit side we don't have to deal with any of these issues, so the new prom_console_write_buf() uses the existing prom_nbputchar() implementation. However we can now mark those routines static. Since the 64-bit side completely uses new code we can delete the putchar bits as they are now completely unused. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc: Delete prom_*getchar().David S. Miller2010-11-304-83/+0
| | | | | | | | | | | | | | | | | | Completely unused. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc: Pass buffer pointer all the way down to prom_{get,put}char().David S. Miller2010-11-306-54/+55
| | | | | | | | | | | | | | | | | | | | | | | | This gets us closer to being able to eliminate the use of dynamic and stack based buffers, so that we can adhere to the "no buffer addresses above 4GB" rule for PROM calls. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc: Do not export prom_nb{get,put}char().David S. Miller2010-11-174-20/+4
| | | | | | | | | | | | | | | | | | Never used outside of console_{32,64}.c Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc64: Delete prom_setcallback().David S. Miller2010-11-162-22/+0
| | | | | | | | | | | | | | | | | | Unused. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc64: Unexport prom_service_exists().David S. Miller2010-11-162-2/+1
| | | | | | | | | | | | | | | | | | | | | Only used by functions in misc_64.c so make it private to that file. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc: Kill prom devops_{32,64}.cDavid S. Miller2010-11-165-195/+0
| | | | | | | | | | | | | | | | | | Completely unused. Signed-off-by: David S. Miller <davem@davemloft.net>
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-19 13:48:21 +0100