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| | * | | MIPS: Emulate the new MIPS R6 B{L,G}T{Z,}{AL,}C instructionsMarkos Chandras2015-02-172-0/+47
| | * | | MIPS: Emulate the new MIPS R6 B{L,G}Ε{Z,}{AL,}C instructionsMarkos Chandras2015-02-172-0/+55
| | * | | MIPS: Emulate the BC1{EQ,NE}Z FPU instructionsMarkos Chandras2015-02-173-30/+101
| | * | | MIPS: kernel: branch: Do not emulate the branch likelies on MIPS R6Markos Chandras2015-02-172-13/+89
| | * | | MIPS: kernel: Prepare the JR instruction for emulation on MIPS R6Markos Chandras2015-02-173-2/+15
| | * | | MIPS: mm: scache: Add secondary cache support for MIPS R6 coresMarkos Chandras2015-02-172-2/+4
| | * | | MIPS: mm: c-r4k: Set the correct ISA levelMarkos Chandras2015-02-171-1/+1
| | * | | MIPS: mm: tlbex: Use cpu_has_mips_r2_exec_hazard for the EHB instructionLeonid Yegoshin2015-02-171-3/+3
| | * | | MIPS: mm: page: Add MIPS R6 supportMarkos Chandras2015-02-171-4/+26
| | * | | MIPS: lib: memset: Add MIPS R6 supportLeonid Yegoshin2015-02-171-0/+47
| | * | | MIPS: lib: memcpy: Add MIPS R6 supportLeonid Yegoshin2015-02-171-0/+23
| | * | | MIPS: kernel: syscall: Set the appropriate ISA level for MIPS R6Markos Chandras2015-02-171-1/+1
| | * | | MIPS: kernel: unaligned: Add support for the MIPS R6Leonid Yegoshin2015-02-171-4/+386
| | * | | MIPS: kernel: cps-vec: Replace "addi" with "addiu"Markos Chandras2015-02-171-8/+8
| | * | | MIPS: kernel: genex: Set correct ISA levelMarkos Chandras2015-02-171-1/+1
| | * | | MIPS: kernel: r4k_fpu: Add support for MIPS R6Leonid Yegoshin2015-02-171-3/+9
| | * | | MIPS: kernel: r4k_switch: Add support for MIPS R6Leonid Yegoshin2015-02-172-11/+15
| | * | | MIPS: kernel: traps: Add MIPS R6 related definitionsLeonid Yegoshin2015-02-171-5/+5
| | * | | MIPS: kernel: proc: Add MIPS R6 support to /proc/cpuinfoMarkos Chandras2015-02-172-1/+10
| | * | | MIPS: kernel: entry.S: Add MIPS R6 related definitionsMarkos Chandras2015-02-171-2/+3
| | * | | MIPS: kernel: cpu-probe.c: Add support for MIPS R6Leonid Yegoshin2015-02-171-4/+16
| | * | | MIPS: kernel: cevt-r4k: Add MIPS R6 to the c0_compare_interrupt handlerLeonid Yegoshin2015-02-171-1/+1
| | * | | MIPS: kernel: cpu-bugs64: Do not check R6 cores for existing 64-bit bugsLeonid Yegoshin2015-02-171-4/+7
| | * | | MIPS: asm: local: Set the appropriate ISA level for MIPS R6Markos Chandras2015-02-171-2/+3
| | * | | MIPS: asm: spinlock: Replace "sub" instruction with "addiu"Markos Chandras2015-02-171-5/+2
| | * | | MIPS: asm: futex: Set the appropriate ISA level for MIPS R6Markos Chandras2015-02-171-4/+4
| | * | | MIPS: asm: bitops: Update ISA constraints for MIPS R6 supportMarkos Chandras2015-02-171-15/+15
| | * | | MIPS: asm: atomic: Update ISA constraints for MIPS R6 supportMarkos Chandras2015-02-171-6/+6
| | * | | MIPS: asm: cmpxchg: Update ISA constraints for MIPS R6 supportMarkos Chandras2015-02-171-5/+5
| | * | | MIPS: Use the new "ZC" constraint for MIPS R6Markos Chandras2015-02-171-1/+6
| | * | | MIPS: asm: Rename GCC_OFF12_ASM to GCC_OFF_SMALL_ASMMarkos Chandras2015-02-179-93/+93
| | * | | MIPS: asm: spram: Add new symbol for MIPS scratch pad storageMarkos Chandras2015-02-173-3/+8
| | * | | MIPS: asm: r4kcache: Add MIPS R6 cache unroll functionsMarkos Chandras2015-02-171-2/+148
| | * | | MIPS: asm: irqflags: Add MIPS R6 related definitionsMarkos Chandras2015-02-172-4/+5
| | * | | MIPS: asm: hazards: Add MIPSR6 definitionsMarkos Chandras2015-02-171-4/+5
| | * | | MIPS: asm: cpu: Add MIPSR6 ISA definitionsLeonid Yegoshin2015-02-172-6/+20
| | * | | MIPS: Use generic checksum functions for MIPS R6Markos Chandras2015-02-175-0/+14
| | * | | MIPS: asm: asmmacro: Replace "add" instructions with "addu"Markos Chandras2015-02-171-2/+2
| | * | | MIPS: asm: asmmacro: Add MIPS R6 support to the simple EI/DI variantsLeonid Yegoshin2015-02-171-1/+1
| | * | | MIPS: asm: stackframe: Do not preserve the HI/LO registers on MIPS R6Leonid Yegoshin2015-02-171-4/+4
| | * | | MIPS: asm: module: define MODULE_PROC_FAMILY for MIPS R6Leonid Yegoshin2015-02-171-0/+4
| | * | | MIPS: asm: compiler: Add new macros to set ISA and arch asm annotationsMarkos Chandras2015-02-171-0/+13
| | * | | MIPS: mm: Add MIPS R6 instruction encodingsLeonid Yegoshin2015-02-162-3/+38
| | * | | MIPS: mm: uasm: Add signed 9-bit immediate related macrosLeonid Yegoshin2015-02-161-1/+12
| | * | | MIPS: Add build support for the MIPS R6 ISALeonid Yegoshin2015-02-162-4/+45
| | * | | MIPS: Add MIPS generic QEMU probe supportLeonid Yegoshin2015-02-161-0/+5
| | * | | MIPS: Add cases for CPU_QEMU_GENERICLeonid Yegoshin2015-02-167-0/+13
| | * | | MIPS: Add generic QEMU PRid and cpu type identifiersLeonid Yegoshin2015-02-161-0/+3
| | * | | MIPS: Makefile: Move the ASEs checks after setting the core's CFLAGSMarkos Chandras2015-02-161-18/+17
| * | | | MIPS: Export MSA functions used by lose_fpu(1) for KVMJames Hogan2015-02-191-0/+4
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