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* Merge branch 'l1tf-final' of git://git.kernel.org/pub/scm/linux/kernel/git/ti...Linus Torvalds2018-08-1452-204/+1027
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| * x86/microcode: Allow late microcode loading with SMT disabledJosh Poimboeuf2018-08-101-4/+12
| * x86/mm/kmmio: Make the tracer robust against L1TFAndi Kleen2018-08-081-10/+15
| * x86/mm/pat: Make set_memory_np() L1TF safeAndi Kleen2018-08-081-4/+4
| * x86/speculation/l1tf: Make pmd/pud_mknotpresent() invertAndi Kleen2018-08-081-10/+12
| * x86/speculation/l1tf: Invert all not present mappingsAndi Kleen2018-08-081-1/+1
| * cpu/hotplug: Fix SMT supported evaluationThomas Gleixner2018-08-071-1/+1
| * KVM: VMX: Tell the nested hypervisor to skip L1D flush on vmentryPaolo Bonzini2018-08-053-3/+27
| * x86/speculation: Use ARCH_CAPABILITIES to skip L1D flush on vmentryPaolo Bonzini2018-08-054-0/+13
| * x86/speculation: Simplify sysfs report of VMX L1TF vulnerabilityPaolo Bonzini2018-08-051-3/+9
| * Merge 4.18-rc7 into master to pick up the KVM dependcyThomas Gleixner2018-08-05259-1193/+1642
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| * | x86/KVM/VMX: Don't set l1tf_flush_l1d from vmx_handle_external_intr()Nicolai Stange2018-08-051-1/+0
| * | x86/irq: Let interrupt handlers set kvm_cpu_l1tf_flush_l1dNicolai Stange2018-08-053-0/+5
| * | x86: Don't include linux/irq.h from asm/hardirq.hNicolai Stange2018-08-0520-2/+19
| * | x86/KVM/VMX: Introduce per-host-cpu analogue of l1tf_flush_l1dNicolai Stange2018-08-052-4/+36
| * | x86/irq: Demote irq_cpustat_t::__softirq_pending to u16Nicolai Stange2018-08-051-1/+1
| * | x86/KVM/VMX: Move the l1tf_flush_l1d test to vmx_l1d_flush()Nicolai Stange2018-08-051-4/+6
| * | x86/KVM/VMX: Replace 'vmx_l1d_flush_always' with 'vmx_l1d_flush_cond'Nicolai Stange2018-08-051-5/+5
| * | x86/KVM/VMX: Don't set l1tf_flush_l1d to true from vmx_l1d_flush()Nicolai Stange2018-08-051-7/+7
| * | x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' contentNicolai Stange2018-07-191-3/+14
| * | x86/bugs, kvm: Introduce boot-time control of L1TF mitigationsJiri Kosina2018-07-133-13/+99
| * | cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED earlyThomas Gleixner2018-07-131-0/+6
| * | x86/kvm: Allow runtime control of L1D flushThomas Gleixner2018-07-132-6/+9
| * | x86/kvm: Serialize L1D flush parameter setterThomas Gleixner2018-07-131-2/+6
| * | x86/kvm: Add static key for flush alwaysThomas Gleixner2018-07-131-5/+11
| * | x86/kvm: Move l1tf setup functionThomas Gleixner2018-07-131-47/+78
| * | x86/l1tf: Handle EPT disabled state properThomas Gleixner2018-07-133-45/+54
| * | x86/kvm: Drop L1TF MSR list approachThomas Gleixner2018-07-131-36/+7
| * | x86/litf: Introduce vmx status variableThomas Gleixner2018-07-133-13/+54
| * | x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if requiredKonrad Rzeszutek Wilk2018-07-041-5/+37
| * | x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRsKonrad Rzeszutek Wilk2018-07-041-8/+14
| * | x86/KVM/VMX: Separate the VMX AUTOLOAD guest/host number accountingKonrad Rzeszutek Wilk2018-07-041-10/+19
| * | x86/KVM/VMX: Add find_msr() helper functionKonrad Rzeszutek Wilk2018-07-041-13/+18
| * | x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest numbersKonrad Rzeszutek Wilk2018-07-041-30/+35
| * | x86/KVM/VMX: Add L1D flush logicPaolo Bonzini2018-07-044-1/+34
| * | x86/KVM/VMX: Add L1D MSR based flushPaolo Bonzini2018-07-042-4/+17
| * | x86/KVM/VMX: Add L1D flush algorithmPaolo Bonzini2018-07-041-5/+66
| * | x86/KVM/VMX: Add module argument for L1TF mitigationKonrad Rzeszutek Wilk2018-07-041-0/+59
| * | x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being presentKonrad Rzeszutek Wilk2018-07-041-0/+13
| * | Revert "x86/apic: Ignore secondary threads if nosmt=force"Thomas Gleixner2018-07-023-23/+1
| * | x86/speculation/l1tf: Fix up pte->pfn conversion for PAEMichal Hocko2018-06-291-6/+6
| * | x86/speculation/l1tf: Protect PAE swap entries against L1TFVlastimil Babka2018-06-272-3/+34
| * | x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblingsBorislav Petkov2018-06-221-20/+17
| * | x86/cpufeatures: Add detection of L1D cache flush support.Konrad Rzeszutek Wilk2018-06-211-0/+1
| * | x86/speculation/l1tf: Extend 64bit swap file size limitVlastimil Babka2018-06-211-1/+9
| * | x86/apic: Ignore secondary threads if nosmt=forceThomas Gleixner2018-06-213-1/+23
| * | x86/cpu/AMD: Evaluate smp_num_siblings earlyThomas Gleixner2018-06-211-0/+13
| * | x86/CPU/AMD: Do not check CPUID max ext level before parsing SMP infoBorislav Petkov2018-06-211-6/+3
| * | x86/cpu/intel: Evaluate smp_num_siblings earlyThomas Gleixner2018-06-211-0/+7
| * | x86/cpu/topology: Provide detect_extended_topology_early()Thomas Gleixner2018-06-212-9/+23
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