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* ARM: dts: exynos: Move HSI2C nodes to exynos54xx.dtsiKrzysztof Kozlowski2016-05-312-57/+69
| | | | | | | | | The USI/HSI2C nodes can be mostly shared between Exynos5420 and Exynos5410 so move them to common DTSI. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
* ARM: dts: exynos: Add initial support for Odroid XU boardKrzysztof Kozlowski2016-05-312-0/+122
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The Hardkernel's Odroid XU board was first design with big.LITTLE SoC from Samsung: the Exynos5410. Details: 1. Exynos5410 octa-core (A15+A7, however as of now only one cluster is enabled), 2. 2 GB DDR3 RAM, 3. PowerVR SGX544MP3 GPU (not enabled in DTS), 4. USB 3.0 Host x 1, USB 3.0 OTG x 1, USB 2.0 Host x 4, 5. HDMI 1.4a, MIPI DSI and Display Port (Display Port not on all of revisions though), 6. eMMC 4.5 and microSD slots. Comparing this board to Odroid XU3 (more popular), the differences are: 1. Exynos5410 instead of 5422, 2. MIPI DSI LCD connector, 3. Main PMIC: Maxim 77802 instead of S2MPS11, 4. USB3503+LAN9730 instead of integrated LAN9514, 5. eMMC 4.5 instead of eMMC 5.0, This patch adds initial support for the XU board with working basic functions, eMMC/SD and USB (including attached ethernet adapter). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Link: http://www.hardkernel.com/main/products/prdt_info.php?g_code=G137510300620
* ARM: dts: exynos: Add USB to Exynos5410Krzysztof Kozlowski2016-05-313-94/+157
| | | | | | | | | | | Move USB 3.0 DWC and 2.0 EHCI/OHCI nodes from exynos5420.dtsi to exynos54xx.dtsi common for entire family. For Exynos542x/5800 this should not have functional impact but for Exynos5410 this effectively adds USB support. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
* ARM: dts: exynos: Move common Exynos5410/542x/5800 nodes to new DTSIKrzysztof Kozlowski2016-05-313-97/+80
| | | | | | | | | | | | | The Exynos5410/542x/5800 are very similar designs. Create a new DTSI with common nodes to remove DTS duplication. Although currently only MCT and SysRAM are shared but in future more nodes will be added to the common file. The patch should not have functional impact. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
* ARM: dts: exynos: MCT is not an interrupt controller and extend length of iomapKrzysztof Kozlowski2016-05-311-3/+1
| | | | | | | | | | | Multi-Core Timer generates interrupts but it is not really an interrupt controller so remove the "interrupt-controller" and "interrupt-cells" properties. Additionally extend the length of mapped memory to cover all registers (last SFR is at 0x0A40). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
* ARM: dts: exynos: Enable UART3 on Exynos5410Krzysztof Kozlowski2016-05-311-1/+2
| | | | | | | | Just like other Exynos5 family SoCs, this one has four UARTs. Configure clocks for UART3 and enable it. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
* ARM: dts: exynos: Include common exynos5 in exynos5410.dtsiKrzysztof Kozlowski2016-05-312-74/+35
| | | | | | | | | | The exynos5.dtsi is used for common nodes shared between Exynos5250 and Exynos542x. Since Exynos5410 is very similar to Exynos5420 it can include the common file as well to remove duplication and make everything more consistent. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
* ARM: dts: exynos: Move Exynos5250 and Exynos5420 nodes under socKrzysztof Kozlowski2016-05-313-2314/+2327
| | | | | | | | | | | | The conventions is to put SoC devices under 'soc' node. In fact other our DTSes (like exynos3250.dtsi or exynos5410.dtsi) already follow it. Adjust exynos5250 and exynos5420 DTSI to follow this convention. This is also necessary for the upcoming change in exynos5410.dtsi to inherit from common exynos5.dtsi. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
* ARM: dts: exynos: Use phandle to get parent node in exynos5250-snowKrzysztof Kozlowski2016-05-311-1/+1
| | | | | | | | | | The i2c-arbitrator node in exynos5250-snow-common used absolute path to reference other node (the i2c parent). Use phandle instead, because the depth of the other node may be changed (like moving it under 'soc' node). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
* ARM: dts: exynos: Prepare for inclusion of exynos5.dtsi in exynos5410.dtsiKrzysztof Kozlowski2016-05-311-1/+1
| | | | | | | | | Add 'sromc' label to SROM memory controller in common exynos5.dtsi so it can be referenced by inheriting DTSI. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
* ARM: dts: exynos: Move common nodes to exynos5.dtsiKrzysztof Kozlowski2016-05-313-148/+124
| | | | | | | | | | Exynos5420 and Exynos5250 share some nodes: the PWM, syscon (sysreg_system_controller) and first four I2C controllers. Move them to parent DTSI to avoid duplication. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
* ARM: dts: exynos: Split Odroid XU3 LEDs to separate DTSIKrzysztof Kozlowski2016-05-313-68/+52
| | | | | | | | | The LED nodes can be shared between Odroid XU3, XU3-Lite and XU (not yet added) thus removing duplication. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
* ARM: dts: exynos: Configure Exynos5410 pinctrl for eMMC and SD cardKrzysztof Kozlowski2016-05-311-0/+77
| | | | | | | Configure the pinctrl for MMC0 (eMMC) and MMC2 (microSD card). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
* ARM: dts: exynos: Use lowercase for Exynos5410 CPU node labelsKrzysztof Kozlowski2016-05-311-4/+4
| | | | | | | For consistency lowercase node labels are used. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
* ARM: dts: exynos: Enable CLKOUT on Exynos5410Krzysztof Kozlowski2016-05-311-0/+3
| | | | | | | | The CLKOUT (which control is provided by PMU) is necessary for some of the drivers using this as a clock, e.g. usb3503 USB HUB on Odroid XU board. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
* ARM: dts: exynos: Re-order alphabetically Exynos5420 SD0/SD1 pinctrl nodesKrzysztof Kozlowski2016-05-311-6/+6
| | | | | | | | The 'sd0_rclk' was put in the middle of SD1 nodes. Remove the confusion. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
* ARM: dts: exynos: Replace deprecated hsi2c compatible on Exynos5420Krzysztof Kozlowski2016-05-311-7/+7
| | | | | | | | Since commit 218e1496135e ("i2c: exynos5: add support for HSI2C on Exynos5260 SoC") the "samsung,exynos5-hsi2c" is deprecated in favor of SoC version specific: "samsung,exynos5250-hsi2c". Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2016-05-2958-248/+353
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull more MIPS updates from Ralf Baechle: "This is the secondnd batch of MIPS patches for 4.7. Summary: CPS: - Copy EVA configuration when starting secondary VPs. EIC: - Clear Status IPL. Lasat: - Fix a few off by one bugs. lib: - Mark intrinsics notrace. Not only are the intrinsics uninteresting, it would cause infinite recursion. MAINTAINERS: - Add file patterns for MIPS BRCM device tree bindings. - Add file patterns for mips device tree bindings. MT7628: - Fix MT7628 pinmux typos. - wled_an pinmux gpio. - EPHY LEDs pinmux support. Pistachio: - Enable KASLR VDSO: - Build microMIPS VDSO for microMIPS kernels. - Fix aliasing warning by building with `-fno-strict-aliasing' for debugging but also tracing them might result in recursion. Misc: - Add missing FROZEN hotplug notifier transitions. - Fix clk binding example for varioius PIC32 devices. - Fix cpu interrupt controller node-names in the DT files. - Fix XPA CPU feature separation. - Fix write_gc0_* macros when writing zero. - Add inline asm encoding helpers. - Add missing VZ accessor microMIPS encodings. - Fix little endian microMIPS MSA encodings. - Add 64-bit HTW fields and fix its configuration. - Fix sigreturn via VDSO on microMIPS kernel. - Lots of typo fixes. - Add definitions of SegCtl registers and use them" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (49 commits) MIPS: Add missing FROZEN hotplug notifier transitions MIPS: Build microMIPS VDSO for microMIPS kernels MIPS: Fix sigreturn via VDSO on microMIPS kernel MIPS: devicetree: fix cpu interrupt controller node-names MIPS: VDSO: Build with `-fno-strict-aliasing' MIPS: Pistachio: Enable KASLR MIPS: lib: Mark intrinsics notrace MIPS: Fix 64-bit HTW configuration MIPS: Add 64-bit HTW fields MAINTAINERS: Add file patterns for mips device tree bindings MAINTAINERS: Add file patterns for mips brcm device tree bindings MIPS: Simplify DSP instruction encoding macros MIPS: Add missing tlbinvf/XPA microMIPS encodings MIPS: Fix little endian microMIPS MSA encodings MIPS: Add missing VZ accessor microMIPS encodings MIPS: Add inline asm encoding helpers MIPS: Spelling fix lets -> let's MIPS: VR41xx: Fix typo MIPS: oprofile: Fix typo MIPS: math-emu: Fix typo ...
| * MIPS: Add missing FROZEN hotplug notifier transitionsAnna-Maria Gleixner2016-05-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | The corresponding FROZEN hotplug notifier transitions used on suspend/resume are ignored. Therefore the switch case action argument is masked with the frozen hotplug notifier transition mask. Signed-off-by: Anna-Maria Gleixner <anna-maria@linutronix.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: rt@linutronix.de Patchwork: https://patchwork.linux-mips.org/patch/13351/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Build microMIPS VDSO for microMIPS kernelsJames Hogan2016-05-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | MicroMIPS kernels may be expected to run on microMIPS only cores which don't support the normal MIPS instruction set, so be sure to pass the -mmicromips flag through to the VDSO cflags. Fixes: ebb5e78cc634 ("MIPS: Initial implementation of a VDSO") Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: <stable@vger.kernel.org> # 4.4.x- Patchwork: https://patchwork.linux-mips.org/patch/13349/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Fix sigreturn via VDSO on microMIPS kernelJames Hogan2016-05-281-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In microMIPS kernels, handle_signal() sets the isa16 mode bit in the vdso address so that the sigreturn trampolines (which are offset from the VDSO) get executed as microMIPS. However commit ebb5e78cc634 ("MIPS: Initial implementation of a VDSO") changed the offsets to come from the VDSO image, which already have the isa16 mode bit set correctly since they're extracted from the VDSO shared library symbol table. Drop the isa16 mode bit handling from handle_signal() to fix sigreturn for cores which support both microMIPS and normal MIPS. This doesn't fix microMIPS only cores, since the VDSO is still built for normal MIPS, but thats a separate problem. Fixes: ebb5e78cc634 ("MIPS: Initial implementation of a VDSO") Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: <stable@vger.kernel.org> # 4.4.x- Patchwork: https://patchwork.linux-mips.org/patch/13348/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: devicetree: fix cpu interrupt controller node-namesAntony Pavlov2016-05-286-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Here is the quote from [1]: The unit-address must match the first address specified in the reg property of the node. If the node has no reg property, the @ and unit-address must be omitted and the node-name alone differentiates the node from other nodes at the same level This patch adjusts MIPS dts-files and devicetree binding documentation in accordance with [1]. [1] Power.org(tm) Standard for Embedded Power Architecture(tm) Platform Requirements (ePAPR). Version 1.1 – 08 April 2011. Chapter 2.2.1.1 Node Name Requirements Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13345/ Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: VDSO: Build with `-fno-strict-aliasing'Maciej W. Rozycki2016-05-281-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Avoid an aliasing issue causing a build error in VDSO: In file included from include/linux/srcu.h:34:0, from include/linux/notifier.h:15, from ./arch/mips/include/asm/uprobes.h:9, from include/linux/uprobes.h:61, from include/linux/mm_types.h:13, from ./arch/mips/include/asm/vdso.h:14, from arch/mips/vdso/vdso.h:27, from arch/mips/vdso/gettimeofday.c:11: include/linux/workqueue.h: In function 'work_static': include/linux/workqueue.h:186:2: error: dereferencing type-punned pointer will break strict-aliasing rules [-Werror=strict-aliasing] return *work_data_bits(work) & WORK_STRUCT_STATIC; ^ cc1: all warnings being treated as errors make[2]: *** [arch/mips/vdso/gettimeofday.o] Error 1 with a CONFIG_DEBUG_OBJECTS_WORK configuration and GCC 5.2.0. Include `-fno-strict-aliasing' along with compiler options used, as required for kernel code, fixing a problem present since the introduction of VDSO with commit ebb5e78cc634 ("MIPS: Initial implementation of a VDSO"). Thanks to Tejun for diagnosing this properly! Signed-off-by: Maciej W. Rozycki <macro@imgtec.com> Reviewed-by: James Hogan <james.hogan@imgtec.com> Fixes: ebb5e78cc634 ("MIPS: Initial implementation of a VDSO") Cc: Tejun Heo <tj@kernel.org> Cc: linux-mips@linux-mips.org Cc: stable@vger.kernel.org # v4.3+ Patchwork: https://patchwork.linux-mips.org/patch/13357/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Pistachio: Enable KASLRMatt Redfearn2016-05-282-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow KASLR to be selected on Pistachio based systems. Tested on a Creator Ci40. Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com> Reviewed-by: James Hogan <james.hogan@imgtec.com> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: Jonas Gorski <jogo@openwrt.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13356/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: lib: Mark intrinsics notraceHarvey Hunt2016-05-287-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On certain MIPS32 devices, the ftrace tracer "function_graph" uses __lshrdi3() during the capturing of trace data. ftrace then attempts to trace __lshrdi3() which leads to infinite recursion and a stack overflow. Fix this by marking __lshrdi3() as notrace. Mark the other compiler intrinsics as notrace in case the compiler decides to use them in the ftrace path. Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com> Cc: <linux-mips@linux-mips.org> Cc: <linux-kernel@vger.kernel.org> Cc: <stable@vger.kernel.org> # 4.2.x- Patchwork: https://patchwork.linux-mips.org/patch/13354/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Fix 64-bit HTW configurationJames Hogan2016-05-281-2/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Hardware page Table Walker (HTW) is being misconfigured on 64-bit kernels. The PWSize.PS (pointer size) bit determines whether pointers within directories are loaded as 32-bit or 64-bit addresses, but was never being set to 1 for 64-bit kernels where the unsigned long in pgd_t is 64-bits wide. This actually reduces rather than improves performance when the HTW is enabled on P6600 since the HTW is initiated lots, but walks are all aborted due I think to bad intermediate pointers. Since we were already taking the width of the PTEs into account by setting PWSize.PTEW, which is the left shift applied to the page table index *in addition to* the native pointer size, we also need to reduce PTEW by 1 when PS=1. This is done by calculating PTEW based on the relative size of pte_t compared to pgd_t. Finally in order for the HTW to be used when PS=1, the appropriate XK/XS/XU bits corresponding to the different 64-bit segments need to be set in PWCtl. We enable only XU for now to enable walking for XUSeg. Supporting walking for XKSeg would be a bit more involved so is left for a future patch. It would either require the use of a per-CPU top level base directory if supported by the HTW (a bit like pgd_current but with a second entry pointing at swapper_pg_dir), or the HTW would prepend bit 63 of the address to the global directory index which doesn't really match how we split user and kernel page directories. Fixes: cab25bc7537b ("MIPS: Extend hardware table walking support to MIPS64") Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13364/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Add 64-bit HTW fieldsJames Hogan2016-05-282-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add field definitions for some of the 64-bit specific Hardware page Table Walker (HTW) register fields in PWSize and PWCtl, in preparation for fixing the 64-bit HTW configuration. Also print these fields out along with the others in print_htw_config(). Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13363/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Simplify DSP instruction encoding macrosJames Hogan2016-05-281-90/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simplify the DSP instruction wrapper macros which use explicit encodings for microMIPS and normal MIPS by using the new encoding macros and removing duplication. To me this makes it easier to read since it is much shorter, but it also ensures .insn is used, preventing objdump disassembling the microMIPS code as normal MIPS. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13314/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Add missing tlbinvf/XPA microMIPS encodingsJames Hogan2016-05-281-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | Hardcoded MIPS instruction encodings are provided for tlbinvf, mfhc0 & mthc0 instructions, but microMIPS encodings are missing. I doubt any microMIPS cores exist at present which support these instructions, but the microMIPS encodings exist, and microMIPS cores may support them in the future. Add the missing microMIPS encodings using the new macros. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13313/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Fix little endian microMIPS MSA encodingsJames Hogan2016-05-282-62/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the toolchain doesn't support MSA we encode MSA instructions explicitly in assembly. Unfortunately we use .word for both MIPS and microMIPS encodings which is wrong, since 32-bit microMIPS instructions are made up from a pair of halfwords. - The most significant halfword always comes first, so for little endian builds the halves will be emitted in the wrong order. - 32-bit alignment isn't guaranteed, so the assembler may insert a 16-bit nop instruction to pad the instruction stream to a 32-bit boundary. Use the new instruction encoding macros to encode microMIPS MSA instructions correctly. Fixes: d96cc3d1ec5d ("MIPS: Add microMIPS MSA support.") Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paul Burton <Paul.Burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13312/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Add missing VZ accessor microMIPS encodingsJames Hogan2016-05-281-9/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Toolchains may be used which support microMIPS but not VZ instructions (i.e. binutis 2.22 & 2.23), so extend the explicitly encoded versions of the guest COP0 register & guest TLB access macros to support microMIPS encodings too, using the new macros. This prevents non-microMIPS instructions being executed in microMIPS mode during CPU probe on cores supporting VZ (e.g. M5150), which cause reserved instruction exceptions early during boot. Fixes: bad50d79255a ("MIPS: Fix VZ probe gas errors with binutils <2.24") Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13311/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Add inline asm encoding helpersJames Hogan2016-05-281-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To allow simplification of macros which use inline assembly to explicitly encode instructions, add a few simple abstractions to mipsregs.h which expand to specific microMIPS or normal MIPS encodings depending on what type of kernel is being built: _ASM_INSN_IF_MIPS(_enc) : Emit a 32bit MIPS instruction if microMIPS is not enabled. _ASM_INSN32_IF_MM(_enc) : Emit a 32bit microMIPS instruction if enabled. _ASM_INSN16_IF_MM(_enc) : Emit a 16bit microMIPS instruction if enabled. The macros can be used one after another since the MIPS / microMIPS macros are mutually exclusive, for example: __asm__ __volatile__( ".set push\n\t" ".set noat\n\t" "# mfgc0 $1, $%1, %2\n\t" _ASM_INSN_IF_MIPS(0x40610000 | %1 << 11 | %2) _ASM_INSN32_IF_MM(0x002004fc | %1 << 16 | %2 << 11) "move %0, $1\n\t" ".set pop" : "=r" (__res) : "i" (source), "i" (sel)); Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13310/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Spelling fix lets -> let'sRalf Baechle2016-05-289-10/+10
| | | | | | | | | | | | | | As noticed by Sergei in the discussion of Andrea Gelmini's patch series. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Reported-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
| * MIPS: VR41xx: Fix typoAndrea Gelmini2016-05-281-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: trivial@kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13338/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: oprofile: Fix typoAndrea Gelmini2016-05-281-1/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: rric@kernel.org Cc: linux-mips@linux-mips.org Cc: trivial@kernel.org Cc: oprofile-list@lists.sf.net Patchwork: https://patchwork.linux-mips.org/patch/13334/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: math-emu: Fix typoAndrea Gelmini2016-05-281-2/+2
| | | | | | | | | | | | | | | | | | Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: macro@imgtec.com Cc: trivial@kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13333/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: lib: Fix typoAndrea Gelmini2016-05-281-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: trivial@kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13331/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: kernel: Fix typoAndrea Gelmini2016-05-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: paul.burton@imgtec.com Cc: macro@imgtec.com Cc: james.hogan@imgtec.com Cc: jslaby@suse.cz Cc: adam.buchbinder@gmail.com Cc: trivial@kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13330/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: R6: Fix typoAndrea Gelmini2016-05-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: macro@imgtec.com Cc: paul.burton@imgtec.com Cc: Leonid.Yegoshin@imgtec.com Cc: trivial@kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13329/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: IP22/IP28: Fix typoAndrea Gelmini2016-05-281-1/+1
| | | | | | | | | | | | | | | | | | Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: adam.buchbinder@gmail.com Cc: trivial@kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13328/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Cavium: Fix typoAndrea Gelmini2016-05-284-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: david.daney@cavium.com Cc: janne.huttunen@nokia.com Cc: aaro.koskinen@nokia.com Cc: trivial@kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13324/ Patchwork: https://patchwork.linux-mips.org/patch/13325/ Patchwork: https://patchwork.linux-mips.org/patch/13326/ Patchwork: https://patchwork.linux-mips.org/patch/13327/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: MT: Fix typoAndrea Gelmini2016-05-281-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: linux-mips@linux-mips.org Cc: trivial@kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13323/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Loongson64: Fix typoAndrea Gelmini2016-05-282-2/+2
| | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: chenhc@lemote.com Cc: viresh.kumar@linaro.org Cc: linux-mips@linux-mips.org Cc: trivial@kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13322/ Patchwork: https://patchwork.linux-mips.org/patch/13332/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: IP32: Fix typoAndrea Gelmini2016-05-281-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: trivial@kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13321/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: IP27: Fix typoAndrea Gelmini2016-05-283-4/+4
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: trivial@kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13320/ Patchwork: https://patchwork.linux-mips.org/patch/13335/ Patchwork: https://patchwork.linux-mips.org/patch/13336/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: BCM63xx: Fix typoAndrea Gelmini2016-05-281-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: trivial@kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13319/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: Fix typoAndrea Gelmini2016-05-281-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: trivial@kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13318/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: hazards.h: Fix typoAndrea Gelmini2016-05-281-4/+4
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: chenhc@lemote.com Cc: james.hogan@imgtec.com Cc: linux-mips@linux-mips.org Cc: trivial@kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13317/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Lasat: A couple off by one bugs in picvue_proc.cDan Carpenter2016-05-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | These should be ">=" instead of ">" or we go past the end of the pvc_lines[] array. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Cc: linux-mips@linux-mips.org Cc: kernel-janitors@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/6124/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: ralink: add MT7628 EPHY LEDs pinmux supportÁlvaro Fernández Rojas2016-05-281-0/+100
| | | | | | | | | | | | | | | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Cc: john@phrozen.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13308/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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