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* ARM: tegra: Add OPP tables and power domains to Tegra30 device-treesDmitry Osipenko2021-12-167-3/+1395
| | | | | | | | | | Add OPP tables and power domains to all peripheral devices which support power management on Tegra30 SoC. Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30 Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30 Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Add OPP tables and power domains to Tegra20 device-treesDmitry Osipenko2021-12-1610-5/+1033
| | | | | | | | | | Add OPP tables and power domains to all peripheral devices which support power management on Tegra20 SoC. Tested-by: Paul Fertser <fercerpav@gmail.com> # PAZ00 T20 Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Add 500 MHz entry to Tegra30 memory OPP tableDmitry Osipenko2021-12-161-0/+18
| | | | | | | | Extend memory OPPs with 500 MHz entry. This clock rate is used by ASUS Transformer tablets. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Enable video decoder on Tegra114Anton Bambura2021-12-151-0/+37
| | | | | | | | Add Video Decoder Engine node to Tegra114 device-tree. Signed-off-by: Anton Bambura <jenneron@protonmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: nexus7: Use common LVDS display device-treeMaxim Schwalm2021-12-151-51/+3
| | | | | | | | | | | Make Nexus 7 device-tree to use common LVDS bridge description. This makes device-trees more consistent. [digetx@gmail.com: factored Nexus7 change into separate patch and wrote commit message] Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Add CPU thermal zones to Nyan device-treeDmitry Osipenko2021-12-151-1/+48
| | | | | | | | | | CPU of Nyan Chromebooks is overheating badly because apparently hardware soctherm controller doesn't work well. Add CPU thermal zones to enable software thermal control over CPU and fix the overheat trouble. Tested-by: Thomas Graichen <thomas.graichen@gmail.com> # T124 Nyan Big Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Enable CPU DFLL on NyanDmitry Osipenko2021-12-151-1/+1
| | | | | | | | | | Enable CPU DFLL node on Nyan Chromebooks. DFLL was previously disabled due to Linux kernel CPUFreq driver which didn't support suspend-resume. That problem was fixed years ago, but DFLL was never re-enabled. Tested-by: Thomas Graichen <thomas.graichen@gmail.com> # T124 Nyan Big Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Enable HDMI CEC on NyanDmitry Osipenko2021-12-151-0/+4
| | | | | | | | | Enable HDMI CEC on Nyan Chromebooks. It allows to control TV over HDMI. Suggested-by: Thomas Graichen <thomas.graichen@gmail.com> Tested-by: Thomas Graichen <thomas.graichen@gmail.com> # T124 Nyan Big Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Add usb-role-switch property to USB OTG portsStefan Eichenberger2021-12-154-1/+4
| | | | | | | | | | | | | | | | | If an USB port is an OTG port, then we should add the usb-role-switch property. Otherwise XUSB setup fails and therefore padctl is unable to set up the ports. This leads to broken USB and PCIe ports. Add the usb-role-switch properties to Tegra124 device-trees to fix the problem. The error message shown without this patch is e.g: usb2-0: usb-role-switch not found for otg mode [digetx@gmail.com: improved commit message] Tested-by: Thomas Graichen <thomas.graichen@gmail.com> # T124 Nyan Big Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Add device-tree for 1080p version of Nyan BigDmitry Osipenko2021-12-152-0/+12
| | | | | | | | | | | Add dedicated device-tree for 1080p version of Nyan Big in order to describe display panel properly. FHD panel doesn't support modes other than 1080p, hence it's wrong to use incompatible lower resolution panel in device-tree. Tested-by: Thomas Graichen <thomas.graichen@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Add device-tree for Pegatron ChagallSvyatoslav Ryhel2021-12-152-1/+2861
| | | | | | | | | | | | | | | | | Add device-tree for Pegatron Chagall, which is a NVIDIA Tegra30-based Android tablet. Link: https://wiki.postmarketos.org/wiki/Pegatron_Chagall_(pegatron-chagall) Co-developed-by: Raffaele Tranquillini <raffaele.tranquillini@gmail.com> Signed-off-by: Raffaele Tranquillini <raffaele.tranquillini@gmail.com> Co-developed-by: Ion Agorria <ion@agorria.com> Signed-off-by: Ion Agorria <ion@agorria.com> Co-developed-by: Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> [treding@nvidia.com: cosmetic fixups] Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Add device-tree for ASUS Transformer Pad TF701TAnton Bambura2021-12-153-2/+810
| | | | | | | | | | | Add device-tree for Tegra114-based ASUS Transformer Pad TF701T (K00C) tablet. Link: https://wiki.postmarketos.org/wiki/ASUS_Transformer_Pad_(TF701T)_(asus-tf701t) Signed-off-by: Anton Bambura <jenneron@protonmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> [treding@nvidia.com: cosmetic fixups] Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Add device-tree for ASUS Transformer Infinity TF700TSvyatoslav Ryhel2021-12-152-0/+824
| | | | | | | | | | | | | | | | | | Add device-tree for ASUS Transformer Infinity TF700T, which is a NVIDIA Tegra30-based 2-in-1 detachable, originally running Android. Link: https://wiki.postmarketos.org/wiki/Asus_Transformer_Pad_Infinity_TF700T_(asus-tf700t) Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> Tested-by: Jasper Korten <jja2000@gmail.com> Co-developed-by: Ion Agorria <ion@agorria.com> Signed-off-by: Ion Agorria <ion@agorria.com> Co-developed-by: Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Co-developed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> [treding@nvidia.com: cosmetic fixups] Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Add device-tree for ASUS Transformer Pad TF300TGSvyatoslav Ryhel2021-12-152-0/+1088
| | | | | | | | | | | | | | | | Add device-tree for ASUS Transformer Pad TF300TG, which is a NVIDIA Tegra30-based 2-in-1 detachable, originally running Android. It's a variant of the TF300T that has a 3G modem. Link: https://wiki.postmarketos.org/wiki/ASUS_Transformer_Pad_(asus-tf300t) Co-developed-by: Ion Agorria <ion@agorria.com> Signed-off-by: Ion Agorria <ion@agorria.com> Co-developed-by: Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> [treding@nvidia.com: cosmetic fixups] Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Add device-tree for ASUS Transformer Pad TF300TMichał Mirosław2021-12-152-0/+1035
| | | | | | | | | | | | | | | | | | | Add device-tree for ASUS Transformer Pad TF300T, which is a NVIDIA Tegra30-based 2-in-1 detachable, originally running Android. Link: https://wiki.postmarketos.org/wiki/ASUS_Transformer_Pad_(asus-tf300t) Tested-by: Ihor Didenko <tailormoon@rambler.ru> Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> Co-developed-by: Ion Agorria <ion@agorria.com> Signed-off-by: Ion Agorria <ion@agorria.com> Co-developed-by: Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com> Co-developed-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> [treding@nvidia.com: cosmetic fixups] Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Add device-tree for ASUS Transformer Prime TF201Svyatoslav Ryhel2021-12-152-0/+628
| | | | | | | | | | | | | | | Add device-tree for ASUS Transformer Prime TF201, which is a NVIDIA Tegra30-based 2-in-1 detachable, orignally running Android. Link: https://wiki.postmarketos.org/wiki/ASUS_Transformer_Prime_(asus-tf201) Co-developed-by: Ion Agorria <ion@agorria.com> Signed-off-by: Ion Agorria <ion@agorria.com> Co-developed-by: Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> [treding@nvidia.com: cosmetic fixups] Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Add common device-tree for LVDS display panels of Tegra30 ASUS ↵Maxim Schwalm2021-12-151-0/+61
| | | | | | | | | | | | | | | | | | tablets All Tegra30 ASUS tablets have a similar design pattern in terms of hardware integration of LVDS display panels, like exactly the same GPIOs are used for power and reset, etc. Add a common device-tree for LVDS display panels of Tegra30 ASUS tablets to avoid replicating the boilerplate panel description. [digetx@gmail.com: factored out common part into separate patch and wrote commit message] Co-developed-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Add common device-tree base for Tegra30 ASUS TransformersSvyatoslav Ryhel2021-12-151-0/+1787
| | | | | | | | | | | | | | | | | | | | | Add common DTSI for Tegra30 ASUS Transformers. It will be used by multiple device-trees of ASUS devices. The common part initially was born out of the ASUS TF300T tablet's device-tree that was created by Michał Mirosław. It was heavily reworked and improved by Svyatoslav Ryhel, Maxim Schwalm, Ion Agorria et al. [digetx@gmail.com: factored out common part into separate patch and wrote commit message] Co-developed-by: Ion Agorria <ion@agorria.com> Signed-off-by: Ion Agorria <ion@agorria.com> Co-developed-by: Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com> Co-developed-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> [treding@nvidia.com: cosmetic fixups] Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Add device-tree for ASUS Transformer EeePad TF101Nikola Milosavljevic2021-12-153-1/+1282
| | | | | | | | | | | | | | | | | Add device-tree for Tegra20-based ASUS Transformer EeePad TF101. Link: https://wiki.postmarketos.org/wiki/ASUS_Eee_Pad_Transformer_(asus-tf101) Co-developed-by: David Heidelberg <david@ixit.cz> Signed-off-by: David Heidelberg <david@ixit.cz> Co-developed-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Co-developed-by: Antoni Aloy Torrens <aaloytorrens@gmail.com> Signed-off-by: Antoni Aloy Torrens <aaloytorrens@gmail.com> Signed-off-by: Nikola Milosavljevic <mnidza@outlook.com> Co-developed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> [treding@nvidia.com: cosmetic fixups] Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Avoid phandle indirection on OuyaThierry Reding2021-12-151-3934/+4202
| | | | | | | | | | | Move the default state pinmux definition into the pinmux node. There's no need for the indirection via the phandle. Note that the phandle indirection is kept for the EMC operating performance point tables because they reference nodes that are defined in an external file. Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Fix I2C mux reset GPIO reference on CardhuThierry Reding2021-12-151-1/+1
| | | | | | | Use the correct "reset-gpios" property for the I2C mux reset GPIO reference instead of the deprecated "reset-gpio" property. Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Fix SLINK compatible string on Tegra30Thierry Reding2021-12-151-6/+6
| | | | | | | The SLINK controller found on Tegra30 is not compatible with its predecessor found on Tegra20. Drop the fallback compatible string. Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Remove stray #reset-cells propertyThierry Reding2021-12-151-1/+0
| | | | | | | | The Ouya board specifies the #reset-cells property for the GPIO controller. Since the GPIO controller doesn't provide reset controls this is not needed, so they can be dropped. Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: nexus7: Drop clock-frequency from NFC nodeDavid Heidelberg2021-12-152-3/+0
| | | | | | | | The clock-frequency property was never used and is deprecated now. Remove it from Nexus 7 device-tree. Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Remove unsupported properties on ApalisThierry Reding2021-12-153-9/+0
| | | | | | | | | The +V1.2_VDD_CORE regulator on Apalis and Colibri boards uses the unsupported ti,vsel{0,1}-state-low properties. It turns out that these are in fact the default and can be overridden by ti,vsel{0,1}-state-high properties if needed. Drop them since they are not needed. Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Use correct vendor prefix for InvensenseThierry Reding2021-12-151-1/+1
| | | | | | | The correct vendor prefix for Invensense is "invensense," rather than "invn,". Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Add dummy backlight power suppliesThierry Reding2021-12-152-0/+6
| | | | | | | | | | | | | | | | | | | | The Medcom Wide and PAZ00 boards don't specify the power supply for the backlight, which means that the Linux driver will provide a dummy one. Wire up an explicit dummy to also make the DT schema validation succeed. Unfortunately I don't have access to the schematics for the Medcom Wide, so I don't know if a more accurate description is possible. The AC100 (PAZ00) schematics from here: https://www.s-manuals.com/pdf/motherboard/compal/compal_la-6352p_r1.0a_schematics.pdf aren't entirely clear which one of the supplies powers backlight, but the panel supply is probably close enough. Based on work by David Heidelberg <david@ixit.cz>. Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Remove PHY reset GPIO references from USB controller nodeThierry Reding2021-12-155-10/+0
| | | | | | | | The PHY reset GPIO references belong in the USB PHY nodes, where they already exist. There is no need to keep them in the USB controller's device tree node as well. Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Add compatible string for built-in ASIX on Colibri boardsThierry Reding2021-12-152-0/+2
| | | | | | | | | | | The device tree node for the built-in ASIX Ethernet device on Colibri boards needs a compatible string in order to pass DT schema validation. Add the USB VID,PID compatible string as required by the DT schema for USB devices. Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Avoid pwm- prefix in pinmux nodesThierry Reding2021-12-143-6/+6
| | | | | | | | | | The "pwm-" prefix currently matches the DT schema for PWM controllers and throws an error in that case. This is something that should be fixed in the PWM DT schema, but in this case we can also preempt any such conflict by naming the nodes after the pins like we do for many others of these nodes. Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Sort Tegra124 XUSB clocks correctlyThierry Reding2021-12-141-2/+2
| | | | | | | | | | Make the order of the clocks and clock-names properties match the order in the device tree bindings. This isn't strictly necessary from a point of view of the operating system because matching will be done based on the clock-names, but it makes it easier to validate the device trees against the DT schema. Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Drop unused AHCI clocks on Tegra124Thierry Reding2021-12-141-4/+2
| | | | | | | | The CML1 and PLL_E clocks are never explicitly used by the AHCI controller found on Tegra124, so drop them from the corresponding device tree node. Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Fix Tegra124 I2C compatible string listThierry Reding2021-12-141-6/+6
| | | | | | | The I2C controller found on Tegra124 is not fully compatible with the Tegra114 version, so drop the fallback compatible string from the list. Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Rename CPU and EMC OPP table device-tree nodesDmitry Osipenko2021-12-1416-402/+402
| | | | | | | | | OPP table name now should start with "opp-table" and OPP entries shouldn't contain commas and @ signs in accordance to the new schema requirement. Reorganize CPU and EMC OPP table device-tree nodes. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Rename thermal zone nodesThierry Reding2021-12-144-13/+13
| | | | | | | The DT schema requires that nodes representing thermal zones include a "-thermal" suffix in their name. Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Drop reg-shift for Tegra HS UARTThierry Reding2021-12-1411-1/+25
| | | | | | | | When the Tegra High-Speed UART is used instead of the regular UART, the reg-shift property is implied from the compatible string and should not be explicitly listed. Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Rename GPU node on Tegra124Thierry Reding2021-12-146-11/+6
| | | | | | | | | | | | | | | | In order to be able to pass DT schema validation, change the GPU nodes' unit-address to the standard notation. Previously this was using a "0," prefix that originated from a time when the top-level device tree node contained #address-cells = <2>. Note that this technically breaks backwards-compatibility with certain older versions of the U-Boot bootloader because early versions used a hard-coded DT path lookup to find the GPU node and perform some fixups on it. However, this was changed to a compatible string based lookup in April 2016, so it's reasonable to expect people to update U-Boot on the systems that they want to use this updated kernel DTB with. Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Rename GPIO hog nodes to match schemaThierry Reding2021-12-148-12/+12
| | | | | | | GPIO hog nodes must have a "hog-" prefix or "-hog" suffix according to the DT schema. Rename all such nodes to allow validation to pass. Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Add #reset-cells for Tegra114 MCThierry Reding2021-12-141-0/+1
| | | | | | | The Tegra memory controller provides reset controls for hotflush reset, so the #reset-cells property must be specified. Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Fix compatible string for Tegra114+ timerThierry Reding2021-12-142-2/+2
| | | | | | | | | | | | The TKE (time-keeping engine) found on Tegra114 and later is no longer backwards compatible with the version found on Tegra20, so update the compatible string list accordingly. Note that while the hardware block is strictly backwards-compatible, an architectural timer exists on those newer SoCs that is more reliable, so that should always be preferred. Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Rename top-level regulatorsDmitry Osipenko2021-12-1423-139/+139
| | | | | | | | | | | | | | | | Regulators defined at the top level in device tree are no longer part of a simple bus and therefore don't have a reg property. Nodes without a reg property shouldn't have a unit-address either, so drop the unit address from the node names. To ensure nodes aren't duplicated (in which case they would end up merged in the final DTB), append the name of the regulator to the node name. [treding@nvidia.com: factored out patch and wrote commit message] Signed-off-by: David Heidelberg <david@ixit.cz> Co-developed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Rename top-level clocksDavid Heidelberg2021-12-1416-17/+17
| | | | | | | | | | | | | | | | Clocks defined at the top level in device tree are no longer part of a simple bus and therefore don't have a reg property. Nodes without a reg property shouldn't have a unit-address either, so drop the unit address from the node names. To ensure nodes aren't duplicated (in which case they would end up merged in the final DTB), append the name of the clock to the node name. [treding@nvidia.com: factored out patch and wrote commit message] Signed-off-by: David Heidelberg <david@ixit.cz> Co-developed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Rename SPI flash chip nodesThierry Reding2021-12-146-6/+12
| | | | | | SPI flash chip nodes should be named "flash" instead of "spi-flash". Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Specify correct PMIC compatible on Tegra114 boardsThierry Reding2021-12-143-3/+3
| | | | | | | | The PMIC found on Dalmore, TN7 and Roth is a TPS65913, so add the specific compatible string in addition to the generic Palmas series compatible string. Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: Clean up external memory controller nodesThierry Reding2021-12-144-1696/+1754
| | | | | | | The external memory controller should be sorted after the memory controller to keep the ordering by unit-address intact. Signed-off-by: Thierry Reding <treding@nvidia.com>
* Merge tag 'for-5.16/parisc-3' of ↵Linus Torvalds2021-11-145-6/+14
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux Pull more parisc fixes from Helge Deller: "Fix a build error in stracktrace.c, fix resolving of addresses to function names in backtraces, fix single-stepping in assembly code and flush userspace pte's when using set_pte_at()" * tag 'for-5.16/parisc-3' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc/entry: fix trace test in syscall exit path parisc: Flush kernel data mapping in set_pte_at() when installing pte for user page parisc: Fix implicit declaration of function '__kernel_text_address' parisc: Fix backtrace to always include init funtion names
| * parisc/entry: fix trace test in syscall exit pathSven Schnelle2021-11-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 8779e05ba8aa ("parisc: Fix ptrace check on syscall return") fixed testing of TI_FLAGS. This uncovered a bug in the test mask. syscall_restore_rfi is only used when the kernel needs to exit to usespace with single or block stepping and the recovery counter enabled. The test however used _TIF_SYSCALL_TRACE_MASK, which includes a lot of bits that shouldn't be tested here. Fix this by using TIF_SINGLESTEP and TIF_BLOCKSTEP directly. I encountered this bug by enabling syscall tracepoints. Both in qemu and on real hardware. As soon as i enabled the tracepoint (sys_exit_read, but i guess it doesn't really matter which one), i got random page faults in userspace almost immediately. Signed-off-by: Sven Schnelle <svens@stackframe.org> Signed-off-by: Helge Deller <deller@gmx.de>
| * parisc: Flush kernel data mapping in set_pte_at() when installing pte for ↵John David Anglin2021-11-132-4/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | user page For years, there have been random segmentation faults in userspace on SMP PA-RISC machines. It occurred to me that this might be a problem in set_pte_at(). MIPS and some other architectures do cache flushes when installing PTEs with the present bit set. Here I have adapted the code in update_mmu_cache() to flush the kernel mapping when the kernel flush is deferred, or when the kernel mapping may alias with the user mapping. This simplifies calls to update_mmu_cache(). I also changed the barrier in set_pte() from a compiler barrier to a full memory barrier. I know this change is not sufficient to fix the problem. It might not be needed. I have had a few days of operation with 5.14.16 to 5.15.1 and haven't seen any random segmentation faults on rp3440 or c8000 so far. Signed-off-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: Helge Deller <deller@gmx.de> Cc: stable@kernel.org # 5.12+
| * parisc: Fix implicit declaration of function '__kernel_text_address'Helge Deller2021-11-131-0/+1
| | | | | | | | Signed-off-by: Helge Deller <deller@gmx.de>
| * parisc: Fix backtrace to always include init funtion namesHelge Deller2021-11-131-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I noticed that sometimes at kernel startup the backtraces did not included the function names of init functions. Their address were not resolved to function names and instead only the address was printed. Debugging shows that the culprit is is_ksym_addr() which is called by the backtrace functions to check if an address belongs to a function in the kernel. The problem occurs only for CONFIG_KALLSYMS_ALL=y. When looking at is_ksym_addr() one can see that for CONFIG_KALLSYMS_ALL=y the function only tries to resolve the address via is_kernel() function, which checks like this: if (addr >= _stext && addr <= _end) return 1; On parisc the init functions are located before _stext, so this check fails. Other platforms seem to have all functions (including init functions) behind _stext. The following patch moves the _stext symbol at the beginning of the kernel and thus includes the init section. This fixes the check and does not seem to have any negative side effects on where the kernel mapping happens in the map_pages() function in arch/parisc/mm/init.c. Signed-off-by: Helge Deller <deller@gmx.de> Cc: stable@kernel.org # 5.4+
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