| Commit message (Collapse) | Author | Age | Files | Lines |
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'timers-fixes-for-linus' and 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'core-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
rcu: avoid pointless blocked-task warnings
rcu: demote SRCU_SYNCHRONIZE_DELAY from kernel-parameter status
rtmutex: Fix comment about why new_owner can be NULL in wake_futex_pi()
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
x86, olpc: Add missing Kconfig dependencies
x86, mrst: Set correct APB timer IRQ affinity for secondary cpu
x86: tsc: Fix calibration refinement conditionals to avoid divide by zero
x86, ia64, acpi: Clean up x86-ism in drivers/acpi/numa.c
* 'timers-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
timekeeping: Make local variables static
time: Rename misnamed minsec argument of clocks_calc_mult_shift()
* 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
tracing: Remove syscall_exit_fields
tracing: Only process module tracepoints once
perf record: Add "nodelay" mode, disabled by default
perf sched: Fix list of events, dropping unsupported ':r' modifier
Revert "perf tools: Emit clearer message for sys_perf_event_open ENOENT return"
perf top: Fix annotate segv
perf evsel: Fix order of event list deletion
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OLPC uses select for OLPC_OPENFIRMWARE, which means OLPC has to
enforce the dependencies for OLPC_OPENFIRMWARE. Make sure it does so.
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: Daniel Drake <dsd@laptop.org>
Cc: Andres Salomon <dilinger@queued.net>
Cc: Grant Likely <grant.likely@secretlab.ca>
LKML-Reference: <20100923162846.D8D409D401B@zog.reactivated.net>
Cc: <stable@kernel.org> 2.6.37
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Offlining the secondary CPU causes the timer irq affinity to be set to
CPU 0. When the secondary CPU is back online again, the wrong irq
affinity will be used.
This patch ensures secondary per CPU timer always has the correct
IRQ affinity when enabled.
Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
LKML-Reference: <1294963604-18111-1-git-send-email-jacob.jun.pan@linux.intel.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: <stable@kernel.org> 2.6.37
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Konrad Wilk reported that the new delayed calibration crashes with a
divide by zero on Xen. The reason is that Xen sets the pmtimer
address, but reading from it returns 0xffffff. That results in the
ref_start and ref_stop value being the same, so the delta is zero
which causes the divide by zero later in the calculation.
The conditional (!hpet && !ref_start && !ref_stop) which sanity checks
the calibration reference values doesn't really make sense. If the
refs are null, but hpet is on, we still want to break out.
The div by zero would be possible to trigger by chance if both reads
from the hardware provided the exact same value (due to hardware
wrapping).
So checking if both the ref values are the same should handle if we
don't have hardware (both null) or if they are the same value (either by
invalid hardware, or by chance), avoiding the div by zero issue.
[ tglx: Applied the same fix to native_calibrate_tsc() where this
check was copied from ]
Reported-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Tested-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: John Stultz <johnstul@us.ibm.com>
LKML-Reference: <1295024788-15619-1-git-send-email-johnstul@us.ibm.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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* 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm: (161 commits)
ARM: pxa: fix building issue of missing physmap.h
ARM: mmp: PXA910 drive strength FAST using wrong value
ARM: mmp: MMP2 drive strength FAST using wrong value
ARM: pxa: fix recursive calls in pxa_low_gpio_chip
AT91: Support for gsia18s board
AT91: Acme Systems FOX Board G20 board files
AT91: board-sam9m10g45ek.c: Remove duplicate inclusion of mach/hardware.h
ARM: pxa: fix suspend/resume array index miscalculation
ARM: pxa: use cpu_has_ipr() consistently in irq.c
ARM: pxa: remove unused variable in clock-pxa3xx.c
ARM: pxa: fix warning in zeus.c
ARM: sa1111: fix typo in sa1111_retrigger_lowirq()
ARM mxs: clkdev related compile fixes
ARM i.MX mx31_3ds: Fix MC13783 regulator names
ARM: plat-stmp3xxx: irq_data conversion.
ARM: plat-spear: irq_data conversion.
ARM: plat-orion: irq_data conversion.
ARM: plat-omap: irq_data conversion.
ARM: plat-nomadik: irq_data conversion.
ARM: plat-mxc: irq_data conversion.
...
Fix up trivial conflict in arch/arm/plat-omap/gpio.c (Lennert
Buytenhek's irq_data conversion clashing with some omap irq updates)
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git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into devel-stable
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This patch adds support System MMU for S5PV310 and S5PC210.
Signed-off-by: Donguk Ryu <du.ryu@samsung.com>
Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
[kgene.kim@samsung.com: changed SYSMMU config name]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This patch adds support System MMU which supports address transition
from virtual address to physical address. Basically, each hardware
block is connected System MMU block can use directly vitrual address
when it accesses physical memory not using physical address.
Signed-off-by: Donguk Ryu <du.ryu@samsung.com>
Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
[kgene.kim@samsung.com: removed useless codes]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This patch adds support for clock information exposed to debug-fs interface.
Signed-off-by: Amit Daniel Kachhap <amit.daniel@samsung.com>
[kgene.kim@samsung.com: removed useless empty lines]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Both S3C2443 and S3C2416 support 4 UART channels, this patch adds support
for the missing uart channel.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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There are few functions marked as __init, but exported to modules in
devices declaration files.
s3c_nand_set_platdata() and s3c24xx_ts_set_platdata() are used only by
boards init code now, so remove EXPORT_SYMBOL() for them.
Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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S3C2443 has two-bits pull-up/pull-down configuration fields in GPIO
registers, but values are differ from other SoCs with two-bits
configuration. gpio-cfg-helpers.h already has prototypes for
s3c2443-style pull-up/down methods, so implement them.
Signed-off-by: Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Enable card detect by GPIO pin on hsmmc1 device (SD0 on SMDK2416 board)
and enable card polling on hsmmc0 (SD1).
Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Samsung S3C2416 has two SDHCI controllers compatible with other
Samsung's SoCs (S3C64XX, S5PC100 etc...).
Add required platform setup code that the devices can be used with
sdhci-s3c driver.
Signed-off-by: Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
[kgene.kim@samsung.com: change to __raw_{readl,writel} from {readl,writel}]
[kgene.kim@samsung.com: build error fixes]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Define maps for HSMMC devices.
S3C2443 has one HSMMC device with base address 0x4A800000.
S3C2416 has HSMMC0 at 0x4AC00000 and HSMMC1 at 0x4A800000.
So suppose that S3C2443 has only HSMMC1.
Define clock for hsmmc0 device and register it.
Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This patch changes the clock registration code to use the s3c_register_clocks()
followed by s3c_disable_clocks() instead of the loops it was using and cleanups
the return of s3c24xx_register_clocks() because it includes it.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This patch changes the clock registration code to use the s3c_register_clocks()
followed by s3c_disable_clocks() instead of the loops it was using and cleanups
the return of s3c24xx_register_clocks() because it includes it.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This patch changes the clock registration code to use the s3c_register_clocks()
followed by s3c_disable_clocks() instead of the loops it was using.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This patch changes the clock registration code to use the s3c_register_clocks()
followed by s3c_disable_clocks() instead of the loops it was using.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This patch changes the clock registration code to use the s3c_register_clocks()
followed by s3c_disable_clocks() instead of the loops it was using.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This patch changes the clock registration code to use the s3c_register_clocks()
followed by s3c_disable_clocks() instead of the loops it was using.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This patch changes the clock registration code to use the s3c_register_clocks()
followed by s3c_disable_clocks() instead of the loops it was using.
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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The stop function sets the DMA_HALT bit, which prevents
the DMA transfer to resume after stop, for example during
audio PAUSE/PLAY cycle. Clear the HALT bit during start.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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When GENERIC_HARDIRQS_NO_DEPRECATED is enabled, a number of struct
irq_desc members stop being directly accessible, and need to be
accessed via the irq_data struct instead -- this patch fixes up the
plat-samsung sites that still access those members directly.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
[kgene.kim@samsung.com: coding-style fixes]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Conflicts:
arch/arm/mach-s5pv310/Makefile
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This patch adds ARCH_HAS_CPUFREQ in Kconfig of ARCH_S5PV310 and updates
Makefile for supporting build S5PV310 CPUFREQ driver.
Signed-off-by: Sunyoung Kang <sy0816.kang@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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FOUT APLL clock is used as a source of ARM core clock. So we need that the
clock source can be changed dynamically by using CPUFREQ driver. This patch
can give correct frequency when calling clk_get_rate() function.
Signed-off-by: Jaecheol Lee <jc.lee@samsung.com>
Signed-off-by: Sangwook Ju <sw.ju@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This patch updates following of CPUFREQ.
- Updated DVFS table and divider value
- Added common function
- Added some function for changing APLL and setting
Signed-off-by: Sangwook Ju <sw.ju@samsung.com>
Reviewed-by: Jaecheol Lee <jc.lee@samsung.com>
Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This patch adds support CPUFREQ driver for S5PV310 and S5PC210. This can
support DVFS(Dynamic Voltage and Frequency Scaling). The voltage scaling
depends on existence of regulator.
Sigend-off-by: Sunyoung Kang <sy0816.kang@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This patch adds DMC io mapping for access it and adds registers.
This is used in checking DRAM memory type.
Signed-off-by: Sunyoung Kang <sy0816.kang@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This patch adds missing CMU(Clock Management Unit) registers for
updated S5PV310 CPUFREQ driver.
Signed-off-by: Sangwook Ju <sw.ju@samsung.com>
Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This patch adds CMU(Clock Management Unit) registers for S5PV310/S5PC210
CPUFREQ driver and modifies some register names according to datasheet.
Signed-off-by: Sunyoung Kang <sy0816.kang@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Conflicts:
arch/arm/mach-s5pv310/Kconfig
arch/arm/mach-s5pv310/Makefile
arch/arm/mach-s5pv310/mach-smdkc210.c
arch/arm/mach-s5pv310/mach-smdkv310.c
arch/arm/plat-samsung/include/plat/devs.h
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The 4 combiner groups use same registers to handle the interrupt.
In previous implementation, the whole registers are checked to find
which interupt is occurred and thus interrupt in other groups can
be detected. This patch adds irq_mask to solve this problem.
Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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The irqs from SPI(0) to SPI(39) and SPI(51), SPI(53) are connected to the
interrupt combiner. This patch limits the irqs which should be initialized
to support cascade interrupt.
Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This patch adds IRQ_MCT0, IRQ_MCT1, IRQ_MCT_L0, and IRQ_MCT_L1.
(MCT: Multi-Core Timer). And updated MAX_COMBINER_NR.
Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Universal (C210) board has 3 SDHCI devices.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[kgene.kim@samsung.com: minor edit of title]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This patch adds support Power Domain for S5PV310 and S5PC210.
Signed-off-by: Changhwan Youn <chaos.youn at samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This patch is applied according to the commit 1a8e41cd672f894bbd74874eac601e6cedf838fb
(ARM: 6395/1: VExpress: Set bit 22 in the PL310 (cache controller) AuxCtlr register).
Actually, S5PV310 has same cache controller(PL310).
Following is from Catalin Marinas' commit.
Clearing bit 22 in the PL310 Auxiliary Control register (shared
attribute override enable) has the side effect of transforming Normal
Shared Non-cacheable reads into Cacheable no-allocate reads.
Coherent DMA buffers in Linux always have a Cacheable alias via the
kernel linear mapping and the processor can speculatively load cache
lines into the PL310 controller. With bit 22 cleared, Non-cacheable
reads would unexpectedly hit such cache lines leading to buffer
corruption.
Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
Cc: <stable@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Conflicts:
arch/arm/mach-s5pv210/mach-smdkv210.c
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Enable frame buffer display support for SMDKV210 board.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Reviewed-by: Jonghun Han <jonghun.han@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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