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* MIPS:Netlogic:Fix section mismatch warnings.Jayachandran C2011-10-203-8/+14
| | | | | | | | | Add __init and __cpuinit annotation to functions that need it. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2535/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Revert "MIPS: LD/SD o32 macro GAS fix update"Ralf Baechle2011-10-202-20/+4
| | | | | | | | | | | | | | This reverts commit 97475f8b42e83be2966aa2d70ab9c98477701c53 (lmo) / 82b89152f00f7ad17844d5614d5011e8d7944ac9 (kernel.org) [MIPS: LD/SD o32 macro GAS fix update]. Turns out this patch is producing many build errors with gcc 4.2. Based on further testing with a test case extracted from the build errors found further build errors and suboptimal generation even in violation of the "R" constraint. To make matters worse, the binutils changes also don't work quite as intended so revert this patch for now.
* MIPS: SNI: Fix conflicting wrapper symbols for headers.Ralf Baechle2011-10-202-6/+6
| | | | | | | | | | If Open Firmware / Device Tree support is enabled on a SNI RM kernel both <asm/mipsprom.h> and <asm/prom.h> will be included into some .c files. Since both headers use the same wrapper symbol only the inclusion of the first file will have an effect but the 2nd file will be ignored resulting in a build error. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: PNX8550: Fix section mismatchRalf Baechle2011-10-201-1/+1
| | | | | | | | | | | | Triggered by pnx8550-jbs_defconfig and pnx8550-stb810_defconfig: WARNING: vmlinux.o(.text+0xc0c): Section mismatch in reference from the function prom_getcmdline() to the variable .init.data:arcs_cmdline The function prom_getcmdline() references the variable __initdata arcs_cmdline. This is often because prom_getcmdline lacks a __initdata annotation or the annotation of arcs_cmdline is wrong. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: 32-bit: Fix number of argument to epoll_wait.Ralf Baechle2011-10-201-1/+1
| | | | | | | The number of arguments only matters for syscalls with stack arguments that is using 5 or more argument slots so this is just cosmetic fix. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: IP27: Sort out section mismatch.Ralf Baechle2011-10-201-2/+2
| | | | | | | | | | | | | | | | | | WARNING: vmlinux.o(.text+0x3059f8): Section mismatch in reference from the function pcibios_plat_dev_init() to the function .devinit.text:request_bridge_irq() The function pcibios_plat_dev_init() references the function __devinit request_bridge_irq(). This is often because pcibios_plat_dev_init lacks a __devinit annotation or the annotation of request_bridge_irq is wrong. Fixing this one leads to: WARNING: vmlinux.o(.text+0x1790): Section mismatch in reference from the function request_bridge_irq() to the function .devinit.text:register_bridge_irq() The function request_bridge_irq() references the function __devinit register_bridge_irq(). This is often because request_bridge_irq lacks a __devinit annotation or the annotation of register_bridge_irq is wrong. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: cache: Provide cache flush operations for XFSRalf Baechle2011-10-206-0/+84
| | | | | | | | | | | | Until now flush_kernel_vmap_range() and invalidate_kernel_vmap_range() did not exist on MIPS resulting in heavy cache corruption on XFS filesystems. Left for the post-3.0 time: optimization and make this work with highmem, too. Since the combination of highmem + cache aliases atm doesn't work this isn't a regression. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2505/
* Merge branch 'fixes' of ↵Linus Torvalds2011-10-164-3/+11
|\ | | | | | | | | | | | | | | | | | | http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm * 'fixes' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm: ARM: 7128/1: vic: Don't write to the read-only register VIC_IRQ_STATUS ARM: 7122/1: localtimer: add header linux/errno.h explicitly ARM: 7117/1: perf: fix HW_CACHE_* events on Cortex-A9 ARM: 7113/1: mm: Align bank start to MAX_ORDER_NR_PAGES
| * ARM: 7128/1: vic: Don't write to the read-only register VIC_IRQ_STATUSZoltan Devai2011-10-151-1/+0
| | | | | | | | | | | | | | | | This is unneeded and causes an abort on the SPMP8000 platform. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Zoltan Devai <zoss@devai.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7122/1: localtimer: add header linux/errno.h explicitlyShawn Guo2011-10-151-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Per the text in Documentation/SubmitChecklist as below, we should explicitly have header linux/errno.h in localtimer.h for ENXIO reference. 1: If you use a facility then #include the file that defines/declares that facility. Don't depend on other header files pulling in ones that you use. Otherwise, we may run into some compiling error like the following one, if any file includes localtimer.h without CONFIG_LOCAL_TIMERS defined. arch/arm/include/asm/localtimer.h: In function ‘local_timer_setup’: arch/arm/include/asm/localtimer.h:53:10: error: ‘ENXIO’ undeclared (first use in this function) Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7117/1: perf: fix HW_CACHE_* events on Cortex-A9Will Deacon2011-10-151-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using COHERENT_LINE_{MISS,HIT} for cache misses and references respectively is completely wrong. Instead, use the L1D events which are a better and more useful approximation despite ignoring instruction traffic. Reported-by: Alasdair Grant <alasdair.grant@arm.com> Reported-by: Matt Horsnell <matt.horsnell@arm.com> Reported-by: Michael Williams <michael.williams@arm.com> Cc: stable@kernel.org Cc: Jean Pihet <j-pihet@ti.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7113/1: mm: Align bank start to MAX_ORDER_NR_PAGESLinus Walleij2011-10-011-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The VM subsystem assumes that there are valid memmap entries from the bank start aligned to MAX_ORDER_NR_PAGES. On the Ux500 we have a lot of mem=N arguments on the commandline triggering this bug several times over and causing kernel oops messages. Cc: stable@kernel.org Cc: Michael Bohan <mbohan@codeaurora.org> Cc: Nicolas Pitre <nico@fluxnic.net> Signed-off-by: Johan Palsson <johan.palsson@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge branch 'stable' of git://github.com/cmetcalf-tilera/linux-tileLinus Torvalds2011-10-142-2/+2
|\ \ | | | | | | | | | | | | * 'stable' of git://github.com/cmetcalf-tilera/linux-tile: tile: revert change from <asm/atomic.h> to <linux/atomic.h> in asm files
| * | tile: revert change from <asm/atomic.h> to <linux/atomic.h> in asm filesChris Metcalf2011-10-132-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 32-bit TILEPro support uses some #defines in <asm/atomic_32.h> for atomic support routines in assembly. To make this more explicit, I've turned those includes into includes of <asm/atomic_32.h>, which should hopefully make it clear that they shouldn't be bombed into <linux/atomic.h> in any cleanups. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* | | Merge branch 'x86-urgent-for-linus' of git://tesla.tglx.de/git/linux-2.6-tipLinus Torvalds2011-10-141-1/+1
|\ \ \ | | | | | | | | | | | | | | | | * 'x86-urgent-for-linus' of git://tesla.tglx.de/git/linux-2.6-tip: x86: Default to vsyscall=native for now
| * | | x86: Default to vsyscall=native for nowAdrian Bunk2011-10-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This UML breakage: linux-2.6.30.1[3800] vsyscall fault (exploit attempt?) ip:ffffffffff600000 cs:33 sp:7fbfb9c498 ax:ffffffffff600000 si:0 di:606790 linux-2.6.30.1[3856] vsyscall fault (exploit attempt?) ip:ffffffffff600000 cs:33 sp:7fbfb13168 ax:ffffffffff600000 si:0 di:606790 Is caused by commit 3ae36655 ("x86-64: Rework vsyscall emulation and add vsyscall= parameter") - the vsyscall emulation code is not fully cooked yet as UML relies on some rather fragile SIGSEGV semantics. Linus suggested in https://lkml.org/lkml/2011/8/9/376 to default to vsyscall=native for now, this patch implements that. Signed-off-by: Adrian Bunk <bunk@kernel.org> Acked-by: Andrew Lutomirski <luto@mit.edu> Cc: H. Peter Anvin <hpa@linux.intel.com> Link: http://lkml.kernel.org/r/20111005214047.GE14406@localhost.pp.htv.fi Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | | | x86, mrst: use a temporary variable for SFI irqMika Westerberg2011-10-141-10/+12
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SFI tables reside in RAM and should not be modified once they are written. Current code went to set pentry->irq to zero which causes subsequent reads to fail with invalid SFI table checksum. This will break kexec as the second kernel fails to validate SFI tables. To fix this we use temporary variable for irq number. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Cc: stable@kernel.org Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | Merge branch 'fixes' of git://git.linaro.org/people/arnd/arm-socLinus Torvalds2011-10-104-12/+7
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'fixes' of git://git.linaro.org/people/arnd/arm-soc: ARM: mach-ux500: enable fix for ARM errata 754322 ARM: OMAP: musb: Remove a redundant omap4430_phy_init call in usb_musb_init ARM: OMAP: Fix i2c init for twl4030 ARM: OMAP4: MMC: fix power and audio issue, decouple USBC1 from MMC1
| * \ \ Merge branch 'omap/fixes-for-3.1' into fixesArnd Bergmann2011-10-083-12/+6
| |\ \ \
| | * | | ARM: OMAP: musb: Remove a redundant omap4430_phy_init call in usb_musb_initAxel Lin2011-09-301-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current code calls omap4430_phy_init() twice in usb_musb_init(). Calling omap4430_phy_init() once is enough. This patch removes the first omap4430_phy_init() call, which using an uninitialized pointer as parameter. This patch elimates below build warning: arch/arm/mach-omap2/usb-musb.c: In function 'usb_musb_init': arch/arm/mach-omap2/usb-musb.c:141: warning: 'dev' may be used uninitialized in this function Signed-off-by: Axel Lin <axel.lin@gmail.com> Bjarne Steinsbo <bsteinsbo@gmail.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | ARM: OMAP: Fix i2c init for twl4030Tony Lindgren2011-09-301-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Looks like 2600 kHz rate does not work reliably on 2430, so just use the 100 kHz rate. Otherwise the system often fails to boot properly with: omap_i2c omap_i2c.2: timeout waiting for bus ready omap_i2c omap_i2c.2: timeout waiting for bus ready twl: i2c_write failed to transfer all messages omap_i2c omap_i2c.2: timeout waiting for bus ready twl: i2c_write failed to transfer all messages omap_i2c omap_i2c.2: timeout waiting for bus ready twl: i2c_write failed to transfer all messages twl: clock init err [-110] omap_i2c omap_i2c.2: timeout waiting for bus ready twl: i2c_write failed to transfer all messages TWL4030 Unable to unlock IDCODE registers --110 Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | ARM: OMAP4: MMC: fix power and audio issue, decouple USBC1 from MMC1Bryan Buckley2011-09-301-8/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove OMAP4_USBC1_ICUSB_PWRDNZ_MASK during enable/disable PWRDNZ mode for MMC1_PBIAS and associated extended-drain MMC1 I/O cell. This is in accordance with the control module programming guide. This fixes a bug where if trying to use gpio_98 or gpio_99 and MMC1 at the same time the GPIO signal will be affected by a changing SDMMC1_VDDS. Software must keep MMC1_PBIAS cell and MMC1_IO cell PWRDNZ signals low whenever SDMMC1_VDDS ramps up/down or changes for cell protection purposes. MMC1 is based on SDMMC1_VDDS whereas USBC1 is based on SIM_VDDS therefore they can operate independently. Signed-off-by: Bryan Buckley <bryan.buckley@ti.com> Acked-by: Kishore Kadiyala <kishore.kadiyala@ti.com> Tested-by: Balaji T K <balajitk@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | ARM: mach-ux500: enable fix for ARM errata 754322srinidhi kasagar2011-10-071-0/+1
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | This applies ARM errata fix 754322 for all ux500 platforms. Cc: stable@kernel.org Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | | ARM: tegra: fix compilation error due to mach/hardware.h removalMarc Dietrich2011-10-101-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes a compilation error in cpu-tegra.c which was introduced in dc8d966bccde ("ARM: convert PCI defines to variables") which removed the now obsolete mach/hardware.h from the mach-tegra subtree. Signed-off-by: Marc Dietrich <marvin24@gmx.de> Signed-off-by: Olof Johansson <olof@lixom.net> Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | | Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linusLinus Torvalds2011-10-1039-126/+164
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus: (29 commits) MIPS: Call oops_enter, oops_exit in die staging/octeon: Software should check the checksum of no tcp/udp packets MIPS: Octeon: Enable C0_UserLocal probing. MIPS: No branches in delay slots for huge pages in handle_tlbl MIPS: Don't clobber CP0_STATUS value for CONFIG_MIPS_MT_SMTC MIPS: Octeon: Select CONFIG_HOLES_IN_ZONE MIPS: PM: Use struct syscore_ops instead of sysdevs for PM (v2) MIPS: Compat: Use 32-bit wrapper for compat_sys_futex. MIPS: Do not use EXTRA_CFLAGS MIPS: Alchemy: DB1200: Disable cascade IRQ in handler SERIAL: Lantiq: Set timeout in uart_port MIPS: Lantiq: Fix setting the PCI bus speed on AR9 MIPS: Lantiq: Fix external interrupt sources MIPS: tlbex: Fix build error in R3000 code. MIPS: Alchemy: Include Au1100 in PM code. MIPS: Alchemy: Fix typo in MAC0 registration MIPS: MSP71xx: Fix build error. MIPS: Handle __put_user() sleeping. MIPS: Allow forced irq threading MIPS: i8259: Mark cascade interrupt non-threaded ...
| * | | | MIPS: Call oops_enter, oops_exit in dieNathan Lynch2011-10-011-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows pause_on_oops and mtdoops to work. Signed-off-by: Nathan Lynch <ntl@pobox.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2810/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Octeon: Enable C0_UserLocal probing.David Daney2011-09-241-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Octeon2 processor cores have a UserLocal register. Remove the hard coded negative probe and allow the standard probing to detect this feature. Signed-off-by: David Daney <david.daney@cavium.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2578/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: No branches in delay slots for huge pages in handle_tlblDavid Daney2011-09-211-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For the case PM_DEFAULT_MASK == 0, we were placing a branch in the delay slot of another branch. This leads to undefined behavior. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2775/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Don't clobber CP0_STATUS value for CONFIG_MIPS_MT_SMTCDavid Daney2011-09-211-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reported-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/2753/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Octeon: Select CONFIG_HOLES_IN_ZONEDavid Daney2011-09-211-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current Octeon systems do in fact have holes in their memory zones. We need to select HOLES_IN_ZONE. If we do not, some memory configurations will result in crashes at boot time like this: . . . CPU 6 Unable to handle kernel paging request at virtual address 0000000000700000, epc == ffffffff8118fe00, ra == ffffffff8118fe9c Oops[#1]: Cpu 6 . . . ... Call Trace: [<ffffffff8118fe00>] setup_per_zone_wmarks+0x1b0/0x338 [<ffffffff815cd738>] init_per_zone_wmark_min+0x64/0xd0 [<ffffffff81100438>] do_one_initcall+0x38/0x160 . . . Reported-by: Jason Kwon <jason.kwon@ericsson.com> Signed-off-by: David Daney <david.daney@cavium.com> To: linux-mips@linux-mips.org Cc: Jason Kwon <jason.kwon@ericsson.com> Patchwork: https://patchwork.linux-mips.org/patch/2724/ Tested-by: Guenter Roeck<guenter.roeck@ericsson.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: PM: Use struct syscore_ops instead of sysdevs for PM (v2)Rafael J. Wysocki2011-09-211-30/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert some MIPS architecture's code to using struct syscore_ops objects for power management instead of sysdev classes and sysdevs. This simplifies the code and reduces the kernel's memory footprint. It also is necessary for removing sysdevs from the kernel entirely in the future. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Acked-and-tested-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-kernel@vger.kernel.org Cc: "Rafael J. Wysocki" <rjw@sisk.pl> Patchwork: http://patchwork.linux-mips.org/patch/2431/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Compat: Use 32-bit wrapper for compat_sys_futex.Yong Zhang2011-09-213-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can't trust userspace to pass signed-extend arguments. Not correctly sign-extended arguments to futex-wait result in architecturally undefined operation of 32-bit arithmetic instructions. For example, if 'val' is too big and bit-31 is 1, the caller may enter endless loop at: futex_wait_setup() { ... if (uval != val) { queue_unlock(q, *hb); ret = -EWOULDBLOCK; ... } Signed-off-by: Yong Zhang <yong.zhang@windriver.com> To: linux-mips@linux-mips.org To: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/2714/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Do not use EXTRA_CFLAGSArnaud Lacombe2011-09-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Usage of these flags has been deprecated for nearly 4 years by: commit f77bf01425b11947eeb3b5b54685212c302741b8 Author: Sam Ravnborg <sam@neptun.(none)> Date: Mon Oct 15 22:25:06 2007 +0200 kbuild: introduce ccflags-y, asflags-y and ldflags-y Moreover, these flags (at least EXTRA_CFLAGS) have been documented for command line use. By default, gmake(1) do not override command line setting, so this is likely to result in build failure or unexpected behavior. Replace their usage by Kbuild's `{as,cc,ld}flags-y'. To: linux-kernel@vger.kernel.org Cc: Sam Ravnborg <sam@ravnborg.org> Patchwork: https://patchwork.linux-mips.org/patch/2710/ Cc: linux-mips@linux-mips.org Signed-off-by: Arnaud Lacombe <lacombar@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Alchemy: DB1200: Disable cascade IRQ in handlerManuel Lauss2011-09-212-7/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Disable the cascade IRQ in the cascade handler. This is required to get the DB1300 working, and also gets rid of all spurious interrupts previously observed on the DB1200; so Config[OD] can be disabled again for better performance. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2708/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Lantiq: Fix setting the PCI bus speed on AR9John Crispin2011-09-211-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The bits used to set the PCI bus speed on AR9 are slightly different to those used on Danube. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2614/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Lantiq: Fix external interrupt sourcesJohn Crispin2011-09-211-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The irq base offset needs to be ignored when matching irqs to external interrupt pins. Taking the offset into account resulted in the EIU not being brought up properly. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2616/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: tlbex: Fix build error in R3000 code.Ralf Baechle2011-09-211-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only some GCC versions such as gcc 4.2 notice that the variable wr in build_r3000_tlb_modify_handler is used uninitialized. When using one of those GCCs the build will fail due to -Werror. GCC 4.6 does not warn about the uninitialized use of wr. This issue was introduced by 7211f4d7a3dcbe57c5d396c334dca525315dceb2 [MIPS: Close races in TLB modify handlers.] Reported-by: Ganesan Ramalingam <ganesan18@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Alchemy: Include Au1100 in PM code.Manuel Lauss2011-09-211-8/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current code forgets the Au1100 when looking for the correct method to suspend the chip. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2675/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Alchemy: Fix typo in MAC0 registrationManuel Lauss2011-09-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Harmless typo which prints an error message although MAC0 was registered successfully. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2672/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: MSP71xx: Fix build error.Ralf Baechle2011-09-211-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CC arch/mips/pmc-sierra/msp71xx/msp_irq.o /home/ralf/src/linux/linux-mips/arch/mips/pmc-sierra/msp71xx/msp_irq.c:112:2: error: request for member ‘flags’ in something not a structure or union /home/ralf/src/linux/linux-mips/arch/mips/pmc-sierra/msp71xx/msp_irq.c:118:2: error: request for member ‘flags’ in something not a structure or union make[4]: *** [arch/mips/pmc-sierra/msp71xx/msp_irq.o] Error 1 caused by 57336bc1056798d89714b7fb1b1d197e6bda6819 [MIPS: Mark cascade and low level interrupts IRQF_NO_THREAD]. Commas to separate struct initializers generally are considered useful to enhance the compilation experience of the user. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Handle __put_user() sleeping.Ralf Baechle2011-09-211-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | do_signal() does __put_user() which can fault, resulting in a might_sleep() warning in down_read(&mm->mmap_sem) and a "scheduling while atomic" warning when mmap_sem is contented. On Swarm this also results in: WARNING: at kernel/smp.c:459 smp_call_function_many+0x148/0x398() Modules linked in: Call Trace: [<ffffffff804b48a4>] dump_stack+0x1c/0x50 [<ffffffff8013dc94>] warn_slowpath_common+0x8c/0xc8 [<ffffffff8013dcfc>] warn_slowpath_null+0x2c/0x40 [<ffffffff801864a0>] smp_call_function_many+0x148/0x398 [<ffffffff80186748>] smp_call_function+0x58/0xa8 [<ffffffff80119b5c>] r4k_flush_data_cache_page+0x54/0xd8 [<ffffffff801f39bc>] handle_pte_fault+0xa9c/0xad0 [<ffffffff801f40d0>] handle_mm_fault+0x158/0x200 [<ffffffff80115548>] do_page_fault+0x218/0x3b0 [<ffffffff80102744>] ret_from_exception+0x0/0x10 [<ffffffff8010eb18>] copy_siginfo_to_user32+0x50/0x298 [<ffffffff8010edf0>] setup_rt_frame_32+0x90/0x250 [<ffffffff80106414>] do_notify_resume+0x154/0x358 [<ffffffff80102930>] work_notifysig+0xc/0x14 Fixed by enabling interrupts in do_notify_resume before delivering signals. [ralf@linux-mips.org: Reported and original fix by tglx but I wanted to minimize the amount of code being run with interrupts disabled so I moved the local_irq_disable() call right into do_notify_resume. Which is saner than doing it in entry.S.] Reported-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Allow forced irq threadingThomas Gleixner2011-09-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All low level interrupts have been marked NO_THREAD, so MIPS can enjoy the wonderful world of forced threaded interrupt handlers. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2639/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: i8259: Mark cascade interrupt non-threadedLiming Wang2011-09-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cascade interrupts cannot be threaded. Signed-off-by: Liming Wang <liming.wang@windriver.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1314370804-21266-1-git-send-email-liming.wang@windriver.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2770/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Loongson: Mark cascade interrupts IRQF_NO_THREADWu Zhangjin2011-09-212-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are two cascade interrupts in Loongson machines, one for bonito northbridge, another for the 8259A controller in the southbridge. Both want to be non threaded. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Cc: Wu Zhangjin <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/2638/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Mark cascade and low level interrupts IRQF_NO_THREADWu Zhangjin2011-09-2112-10/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mark interrupts with no_action handler, cascade interrupts, low level interrupts (bus error, halt ..) with IRQF_NO_THREAD to exclude them from forced threading. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Cc: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Make the die_lock be rawWu Zhangjin2011-09-211-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On preempt-rt this lock needs to be raw, so it does not get converted to a sleeping spinlock. Trying to sleep in a panic is not really desireable. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2636/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Ftrace: Fix the CONFIG_DYNAMIC_FTRACE=n compileThomas Gleixner2011-09-211-19/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch/mips/kernel/ftrace.c: In function ‘ftrace_get_parent_ra_addr’: arch/mips/kernel/ftrace.c:212: error: implicit declaration of function ‘in_kernel_space’ arch/mips/kernel/ftrace.c: In function ‘prepare_ftrace_return’: arch/mips/kernel/ftrace.c:314: error: ‘MCOUNT_OFFSET_INSNS’ undeclared (first use in this function) arch/mips/kernel/ftrace.c:314: error: (Each undeclared identifier is reported only once arch/mips/kernel/ftrace.c:314: error: for each function it appears in.) Signed-off-by: Thomas Gleixner <tglx@linutronix.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2634/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: RC32434: Fix PCI build errorYoichi Yuasa2011-09-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch/mips/pci/pci-rc32434.c: In function 'rc32434_pci_init': arch/mips/pci/pci-rc32434.c:217:16: error: 'rcrc32434_res_pci_io1' undeclared (first use in this function) arch/mips/pci/pci-rc32434.c:217:16: note: each undeclared identifier is reported only once for each function it appears in make[1]: *** [arch/mips/pci/pci-rc32434.o] Error 1 This problem is included in the following commit. commit 28f65c11f2ffb3957259dece647a24f8ad2e241b Author: Joe Perches <joe@perches.com> Date: Thu Jun 9 09:13:32 2011 -0700 treewide: Convert uses of struct resource to resource_size(ptr) Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Cc: linux-mips <linux-mips@linux-mips.org> Cc: Joe Perches <joe@perches.com> Patchwork: https://patchwork.linux-mips.org/patch/2654/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Remove unneeded version.h includes from arch/mips/Jesper Juhl2011-09-173-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It was pointed out by 'make versioncheck' that some includes of linux/version.h are not needed in arch/mips/. This patch removes them. Signed-off-by: Jesper Juhl <jj@chaosbits.net> To: LKML <linux-kernel@vger.kernel.org> Cc: trivial@kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2540/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | | MIPS: Trivial style cleanups in mmap.cKevin Cernekee2011-09-171-23/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix checkpatch warnings. Rename arch_get_unmapped_area_foo() to arch_get_unmapped_area_common(). Make indentations and spacing more consistent. Add <linux/compiler.h> for likely/unlikely. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: Jian Peng <jipeng2005@gmail.com> Cc: David Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2506/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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