summaryrefslogtreecommitdiffstats
path: root/arch (follow)
Commit message (Collapse)AuthorAgeFilesLines
* x86: simplify "make ARCH=x86" and fix kconfig all.configSam Ravnborg2007-11-171-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simplify "make ARCH=x86" and fix kconfig so we again can set 64BIT in all.config. For a fix the diffstat is nice: 6 files changed, 3 insertions(+), 36 deletions(-) The patch reverts these commits: 0f855aa64b3f63d35a891510cf7db932a435c116 -> kconfig: add helper to set config symbol from environment variable 2a113281f5cd2febbab21a93c8943f8d3eece4d3 -> kconfig: use $K64BIT to set 64BIT with all*config targets Roman Zippel pointed out that kconfig supported string compares so the additional complexity introduced by the above two patches were not needed. With this patch we have following behaviour: # make {allno,allyes,allmod,rand}config [ARCH=...] option \ host arch | 32bit | 64bit ===================================================== ./. | 32bit | 64bit ARCH=x86 | 32bit | 32bit ARCH=i386 | 32bit | 32bit ARCH=x86_64 | 64bit | 64bit The general rule are that ARCH= and native architecture takes precedence over the configuration. So make ARCH=i386 [whatever] will always build a 32-bit kernel no matter what the configuration says. The configuration will be updated to 32-bit if it was configured to 64-bit and the other way around. This behaviour is consistent with previous behaviour so no suprises here. make ARCH=x86 will per default result in a 32-bit kernel but as the only ARCH= value x86 allow the user to select between 32-bit and 64-bit using menuconfig. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Roman Zippel <zippel@linux-m68k.org> Cc: Andreas Herrmann <aherrman@arcor.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com>
* x86: reboot fixup for wrap2c boardDenys2007-11-171-0/+1
| | | | | | | | Needed to make the wireless board, WRAP2C reboot. Cc: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: check boundary in count setup resourceYinghai Lu2007-11-171-0/+6
| | | | | | | | | | | | | | need to check info->res_num less than PCI_BUS_NUM_RESOURCES, so info->bus->resource[info->res_num] = res will not beyond of bus resource array when acpi returns too many resource entries. Signed-off-by: Yinghai Lu <yinghai.lu@sun.com> Cc: Greg Kroah-Hartman <gregkh@suse.de> Cc: Gary Hade <gary.hade@us.ibm.com> Cc: Len Brown <lenb@kernel.org> Cc: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: add hpet sanity checksThomas Gleixner2007-11-171-0/+32
| | | | | | | | | | | | Some BIOSes advertise HPET at 0x0. We really do no want to allocate a resource there. Check for it and leave early. Other BIOSes tell us the HPET is at 0xfed0000000000000 instead of 0xfed00000. Add a check and fix it up with a warning on user request. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: on x86_64, correct reading of PC RTC when update in progress in time_64.cDavid P. Reed2007-11-171-12/+18
| | | | | | | | | | | | | | | | | | | Correct potentially unstable PC RTC time register reading in time_64.c Stop the use of an incorrect technique for reading the standard PC RTC timer, which is documented to "disconnect" time registers from the bus while updates are in progress. The use of UIP flag while interrupts are disabled to protect a 244 microsecond window is one of the Motorola spec sheet's documented ways to read the RTC time registers reliably. tglx: removed locking changes from original patch, as they gain nothing (read_persistent_clock is only called during boot, suspend, resume - so no hot path affected) and conflict with the paravirt locking scheme (see 32bit code), which we do not want to complicate for no benefit. Signed-off-by: David P. Reed <dpreed@reed.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: fix freeze in x86_64 RTC update code in time_64.cDavid P. Reed2007-11-171-7/+4
| | | | | | | | | | | | | | | | Fix hard freeze on x86_64 when the ntpd service calls update_persistent_clock() A repeatable but randomly timed freeze has been happening in Fedora 6 and 7 for the last year, whenever I run the ntpd service on my AMD64x2 HP Pavilion dv9000z laptop. This freeze is due to the use of spin_lock(&rtc_lock) under the assumption (per a bad comment) that set_rtc_mmss is called only with interrupts disabled. The call from ntp.c to update_persistent_clock is made with interrupts enabled. Signed-off-by: David P. Reed <dpreed@reed.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: fixup cpu_info array conversionThomas Gleixner2007-11-171-1/+0
| | | | | | | | | | | | 92cb7612aee39642d109b8d935ad265e602c0563 sets cpu_info->cpu_index to zero for no reason. Referencing cpu_info->cpu_index now points always to CPU#0, which is apparently not what we want. Remove it. Spotted-by: Zou Nan hai <nanhai.zou@intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: show cpuinfo only for online CPUsAndreas Herrmann2007-11-172-10/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix regressions introduced with 92cb7612aee39642d109b8d935ad265e602c0563. It can happen that cpuinfo is displayed for CPUs that are not online or even worse for CPUs not present at all. As an example, following was shown for a "second" CPU of a single core K8 variant: processor : 0 vendor_id : unknown cpu family : 0 model : 0 model name : unknown stepping : 0 cache size : 0 KB fpu : yes fpu_exception : yes cpuid level : 0 wp : yes flags : bogomips : 0.00 clflush size : 0 cache_alignment : 0 address sizes : 0 bits physical, 0 bits virtual power management: Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: fix cpu-hotplug regressionAndreas Herrmann2007-11-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit d435d862baca3e25e5eec236762a43251b1e7ffc ("cpu hotplug: mce: fix cpu hotplug error handling") changed the error handling in mce_cpu_callback. In cases where not all CPUs are brought up during boot (e.g. using maxcpus and additional_cpus parameters) mce_cpu_callback now returns NOTFIY_BAD because for such CPUs cpu_data is not completely filled when the notifier is called. Thus mce_create_device fails right at its beginning: if (!mce_available(&cpu_data[cpu])) return -EIO; As a quick fix I suggest to check boot_cpu_data for MCE. To reproduce this regression: (1) boot with maxcpus=2 addtional_cpus=2 on a 4 CPU x86-64 system (2) # echo 1 >/sys/devices/system/cpu/cpu2/online -bash: echo: write error: Invalid argument dmesg shows: _cpu_up: attempt to bring up CPU 2 failed Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: ignore the sys_getcpu() tcache parameterIngo Molnar2007-11-171-17/+2
| | | | | | | | | | | | | | | | | dont use the vgetcpu tcache - it's causing problems with tasks migrating, they'll see the old cache up to a jiffy after the migration, further increasing the costs of the migration. In the worst case they see a complete bogus information from the tcache, when a sys_getcpu() call "invalidated" the cache info by incrementing the jiffies _and_ the cpuid info in the cache and the following vdso_getcpu() call happens after vdso_jiffies have been incremented. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Ulrich Drepper <drepper@redhat.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: fix smp init sectionsRandy Dunlap2007-11-171-2/+2
| | | | | | | | | Fix Voyager section mismatch due to using __devinit instead of __cpuinit. WARNING: vmlinux.o(.text+0xd943): Section mismatch: reference to .init.text:init_gdt (between 'voyager_smp_prepare_boot_cpu' and 'smp_vic_cmn_interrupt') Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: fix voyager_cat_init sectionRandy Dunlap2007-11-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | Fix Voyager section mismatches: voyager_cat_init() should be __init. WARNING: vmlinux.o(.text+0xee83): Section mismatch: reference to .init.data:eprom_buf (between 'voyager_cat_init' and 'aes_enc_blk') WARNING: vmlinux.o(.text+0xeea6): Section mismatch: reference to .init.data: (between 'voyager_cat_init' and 'aes_enc_blk') WARNING: vmlinux.o(.text+0xeeac): Section mismatch: reference to .init.data: (between 'voyager_cat_init' and 'aes_enc_blk') WARNING: vmlinux.o(.text+0xeeb2): Section mismatch: reference to .init.data: (between 'voyager_cat_init' and 'aes_enc_blk') WARNING: vmlinux.o(.text+0xef4c): Section mismatch: reference to .init.data: (between 'voyager_cat_init' and 'aes_enc_blk') WARNING: vmlinux.o(.text+0xef56): Section mismatch: reference to .init.data: (between 'voyager_cat_init' and 'aes_enc_blk') WARNING: vmlinux.o(.text+0xf10f): Section mismatch: reference to .init.data:eprom_buf (between 'voyager_cat_init' and 'aes_enc_blk') WARNING: vmlinux.o(.text+0xf13b): Section mismatch: reference to .init.data: (between 'voyager_cat_init' and 'aes_enc_blk') WARNING: vmlinux.o(.text+0xf14b): Section mismatch: reference to .init.data: (between 'voyager_cat_init' and 'aes_enc_blk') WARNING: vmlinux.o(.text+0xf159): Section mismatch: reference to .init.data: (between 'voyager_cat_init' and 'aes_enc_blk') WARNING: vmlinux.o(.text+0xf1b1): Section mismatch: reference to .init.data:eprom_buf (between 'voyager_cat_init' and 'aes_enc_blk') WARNING: vmlinux.o(.text+0xf1bb): Section mismatch: reference to .init.data: (between 'voyager_cat_init' and 'aes_enc_blk') WARNING: vmlinux.o(.text+0xf1c1): Section mismatch: reference to .init.data:eprom_buf (between 'voyager_cat_init' and 'aes_enc_blk') WARNING: vmlinux.o(.text+0xf1c7): Section mismatch: reference to .init.data:eprom_buf (between 'voyager_cat_init' and 'aes_enc_blk') WARNING: vmlinux.o(.text+0xf1e6): Section mismatch: reference to .init.data: (between 'voyager_cat_init' and 'aes_enc_blk') Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2007-11-172-8/+30
|\ | | | | | | | | | | * 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] 4638/1: pxa: use PXA3xx specific macros to define clks [ARM] remove useless setting of VM_RESERVED
| * [ARM] 4638/1: pxa: use PXA3xx specific macros to define clkseric miao2007-11-161-7/+30
| | | | | | | | | | | | | | | | PXA3xx uses its own clk_pxa3xx_cken_ops, modify the code to use the PXA3xx specific macros to define its clocks Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] remove useless setting of VM_RESERVEDRussell King2007-11-111-1/+0
| | | | | | | | | | | | | | | | remap_pfn_range() takes care of setting the appropriate VM_* flags itself; there's no need for callers of remap_pfn_range() to set VM_RESERVED before it is called. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge master.kernel.org:/pub/scm/linux/kernel/git/davej/cpufreqLinus Torvalds2007-11-172-81/+29
|\ \ | | | | | | | | | | | | | | | | | | * master.kernel.org:/pub/scm/linux/kernel/git/davej/cpufreq: [CPUFREQ] Fix up whitespace in conservative governor. [CPUFREQ] Make cpufreq_conservative handle out-of-sync events properly [CPUFREQ] architectural pstate driver for powernow-k8
| * | [CPUFREQ] architectural pstate driver for powernow-k8Mark Langsdorf2007-10-222-81/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch should apply cleanly to the 2.6.23-git7 kernel.  It changes the powernow-k8 driver code that deals with 3rd generation Opteron, Phenom, and later processors to match the architectural pstate driver described in the AMD64 Architecture Programmer's Manual Volume 2 Chapter 18.  The initial implementation of the hardware pstate driver for PowerNow! used some processor-version specific features, and would not be maintainable in the long term as the processor features changed. This architectural driver should work on all future AMD processors.   Signed-off-by: Mark Langsdorf <mark.langsdorf@amd.com> Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com> Signed-off-by: Dave Jones <davej@redhat.com>
* | | Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds2007-11-1627-138/+142
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: [MIPS] N32 needs to use the compat version of sys_nfsservctl. [MIPS] irq_cpu: use handle_percpu_irq handler to avoid dropping interrupts. [MIPS] Sibyte: Fix name of clocksource. [MIPS] SNI: s/achknowledge/acknowledge/ [MIPS] Makefile: Fix canonical system names [MIPS] vpe: handle halting TCs in an errata safe way. [MIPS] Sibyte: Stop timers before programming next even. [MIPS] Sibyte: Increase minimum oneshot timer interval to two ticks. [MIPS] Lasat: Fix overlap of interrupt number ranges. [MIPS] SNI PCIT CPLUS: workaround for b0rked irq wiring of onboard PCI bus 1 [MIPS] Fix shadow register support. [MIPS] Change get_cycles to always return 0. [MIPS] Fix typo in R3000 TRACE_IRQFLAGS code [MIPS] Sibyte: Replace use of removed IO_SPACE_BASE with IOADDR. [MIPS] iounmap if in vr41xx_pciu_init() pci clock is over 33MHz [MIPS] BCM1480: Remove duplicate acknowledge of timer interrupt. [MIPS] Sibyte: pin timer interrupt to their cores. [MIPS] Qemu: Add early printk, your friend in a cold night. [MIPS] Convert reference to mem_map to pfn_to_page(). [MIPS] Sibyte: resurrect old cache hack.
| * | | [MIPS] N32 needs to use the compat version of sys_nfsservctl.Ralf Baechle2007-11-161-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] irq_cpu: use handle_percpu_irq handler to avoid dropping interrupts.Ralf Baechle2007-11-163-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This matters to any sort of device that is wired to one of the CPU interrupt pins on an SMP system. Typically the scenario is most easily triggered with the count/compare timer interrupt where the same interrupt number and thus irq_desc is used on each processor. CPU A CPU B do_IRQ() generic_handle_irq() handle_level_irq() spin_lock(desc_lock) set IRQ_INPROGRESS spin_unlock(desc_lock) do_IRQ() generic_handle_irq() handle_level_irq() spin_lock(desc_lock) IRQ_INPROGRESS set => bail out spin_lock(desc_lock) clear IRQ_INPROGRESS spin_unlock(desc_lock) In case of the cp0 compare interrupt this means the interrupt will be acked and not handled or re-armed on CPU b, so there won't be any timer interrupt until the count register wraps around. With kernels 2.6.20 ... 2.6.23 we usually were lucky that things were just working right on VSMP because the count registers are synchronized on bootup so it takes something that disables interrupts for a long time on one processor to trigger this one. For scenarios where an interrupt is multicasted or broadcasted over several CPUs the existing code was safe and the fix will break it. There is no way to know in the interrupt controller code because it is abstracted from the platform code. I think we do not have such a setup currently, so this should be ok. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] Sibyte: Fix name of clocksource.Ralf Baechle2007-11-161-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] SNI: s/achknowledge/acknowledge/Maciej W. Rozycki2007-11-161-1/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] Makefile: Fix canonical system namesMaciej W. Rozycki2007-11-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GNU `config.guess' uses "linux-gnu" as the canonical system name. Fix the list of compiler prefixes checked to spell it correctly. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] vpe: handle halting TCs in an errata safe way.Nigel Stephens2007-11-161-4/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds a JR.HB after halting a TC, to ensure that the TC has really halted. only modifies the TCSTATUS register when the TC is safely halted. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] Sibyte: Stop timers before programming next even.Ralf Baechle2007-11-162-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have no guarantee by the generic time code that the timer is stopped when the ->next_event method is called. Modifying the Timer Initial Count register while the timer is enabled has UNPREDICTABLE effect according to the BCM1250/BCM1125/BCM1125H User Manual. So stop the timer before reprogramming. This is a paranoia fix; no ill effects have been observed previously. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] Sibyte: Increase minimum oneshot timer interval to two ticks.Ralf Baechle2007-11-162-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For the old minimum of a single tick a value of zero would be programmed into the init value register which in the BCM1250/BCM1125/BCM1125H User Manual in the Timer Special Cases section is documented to have UNPREDICTABLE effect. Observable sympthoms of this bug were hangs of several seconds on the console during bootup and later if both dyntick and highres timer options were activated. In theory contiguous mode of the timers is also affected but in an act of hopeless lack of realism I'll assume nobody will ever configure a KERNEL for HZ > 500kHz but if so I leave that to evolution to sort out. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] Lasat: Fix overlap of interrupt number ranges.Yoichi Yuasa2007-11-162-23/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The range of MIPS_CPU IRQ and the range of LASAT IRQ overlap. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] SNI PCIT CPLUS: workaround for b0rked irq wiring of onboard PCI bus 1Thomas Bogendoerfer2007-11-161-1/+22
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] Fix shadow register support.Ralf Baechle2007-11-164-74/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Shadow register support would not possibly have worked on multicore systems. The support code for it was also depending not on MIPS R2 but VSMP or SMTC kernels even though it makes perfect sense with UP kernels. SR sets are a scarce resource and the expected usage pattern is that users actually hardcode the register set numbers in their code. So fix the allocator by ditching it. Move the remaining CPU probe bits into the generic CPU probe. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] Fix typo in R3000 TRACE_IRQFLAGS codeAtsushi Nemoto2007-11-161-1/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] Sibyte: Replace use of removed IO_SPACE_BASE with IOADDR.Ralf Baechle2007-11-162-6/+6
| | | | | | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] iounmap if in vr41xx_pciu_init() pci clock is over 33MHzRoel Kluin2007-11-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | iounmap if pci clock is over 33MHz. Cosmetic because the iomap() in this case is just a bit of address magic. Signed-off-by: Roel Kluin <12o3l@tiscali.nl> Acked-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] BCM1480: Remove duplicate acknowledge of timer interrupt.Ralf Baechle2007-11-161-13/+2
| | | | | | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] Sibyte: pin timer interrupt to their cores.Ralf Baechle2007-11-162-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | Or strange things will happen. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] Qemu: Add early printk, your friend in a cold night.Ralf Baechle2007-11-165-5/+35
| | | | | | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] Convert reference to mem_map to pfn_to_page().Ralf Baechle2007-11-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | This was crashing the combination of highmem and sparsemem. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | [MIPS] Sibyte: resurrect old cache hack.Ralf Baechle2007-11-161-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The recent switch of the Sibyte SOCs from the processor specific cache managment code in c-sb1.c to c-r4k.c lost this old hack [MIPS] Hack for SB1 cache issues Removing flush_icache_page a while ago broke SB1 which was using an empty flush_data_cache_page function. This glues things well enough so a more efficient but also more intrusive solution can be found later. Signed-Off-By: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> in the hope it was no longer needed. As it turns it still is so resurrect it until there is a better solution. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | [AVR32] Export intc_get_pending symbolHaavard Skinnemoen2007-11-151-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Oprofile needs to call intc_get_pending() in order to determine whether a performance counter interrupt is pending. Also, include the header which declares intc_get_pending() and fix the definition to match the prototype. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | | | [AVR32] Fix duplicate clock index in at32ap machine codeben.nizette@iinet.net.au2007-11-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There's a duplicate clock index between USART0 and USART1 which may be causing system crashes when USART0 is used. Change the USART0 index to '3', indicating the clock that is actually used by USART0. Signed-off-by: Ben Nizette <ben@niasdigital.com> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | | | [AVR32] remove UID16 optionAdrian Bunk2007-11-151-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | avr32 already sees the option from init/Kconfig. Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | | | [AVR32] Turn off debugging in SMC driverHaavard Skinnemoen2007-11-151-1/+0
| | | | | | | | | | | | | | | | Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | | | Extend I/O resource for wdt0 for at32ap7000 devicesHans-Christian Egtvedt2007-11-151-1/+1
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | This patch extends the I/O resource to 0xfff000cf which will enable the watchdog driver to access the reset cause (RCAUSE) register. Making it capable of reporting boot status. Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | | Merge git://git.kernel.org/pub/scm/linux/kernel/git/sam/x86Linus Torvalds2007-11-1513-1171/+578
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/sam/x86: x86: enable "make ARCH=x86" x86: do not use $(ARCH) when not needed kconfig: use $K64BIT to set 64BIT with all*config targets kconfig: add helper to set config symbol from environment variable kconfig: factor out code in confdata.c x86: move the rest of the menu's to Kconfig x86: move all simple arch settings to Kconfig x86: copy x86_64 specific Kconfig symbols to Kconfig.i386 x86: add X86_64 dependency to x86_64 specific symbols in Kconfig.x86_64 x86: add X86_32 dependency to i386 specific symbols in Kconfig.i386 x86: arch/x86/Kconfig.cpu unification x86: start unification of arch/x86/Kconfig.* x86: unification of cfufreq/Kconfig
| * | | x86: enable "make ARCH=x86"Sam Ravnborg2007-11-123-41/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After unification of the Kconfig files and introducing K64BIT support in kconfig it required only trivial changes to enable "make ARCH=x86". With this patch you can build for x86_64 in several ways: 1) make ARCH=x86_64 2) make ARCH=x86 K64BIT=y 3) make ARCH=x86 menuconfig => select 64-bit Likewise for i386 with the addition that i386 is default is you say ARCH=x86. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com>
| * | | x86: do not use $(ARCH) when not neededSam Ravnborg2007-11-127-16/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For x86 ARCH may say i386 or x86_64 and soon x86. Rely on CONFIG_X64_32 to select between 32/64 or just hardcode the value as appropriate. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com>
| * | | x86: move the rest of the menu's to KconfigSam Ravnborg2007-11-123-1543/+1052
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With this patch we have all the Kconfig file shared between i386 and x86_64. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com>
| * | | x86: move all simple arch settings to KconfigSam Ravnborg2007-11-123-234/+136
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most of the arch settings were equal so combine them in the first part of Kconfig. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com>
| * | | x86: copy x86_64 specific Kconfig symbols to Kconfig.i386Sam Ravnborg2007-11-122-23/+198
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No functional changes. A prepatory step towards full unification. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com>
| * | | x86: add X86_64 dependency to x86_64 specific symbols in Kconfig.x86_64Sam Ravnborg2007-11-121-17/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To ease unification of Kconfig.i386 and Kconfig.x86_64 add X86_64 dependencies to all x86_64 specific symbols. This patch introduce no functional changes but is one step towards unification. This smaller step is used to ease review of the patch set. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com>
| * | | x86: add X86_32 dependency to i386 specific symbols in Kconfig.i386Sam Ravnborg2007-11-121-37/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To ease unification of Kconfig.i386 and Kconfig.x86_64 add X86_32 dependencies to all i386 specific symbols. This patch introduce no functional changes but is one step towards unification. This smaller step is used to ease review of the patch set. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-14 10:11:31 +0100