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* ARM: dts: imx25.dtsi: Fix USB support.Fabio Estevam2014-04-301-11/+18
| | | | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Denis Carikli <denis@eukrea.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: dts: mx35: USB block requires only one clockFabio Estevam2014-04-301-4/+2
| | | | | | | Like other imx SoCs only one USB clock is needed on mx35. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: dts: mx25: USB block requires only one clockFabio Estevam2014-04-301-4/+2
| | | | | | | Like other imx SoCs only one USB clock is needed on mx25. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: dts: vf610-twr: Add support for sdhc1Cosmin Stoica2014-04-302-0/+30
| | | | | | | | | | | | | | | | The kernel was not able to boot from SD card because sdhc support was not present into the dts. A new entry for sdhc1 was added for vf610-twr board based on the compatible entry present on imx53. After applying these changes, the kernel is able to boot successfully from SD card. Signed-off-by: Cosmin Stoica <cosminstefan.stoica@freescale.com> Signed-off-by: Chircu Bogdan <Bogdan.Chircu@freescale.com> Signed-off-by: Eddy Petrisor <eddy.petrisor@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx25-pdk: Add esdhc1 supportFabio Estevam2014-04-301-0/+21
| | | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx25-pdk: Provide an Ethernet PHY resetFabio Estevam2014-04-301-0/+2
| | | | | | | | GPIO4_8 is connected to the Ethernet PHY reset line, so populate the 'phy-reset-gpios' property accordingly. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx25-pdk: Provide a regulator for Ethernet PHYFabio Estevam2014-04-301-0/+18
| | | | | | | | GPIO2_3 controls the power to the Ethernet PHY, so provide a regulator node for this. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx25-pdk: Add FEC pinsFabio Estevam2014-04-301-0/+16
| | | | | | | | Instead of relying on the bootloader for configuring the FEC pins, pass the FEC pin configuration via device tree instead. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx25-pdk: Add UART1 pinsFabio Estevam2014-04-301-0/+16
| | | | | | | | | | UART1 is the console port on mx25pdk board. Add the pin configuration for UART1 port and also pass 'fsl,uart-has-rtscts' to indicate that the port has RTS and CTS pins. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx25-pdk: Sort the dt nodesFabio Estevam2014-04-301-4/+4
| | | | | | | Keep the dt nodes sorted for better readability. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx6qdl-sabresd.dtsi: Add red ledVincent Stehlé2014-04-301-0/+19
| | | | | | | | | | | Make the red gpio led available to the user. This can be toggled with the sysfs for example, or used as a heartbeat or mmc activity light by changing the trigger. Signed-off-by: Vincent Stehlé <vincent.stehle@freescale.com> Cc: Sascha Hauer <kernel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx27-phytec-phycore-som: Enable SSI1Alexander Shiyan2014-04-301-0/+16
| | | | | | | | | This patch adds pin group for Synchronous Serial Interface 1 (SSI1) for PCM-038 module and enables this interface. This change do nothing at the current stage but helps to continue develop sound support. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx27-phytec-phycore-rdk: Add missing pinctrl definition for SPI CS1Alexander Shiyan2014-04-301-0/+7
| | | | | | | This patch adds missing pinctrl definition for SPI chipselect 1. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: imx: Add alias for ethernet controllerMarek Vasut2014-04-308-0/+8
| | | | | | | | Add alias for FEC ethernet on i.MX to allow bootloaders (like U-Boot) patch-in the MAC address for FEC using this alias. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: dts: mbimxsd35: Add sound support.Denis Carikli2014-04-301-0/+9
| | | | | | | | | | | Cc: Eric Bénard <eric@eukrea.com> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Denis Carikli <denis@eukrea.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* Merge branch 'safe-dirty-tlb-flush'Linus Torvalds2014-04-285-14/+77
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This merges the patch to fix possible loss of dirty bit on munmap() or madvice(DONTNEED). If there are concurrent writers on other CPU's that have the unmapped/unneeded page in their TLBs, their writes to the page could possibly get lost if a third CPU raced with the TLB flush and did a page_mkclean() before the page was fully written. Admittedly, if you unmap() or madvice(DONTNEED) an area _while_ another thread is still busy writing to it, you deserve all the lost writes you could get. But we kernel people hold ourselves to higher quality standards than "crazy people deserve to lose", because, well, we've seen people do all kinds of crazy things. So let's get it right, just because we can, and we don't have to worry about it. * safe-dirty-tlb-flush: mm: split 'tlb_flush_mmu()' into tlb flushing and memory freeing parts
| * mm: split 'tlb_flush_mmu()' into tlb flushing and memory freeing partsLinus Torvalds2014-04-265-14/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mmu-gather operation 'tlb_flush_mmu()' has done two things: the actual tlb flush operation, and the batched freeing of the pages that the TLB entries pointed at. This splits the operation into separate phases, so that the forced batched flushing done by zap_pte_range() can now do the actual TLB flush while still holding the page table lock, but delay the batched freeing of all the pages to after the lock has been dropped. This in turn allows us to avoid a race condition between set_page_dirty() (as called by zap_pte_range() when it finds a dirty shared memory pte) and page_mkclean(): because we now flush all the dirty page data from the TLB's while holding the pte lock, page_mkclean() will be held up walking the (recently cleaned) page tables until after the TLB entries have been flushed from all CPU's. Reported-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Tested-by: Dave Hansen <dave.hansen@intel.com> Acked-by: Hugh Dickins <hughd@google.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Russell King - ARM Linux <linux@arm.linux.org.uk> Cc: Tony Luck <tony.luck@intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-armLinus Torvalds2014-04-275-15/+56
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull arm fixes from Russell King: "A number of fixes for the PJ4/iwmmxt changes which arm-soc forced me to take during the merge window. This stuff should have been better tested and sorted out *before* the merge window" * 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: ARM: 8042/1: iwmmxt: allow to build iWMMXt on Marvell PJ4B ARM: 8041/1: pj4: fix cpu_is_pj4 check ARM: 8040/1: pj4: properly detect existence of iWMMXt coprocessor ARM: 8039/1: pj4: enable iWMMXt only if CONFIG_IWMMXT is set ARM: 8038/1: iwmmxt: explicitly check for supported architectures
| * | ARM: 8042/1: iwmmxt: allow to build iWMMXt on Marvell PJ4BSebastian Hesselbarth2014-04-252-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some Marvell PJ4B CPUs also implement iWMMXt extensions. With a proper check for iWMMXt coprocessors now in place, enable it by default on PJ4B. While at it, also allow to manually select the corresponding Kconfig option. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 8041/1: pj4: fix cpu_is_pj4 checkSebastian Hesselbarth2014-04-251-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit fdb487f5c961b94486a78fa61fa28b8eff1954ab ("ARM: 8015/1: Add cpu_is_pj4 to distinguish PJ4 because it has some differences with V7") introduced a cpuid check for Marvell PJ4 processors to fix a regression caused by adding PJ4 based Marvell Dove into multi_v7. Unfortunately, this check is too narrow to catch PJ4 used on Dove itself and breaks iWMMXt support. This patch therefore relaxes the cpuid mask to match both PJ4 and PJ4B. Also, rework the given comment about PJ4/PJ4B modifications to be a little bit more specific about the differences. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 8040/1: pj4: properly detect existence of iWMMXt coprocessorSebastian Hesselbarth2014-04-251-1/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit fdb487f5c961b94486a78fa61fa28b8eff1954ab ("ARM: 8015/1: Add cpu_is_pj4 to distinguish PJ4 because it has some differences with V7") introduced a fix for checking PJ4 cpuid to not use PJ4 specific coprocessor access on non-PJ4 platforms. Unfortunately, this in turn broke Marvell Armada 370/XP, both comprising Marvell PJ4B CPUs without iWMMXt extension. Instead of only checking for cpuid, which may not be sufficient to determine iWMMXt support, the presence of iWMMXt coprocessors can be checked by enabling and reading the Coprocessor ID register (wCID, register 0 of CP1). Therefore this adds an explicit check for the presence and correct wCID value, before enabling iWMMXt capabilities. As a bonus, also print the iWMMXt version of a detected coprocessor. This has been tested to properly detect iWMMXt presence/absence on: - PJ4, CPUID 0x560f5815, wCID 0x56052001: Marvell Dove, iWMMXt v2 - PJ4B, CPUID 0x561f5811: Marvell Armada 370, no iWMMXt - PJ4B, CPUID 0x562f5841, wCID 0x56052001: Marvell Armada 1500, iWMMXt v2 - PJ4B, CPUID 0x562f5842: Marvell Armada XP, no iWMMXt Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 8039/1: pj4: enable iWMMXt only if CONFIG_IWMMXT is setSebastian Hesselbarth2014-04-251-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes PJ4 coprocessor init to only expose iWMMXt capabilities, if the corresponding kernel support for iWMMXt is enabled. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: 8038/1: iwmmxt: explicitly check for supported architecturesSebastian Hesselbarth2014-04-251-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | iwmmxt.S requires special treatment of coprocessor access registers for PJ4 and XScale-based CPUs. It only checks for CPU_PJ4 and drops down to XScale-based treatment on all other architectures. As some PJ4B also come with iWMMXt and also need PJ4 treatment, rework the corresponding preprocessor directives to explicitly check for supported architectures and fail on unsupported ones. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | Merge tag 'arm64-fixes' of ↵Linus Torvalds2014-04-277-7/+13
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Catalin Marinas: - compat renameat2 syscall wiring and __NR_compat_syscalls fix - TLB fix for transparent huge pages following switch to generic mmu_gather - spinlock initialisation for init_mm's context - move of_clk_init() earlier - Kconfig duplicate entry fix * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: init: Move of_clk_init to time_init arm64: initialize spinlock for init_mm's context arm64: debug: remove noisy, pointless warning arm64: mm: Add THP TLB entries to general mmu_gather arm64: add renameat2 compat syscall ARM64: Remove duplicated Kconfig entry for "kernel/power/Kconfig" arm64: __NR_compat_syscalls fix
| * | | arm64: init: Move of_clk_init to time_initChanho Min2014-04-252-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clock providers should be initialized before clocksource_of_init. If not, Clock source initialization can be fail to get the clock. Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Chanho Min <chanho.min@lge.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | | arm64: initialize spinlock for init_mm's contextLeo Yan2014-04-251-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARM64 has defined the spinlock for init_mm's context, so need initialize the spinlock structure; otherwise during the suspend flow it will dump the info for spinlock's bad magic warning as below: [ 39.084394] Disabling non-boot CPUs ... [ 39.092871] BUG: spinlock bad magic on CPU#1, swapper/1/0 [ 39.092896] lock: init_mm+0x338/0x3e0, .magic: 00000000, .owner: <none>/-1, .owner_cpu: 0 [ 39.092907] CPU: 1 PID: 0 Comm: swapper/1 Tainted: G O 3.10.33 #125 [ 39.092912] Call trace: [ 39.092927] [<ffffffc000087e64>] dump_backtrace+0x0/0x16c [ 39.092934] [<ffffffc000087fe0>] show_stack+0x10/0x1c [ 39.092947] [<ffffffc000765334>] dump_stack+0x1c/0x28 [ 39.092953] [<ffffffc0007653b8>] spin_dump+0x78/0x88 [ 39.092960] [<ffffffc0007653ec>] spin_bug+0x24/0x34 [ 39.092971] [<ffffffc000300a28>] do_raw_spin_lock+0x98/0x17c [ 39.092979] [<ffffffc00076cf08>] _raw_spin_lock_irqsave+0x4c/0x60 [ 39.092990] [<ffffffc000094044>] set_mm_context+0x1c/0x6c [ 39.092996] [<ffffffc0000941c8>] __new_context+0x94/0x10c [ 39.093007] [<ffffffc0000d63d4>] idle_task_exit+0x104/0x1b0 [ 39.093014] [<ffffffc00008d91c>] cpu_die+0x14/0x74 [ 39.093021] [<ffffffc000084f74>] arch_cpu_idle_dead+0x8/0x14 [ 39.093030] [<ffffffc0000e7f18>] cpu_startup_entry+0x1ec/0x258 [ 39.093036] [<ffffffc00008d810>] secondary_start_kernel+0x114/0x124 Signed-off-by: Leo Yan <leoy@marvell.com> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | | arm64: debug: remove noisy, pointless warningWill Deacon2014-04-251-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sending a SIGTRAP to a user task after execution of a BRK instruction at EL0 is fundamental to the way in which software breakpoints work and doesn't deserve a warning to be logged in dmesg. Whilst the warning can be justified from EL1, do_debug_exception will already do the right thing, so simply remove the code altogether. Cc: Sandeepa Prabhu <sandeepa.prabhu@linaro.org> Reported-by: Kyrylo Tkachov <kyrylo.tkachov@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | | arm64: mm: Add THP TLB entries to general mmu_gatherSteve Capper2014-04-251-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When arm64 moved over to the core mmu_gather, it lost the logic to flush THP TLB entries (tlb_remove_pmd_tlb_entry was removed and the core implementation only signals that the mmu_gather needs a flush). This patch ensures that tlb_add_flush is called for THP TLB entries. Signed-off-by: Steve Capper <steve.capper@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | | arm64: add renameat2 compat syscallMiklos Szeredi2014-04-231-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Wire up the renameat2 syscall for compat (AArch32) applications. Signed-off-by: Miklos Szeredi <mszeredi@suse.cz> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | | ARM64: Remove duplicated Kconfig entry for "kernel/power/Kconfig"Hanjun Guo2014-04-221-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a duplicated Kconfig entry for "kernel/power/Kconfig" in menu "Power management options" and "CPU Power Management", remove the one from menu "CPU Power Management" suggested by Viresh. Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * | | arm64: __NR_compat_syscalls fixMiklos Szeredi2014-04-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes commit 6290b53de025 (arm64: compat: Wire up new AArch32 syscalls) which did not update __NR_compat_syscalls accordingly. Signed-off-by: Miklos Szeredi <mszeredi@suse.cz> Cc: <stable@vger.kernel.org> # 3.14+ Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* | | | Merge branch 'irq-urgent-for-linus' of ↵Linus Torvalds2014-04-271-1/+1
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq fixes from Thomas Gleixner: "A slighlty large fix for a subtle issue in the CPU hotplug code of certain ARM SoCs, where the not yet online cpu needs to setup the cpu local timer and needs to set the interrupt affinity to itself. Setting interrupt affinity to a not online cpu is prohibited and therefor the timer interrupt ends up on the wrong cpu, which leads to nasty complications. The SoC folks tried to hack around that in the SoC code in some more than nasty ways. The proper solution is to have a way to enforce the affinity setting to a not online cpu. The core patch to the genirq code provides that facility and the follow up patches make use of it in the GIC interrupt controller and the exynos timer driver. The change to the core code has no implications to existing users, except for the rename of the locked function and therefor the necessary fixup in mips/cavium. Aside of that, no runtime impact is possible, as none of the existing interrupt chips implements anything which depends on the force argument of the irq_set_affinity() callback" * 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: clocksource: Exynos_mct: Register clock event after request_irq() clocksource: Exynos_mct: Use irq_force_affinity() in cpu bringup irqchip: Gic: Support forced affinity setting genirq: Allow forcing cpu affinity of interrupts
| * | | | genirq: Allow forcing cpu affinity of interruptsThomas Gleixner2014-04-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current implementation of irq_set_affinity() refuses rightfully to route an interrupt to an offline cpu. But there is a special case, where this is actually desired. Some of the ARM SoCs have per cpu timers which require setting the affinity during cpu startup where the cpu is not yet in the online mask. If we can't do that, then the local timer interrupt for the about to become online cpu is routed to some random online cpu. The developers of the affected machines tried to work around that issue, but that results in a massive mess in that timer code. We have a yet unused argument in the set_affinity callbacks of the irq chips, which I added back then for a similar reason. It was never required so it got not used. But I'm happy that I never removed it. That allows us to implement a sane handling of the above scenario. So the affected SoC drivers can add the required force handling to their interrupt chip, switch the timer code to irq_force_affinity() and things just work. This does not affect any existing user of irq_set_affinity(). Tagged for stable to allow a simple fix of the affected SoC clock event drivers. Reported-and-tested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Marek Szyprowski <m.szyprowski@samsung.com> Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Cc: Tomasz Figa <t.figa@samsung.com>, Cc: Daniel Lezcano <daniel.lezcano@linaro.org>, Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: linux-arm-kernel@lists.infradead.org, Cc: stable@vger.kernel.org Link: http://lkml.kernel.org/r/20140416143315.717251504@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | | Merge tag 'staging-3.15-rc3' of ↵Linus Torvalds2014-04-272-2/+2
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging Pull staging / IIO driver fixes from Greg KH: "Here are some small staging and IIO driver fixes for 3.15-rc3. Nothing major at all, just some assorted issues that people have reported" * tag 'staging-3.15-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: staging: comedi: usbdux: bug fix for accessing 'ao_chanlist' in private data iio: adc: mxs-lradc: fix warning when buidling on avr32 iio: cm36651: Fix i2c client leak and possible NULL pointer dereference iio: querying buffer scan_mask should return 0/1 staging:iio:ad2s1200 fix a missing break iio: adc: at91_adc: correct default shtim value ARM: at91: at91sam9260: change at91_adc name ARM: at91: at91sam9g45: change at91_adc name iio: cm32181: Fix read integration time function iio: adc: at91_adc: Repair broken platform_data support
| * \ \ \ \ Merge tag 'iio-fixes-for-3.15a' of ↵Greg Kroah-Hartman2014-04-232-2/+2
| |\ \ \ \ \ | | |_|/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-linus Jonathan writes: First found of IIO fixes for the 3.15 cycle. * Fix the platform data support for the at91 adc driver. * A couple of related follow up patches get the support working again for at91sam9260 and at91sam9g45 as the earlier patch results in a device name change. * A default timer value in the at91 adc driver was bonkers. Make it sane. * Fix incorrect reporting of the integration time for the cm32181 light sensor * Fix a missing break in the ad2s1200 driver which would have give a false error return. * Make sure buffer scan mask queries from userspace return 0/1 rather than a fairly random value depending on their implementation of test_bit * Fix leak of the i2c client and a null pointer dereference in the cm36651 driver. * Fix a build warning on avr32 for the mxs-lradc (not exactly a critical combination - but the issue was real).
| | * | | | ARM: at91: at91sam9260: change at91_adc nameAlexandre Belloni2014-03-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can't use "at91_adc" to refer to the at91_adc driver anymore as the name is used to match an id_table. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
| | * | | | ARM: at91: at91sam9g45: change at91_adc nameAlexandre Belloni2014-03-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can't use "at91_adc" to refer to the at91_adc driver anymore as the name is used to match an id_table. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
* | | | | | Merge tag 'driver-core-3.15-rc3' of ↵Linus Torvalds2014-04-271-1/+1
|\ \ \ \ \ \ | |_|_|_|_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core Pull driver core fixes from Greg KH: "Here are some kernfs fixes for 3.15-rc3 that resolve some reported problems. Nothing huge, but all needed" * tag 'driver-core-3.15-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: s390/ccwgroup: Fix memory corruption kernfs: add back missing error check in kernfs_fop_mmap() kernfs: fix a subdir count leak
| * | | | | s390/ccwgroup: Fix memory corruptionChristian Borntraeger2014-04-251-1/+1
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 0b60f9ead5d4816e7e3d6e28f4a0d22d4a1b2513 (s390: use device_remove_file_self() instead of device_schedule_callback()) caused random memory corruption on my s390 box. Turns out that the last element of the ccwgroup structure is of dynamic size, so we must move the newly introduced work structure _before_ the zero length array. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> CC: Tejun Heo <tj@kernel.org> CC: Martin Schwidefsky <schwidefsky@de.ibm.com> CC: Heiko Carstens <heiko.carstens@de.ibm.com> CC: Sebastian Ott <sebott@linux.vnet.ibm.com> CC: Peter Oberparleiter <oberpar@linux.vnet.ibm.com> Acked-by: Tejun Heo <tj@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | | | | Merge tag 'fixes-3.15-rc3' of ↵Linus Torvalds2014-04-2572-165/+416
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Arnd Bergmann: "Since we didn't get around to collect fixes in time for -rc2 over the easter vacation, this one is unfortunately a bit larger than we'd like for an -rc3 merge. A large set of the changes is in the device tree sources, so I'm splitting out the description between code changes and DT changes. Aside from omap and versatile express, the actual code bugs are and trivial. Here is an overview: imx: - fix video clock settings - fix one clock refcounting bug omap: - update defconfig for renamed USB PHY driver - fix error handling in gpmc - fix N900 video initialization regression - fix reression in hwmod code from missing braces - fix am43xx and omap3 clocks - remove bogus write to voltage control register pxa: - fix build regression from 3.13 header cleanup rockchip: - fix a misleading printk string shmobile: - fix incorrect sound setting on multiple machines spear: - remove incorrect __init section annotation tegra: - remove a stale Kconfig entry u300: - update defconfig ux500: - enable common wireless and sensor drivers in defconfig - more defconfig updates vexpress: - fix voltage calculation for opp - fix reboot hang and warning - fix out-of-bounds array access - improve error handling in clock driver overall: - always select CLKSRC_OF in multiplatform builds And these are the devicetree related changes: imx: - add missing #clock-cell properties - fix pinctrl setting in imx6sl-evk - fix video endpoint on imx53 - remove obsolete lvds-channel nodes (multiple patches) - add missing second stmpe node - fix usb host mode on dmo-edmqmx6 (multiple patches) - fix gic node #address-cells to match usage - add missing legacy IRQ map for PCIe - fix microsom pincontrol setting for rgmii - fix fatal typo in touchscreen DT usage for mx5 - list all RAM present on m53evk and mx53qsb omap: - fix bug in DT handling of gpmc external bus - add DT for older revision of beagleboard - fix regression after DT node name fixes - remove obsolete properties for gpmc - fix pinmux comment to match DT it refers to - fix newly added dra7xx clock node data - add missing clock for USB PHY mvebu: - add missing clock for mdio node - fix nonstandard vendor prefixes on i2c nodes rockchip: - fix pin control setting for uart shmobile: - fix typo in DT data for pin control (multiple patches) - fix gic node #address-cells to match usage tegra: - fix clock and uart DT representation to match hardware zynq: - add DT nodes for newly added driver - add DT properties required for cpufreq-ondemand overall: - restore alphabetic order in Makefile - grammar fixes in bindings" * tag 'fixes-3.15-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (66 commits) ARM: vexpress/TC2: Convert OPP voltage to uV before storing power/reset: vexpress: Fix restart/power off operation dt: tegra: remove non-existent clock IDs clk: tegra: remove non-existent clocks ARM: tegra: remove UART5/UARTE from tegra124.dtsi ARM: tegra: remove TEGRA_EMC_SCALING_ENABLE ARM: Tidy up DTB Makefile entries ARM: fix missing CLKSRC_OF on multi-platform ARM: spear: add __init to spear_clocksource_init() ARM: pxa: hx4700.h: include "irqs.h" for PXA_NR_BUILTIN_GPIO arm/mach-vexpress: array accessed out of bounds clk: vexpress: NULL dereference on error path ARM: OMAP2+: Fix GPMC remap for devices using an offset ARM: zynq: dt: Add I2C nodes to Zynq device tree ARM: zynq: DT: Add 'clock-latency' property ARM: OMAP2+: Fix oops for GPMC free ARM: dts: Add support for the BeagleBoard xM A/B ARM: dts: Grammar /that will/it will/ ARM: dts: Grammar /is uses/ is used/ ARM: OMAP2+: Fix config name for USB3 PHY ...
| * \ \ \ \ Merge tag 'zynq-dt-fixes-for-3.15' of git://git.xilinx.com/linux-xlnx into fixesArnd Bergmann2014-04-253-0/+167
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arm: Xilinx Zynq DT fixes for v3.15 - Enable Zynq I2c - Fix cpufreq DT binding * tag 'zynq-dt-fixes-for-3.15' of git://git.xilinx.com/linux-xlnx: ARM: zynq: dt: Add I2C nodes to Zynq device tree ARM: zynq: DT: Add 'clock-latency' property Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | | | ARM: zynq: dt: Add I2C nodes to Zynq device treeSoren Brinkmann2014-04-223-0/+166
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Tested-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | | | | ARM: zynq: DT: Add 'clock-latency' propertySoren Brinkmann2014-04-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Specify the 'clock-latency' property to avoid certain cpufreq governors from refusing to work with the following error: ondemand governor failed, too long transition latency of HW, fallback to performance governor Reported-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Tested-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | | | Merge tag 'vexpress/fixes-for-3.15' of ↵Arnd Bergmann2014-04-2452-198/+466
| |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.linaro.org/people/pawel.moll/linux into fixes ARM Versatile Express fixes for 3.15 This series contains straight-forward fixes for different Versatile Express infrastructure drivers: - NULL pointer dereference on the error path in the clk driver - out of boundary array access in the dcscb driver - broken restart/power off implementation - mis-interpreted voltage unit in the spc driver * tag 'vexpress/fixes-for-3.15' of git://git.linaro.org/people/pawel.moll/linux: ARM: vexpress/TC2: Convert OPP voltage to uV before storing power/reset: vexpress: Fix restart/power off operation arm/mach-vexpress: array accessed out of bounds clk: vexpress: NULL dereference on error path Includes an update to 3.15-rc2 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | | | | ARM: vexpress/TC2: Convert OPP voltage to uV before storingPunit Agrawal2014-04-241-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SPC stores voltage in mV while the code assumes it was returning uV. Convert the returned voltage to uV before storing. Also fix the comment depicting voltage to uV. Signed-off-by: Punit Agrawal <punit.agrawal@arm.com> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Pawel Moll <pawel.moll@arm.com>
| | * | | | | | arm/mach-vexpress: array accessed out of boundsHeinrich Schuchardt2014-04-241-2/+5
| | | |/ / / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dcscb_allcpus_mask is an array of size 2. The index variable cluster has to be checked against this limit before accessing the array. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Pawel Moll <pawel.moll@arm.com>
| * | | | | | ARM: tegra: remove UART5/UARTE from tegra124.dtsiStephen Warren2014-04-241-13/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra124 only has 4 UARTs. Parts of the documentation hint at a fifth UART, but this appears to be left-over from earlier SoC documentation. Remove the non-existent DT node for UART5. Cc: <stable@vger.kernel.org> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | | | | Merge tag 'omap-for-v3.15/fixes-v2-signed' of ↵Arnd Bergmann2014-04-2421-37/+65
| |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes Fixes for omaps, mostly to fix some GPMC, DSS and USB issues for device tree based booting. And turns out BeagleBoard xM A/B needs it's own minimal dts in addition to the related u-boot changes. Also few minor documentation and typo fixes are merged to get them out of the way. * tag 'omap-for-v3.15/fixes-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: Fix GPMC remap for devices using an offset ARM: OMAP2+: Fix oops for GPMC free ARM: dts: Add support for the BeagleBoard xM A/B ARM: dts: Grammar /that will/it will/ ARM: dts: Grammar /is uses/ is used/ ARM: OMAP2+: Fix config name for USB3 PHY ARM: dts: am335x: update USB DT references ARM: dts: OMAP2+: remove uses of obsolete gpmc,device-nand ARM: AM335X: EVM: fix pinmux documentation in devicetree ARM: OMAP2+: N900: remove omapdss init for DT boot ARM: dts: dra7xx-clocks: Correct mcasp2_ahclkx_mux bit-shift ARM: dts: omap5: Add clocks to USB3 PHY node ARM: OMAP2+: hwmod: fix missing braces in _init() ARM: AM43xx: fix dpll init in bypass mode ARM: OMAP3: hwmod data: Correct clock domains for USB modules ARM: OMAP3: PM: remove access to PRM_VOLTCTRL register Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | | | | ARM: OMAP2+: Fix GPMC remap for devices using an offsetTony Lindgren2014-04-231-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At least the smc91x driver expects the device to be at 0x300 offset from bus base address. This does not work currently for GPMC when booted in device tree mode as it attempts to remap the the allocated GPMC partition to the address configured by the device tree plus the device offset. Note that this works just fine when booted with legacy mode. Let's fix the issue by just ignoring any device specific offset while remapping. And let's make sure the remap address confirms to the GPMC 16MB minimum granularity as listed in the TRM for GPMC_CONFIG7 BASEADDRESS bits. Otherwise we can get something like this: omap-gpmc 6e000000.gpmc: cannot remap GPMC CS 1 to 0x01000300 Cc: Pekon Gupta <pekon@ti.com> Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | | | | ARM: OMAP2+: Fix oops for GPMC freeTony Lindgren2014-04-221-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If gpmc_cs_remap() fails we will get an error because we are calling release_resource() on an uninitialized resource. Let's fix that by checking the resource flags. And while at it, let's also make gpmc_cs_delete_mem() use the res pointer that we already have to avoid confusion. Without this patch we can get the following error: omap-gpmc 6e000000.gpmc: cannot remap GPMC CS 1 to 0x01000300 Unable to handle kernel NULL pointer dereference at virtual address 00000018 ... (gpmc_cs_free+0x94/0xc8) (gpmc_probe_generic_child+0x178/0x1ec) (gpmc_probe_dt+0x1bc/0x2cc) (gpmc_probe+0x250/0x44c) (platform_drv_probe+0x3c/0x6c) (really_probe+0x74/0x208) (driver_probe_device+0x34/0x50) (bus_for_each_drv+0x60/0x8c) (device_attach+0x80/0xa4) (bus_probe_device+0x88/0xb0) (device_add+0x320/0x450) (of_platform_device_create_pdata+0x80/0x9c) (of_platform_bus_create+0xd0/0x170) (of_platform_bus_create+0x12c/0x170) (of_platform_populate+0x60/0x98) (pdata_quirks_init+0x30/0x48) (customize_machine+0x20/0x48) (do_one_initcall+0x2c/0x14c) (do_basic_setup+0x98/0xd8) (kernel_init_freeable+0x12c/0x1e0) (kernel_init+0x8/0xf0) (ret_from_fork+0x14/0x2c) Code: e1a04000 e59f0070 eb195136 e5942010 (e5923018) Cc: Pekon Gupta <pekon@ti.com> Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: tony Lindgren <tony@atomide.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-24 16:11:25 +0100