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* ahci: Convert timers to use timer_setup()Kees Cook2017-10-191-0/+1
| | | | | | | | | | | | | | In preparation for unconditionally passing the struct timer_list pointer to all timer callbacks, switch to using the new timer_setup() and from_timer() to pass the timer pointer explicitly. Adds a pointer back to link structure. Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Tejun Heo <tj@kernel.org> Cc: linux-ide@vger.kernel.org Link: https://lkml.kernel.org/r/20171016215658.GA101965@beast
* libata: Add the AHCI_HFLAG_NO_WRITE_TO_RO flagDoug Berger2017-06-221-0/+2
| | | | | | | | | | | | While most hardware will simply ignore a write to a read-only register, some hardware will signal an abort if this occurs. This commit introduces the flag AHCI_HFLAG_NO_WRITE_TO_RO to prevent the AHCI library from attempting to write to the HOST_CAP, HOST_CAP2, and HOST_PORTS_IMPL registers which may be read-only. Signed-off-by: Doug Berger <opendmb@gmail.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* libata: Add the AHCI_HFLAG_YES_ALPM flagDoug Berger2017-06-221-0/+1
| | | | | | | | | | | | Some hardware is capable of supporting Aggresive Link Power Management even though it is not indicated by the Host Capability register. This commit adds the AHCI_HFLAG_YES_ALPM flag to the AHCI library to allow indication of this quirk when the Host Capability register is Read Only and therefore cannot be changed. Signed-off-by: Doug Berger <opendmb@gmail.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* ata: update references for libata documentationMauro Carvalho Chehab2017-05-161-1/+1
| | | | | | | | | The libata documentation is now using ReST. Update references to it to point to the new place. Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com> Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* sata: ahci: export ahci_do_hardreset() locallyBartosz Golaszewski2017-01-311-0/+3
| | | | | | | | | | | | | | | | | | We need a way to retrieve the information about the online state of the link in the ahci-da850 driver. Create a new function: ahci_do_hardreset() which is called from ahci_hardreset() for backwards compatibility, but has an additional argument: 'online' - which can be used to check if the link is online after this function returns. The new routine will be used in the ahci-da850 driver to avoid code duplication when implementing a workaround for tha da850 SATA controller quirk/instability. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Acked-by: Tejun Heo <tj@kernel.org> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* ahci: use pci_alloc_irq_vectorsChristoph Hellwig2016-09-061-19/+5
| | | | | | | | | | | | | | | | | | | | | | | Use the new pci_alloc_irq_vectors API to allocate MSI-X and MSI vectors. The big advantage over the old code is that we can use the same API for MSI and MSI-X, and that we don't need to store the MSI-X vector mapping in driver-private data structures. This first conversion keeps the probe order as-is: MSI-X multi vector, MSI multi vector, MSI single vector, MSI-X single vector and last a single least legacy interrupt line. There is one small change of behavior: we now check the "MSI Revert to Single Message" flag for MSI-X in addition to MSI. Because the API to find the Linux IRQ number for a MSI/MSI-X vector is PCI specific, but libahaci is bus-agnostic I had to a get_irq_vector function pointer to struct ahci_host_priv. The alternative would be to move the multi-vector case of ahci_host_activate to ahci.c and just call ata_host_activate directly from the others users of ahci_host_activate. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Tejun Heo <tj@kernel.org>
* ahci: Cache host controller versionMika Westerberg2016-02-191-0/+1
| | | | | | | | This allows sysfs nodes to read the cached value directly instead of powering up possibly runtime suspended controller. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* ata: Remove the AHCI_HFLAG_EDGE_IRQ support from libahci.Suman Tripathi2016-02-111-2/+1
| | | | | | | | | | | | | The flexibility to override the irq handles in the LLD's are already present, so controllers implementing a edge trigger latch can implement their own interrupt handler inside the driver. This patch removes the AHCI_HFLAG_EDGE_IRQ support from libahci and moves edge irq handling to ahci_xgene. tj: Minor update to description. Signed-off-by: Suman Tripathi <stripathi@apm.com> Signed-off-by: Tejun Heo <tj@kenrel.org>
* libahci: Implement the capability to override the generic ahci interrupt ↵Suman Tripathi2016-02-111-0/+2
| | | | | | | | | | | | | | | handler. This patch implements the capability to override the generic AHCI interrupt handler so that specific ahci drivers can implement their own custom interrupt handler routines. It also exports ahci_handle_port_intr so that custom irq_handler implementations can use it. tj: s/ahci_irq_handler/irq_handler/ and updated description. Signed-off-by: Suman Tripathi <stripathi@apm.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* drivers: ata: wake port before DMA stop for ALPMDanesh Petigara2016-01-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The AHCI driver code stops and starts port DMA engines at will without considering the power state of the particular port. The AHCI specification isn't very clear on how to handle this scenario, leaving implementation open to interpretation. Broadcom's STB SATA host controller is unable to handle port DMA controller restarts when the port in question is in low power mode. When a port enters partial or slumber mode, its PHY is powered down. When a controller restart is requested, the controller's internal state machine expects the PHY to be brought back up by software which never happens in this case, resulting in failures. To avoid this situation, logic is added to manually wake up the port just before its DMA engine is stopped, if the port happens to be in a low power state. HBA initiated power management ensures that the port eventually returns to its configured low power state, when the link is idle (as per the conditions listed in the spec). A new host flag is also added to ensure this logic is only exercised for hosts with the above limitation. tj: Formatting changes. Signed-off-by: Danesh Petigara <dpetigara@broadcom.com> Reviewed-by: Markus Mayer <mmayer@broadcom.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* ahci: compile out msi/msix infrastructureDan Williams2015-12-071-2/+24
| | | | | | | | | | | | | | | | | | | | | | Quoting Arnd: The AHCI driver is used for some on-chip devices that do not use PCI for probing, and it can be built even when CONFIG_PCI is disabled, but that now results in a build failure: ata/libahci.c: In function 'ahci_host_activate_multi_irqs': ata/libahci.c:2475:4: error: invalid use of undefined type 'struct msix_entry' ata/libahci.c:2475:21: error: dereferencing pointer to incomplete type 'struct msix_entry' Add ifdef CONFIG_PCI_MSI infrastructure to compile out the multi-msi and multi-msix code. Reported-by: Arnd Bergmann <arnd@arndb.de> Tested--by: Arnd Bergmann <arnd@arndb.de> [arnd: fix up pci enabled case] Reported-by: Paul Gortmaker <paul.gortmaker@windriver.com> Fixes: d684a90d38e2 ("ahci: per-port msix support") Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* ahci: kill 'intr_status'Dan Williams2015-11-161-1/+0
| | | | | | | | This field in achi_port_priv was only used to support threaded interrupts. Now that we are hardirq only it can be deleted. Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* ahci: per-port msix supportDan Williams2015-11-161-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Some AHCI controllers support per-port MSI-X vectors. At the same time the Linux AHCI driver needs to support one-off architectures that implement a single MSI-X vector for all ports. The heuristic for enabling AHCI ports becomes, in order of preference: 1/ per-port multi-MSI-X 2/ per-port multi-MSI 3/ single MSI 4/ single MSI-X 5/ legacy INTX This all depends on AHCI implementations with potentially broken MSI-X requesting less vectors than the number of ports. If this assumption is violated we will need to start explicitly white-listing AHCI-MSIX implementations. Reported-by: Ricardo Neri <ricardo.neri@intel.com> [ricardo: fix struct msix_entry handling] Reported-by: kernel test robot <ying.huang@linux.intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* ata: ahci: find eSATA ports and flag them as removableManuel Lauss2015-09-301-0/+2
| | | | | | | | | | | | | | | | | | If the AHCI ports' HPCP or ESP bits are set, the port should be considered external (e.g. eSATA) and is marked as removable. Userspace tools like udisks then treat it like an usb drive. With this patch applied, when I plug a drive into the esata port, KDE pops up a window asking what to do with the drives(s), just like it does for any random USB stick. Removability is indicated to the upper layers by way of the SCSI RMB bit, as I haven't found another way to signal userspace to treat a sata disk like any usb stick. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* ahci: Store irq number in struct ahci_host_privRobert Richter2015-06-031-2/+2
| | | | | | | | | | | | | | | | | | | | Currently, ahci supports only msi and intx. To also support msix the handling of the irq number need to be changed. The irq number for msix devices is taken from msi_list instead of pci_dev. Thus, the irq number of a device needs to be stored in struct ahci_host_priv now. This allows the host controller to be activated in a generic way. This change is only intended for ahci drivers. For that reason the irq number is stored in struct ahci_host_priv used only by ahci drivers. Thus, the ABI changes only for ahci_host_activate(), but existing ata drivers (about 50) are unaffected and keep unchanged. All users of ahci_host_activate() have been updated. While touching drivers/ata/libahci.c, doing a small code cleanup in ahci_port_start(). Signed-off-by: Robert Richter <rrichter@cavium.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* libahci: Add support to handle HOST_IRQ_STAT as edge trigger latch.Suman Tripathi2015-05-101-0/+2
| | | | | | | | This patch adds the support to handle HOST_IRQ_STAT as edge trigger latch. Signed-off-by: Suman Tripathi <stripathi@apm.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* ata: ahci_platform: fix owner module reference mismatch for scsi hostAkinobu Mita2015-01-291-0/+4
| | | | | | | | | | | | | | | | | | | The owner module reference of the ahci platform's scsi_host is initialized to libahci_platform's one, because these drivers use a scsi_host_template defined in libahci_platform. So these drivers can be unloaded even if the scsi device is being accessed. This fixes it by pushing the scsi_host_template from libahci_platform to all leaf drivers. The scsi_host_template is passed through a new argument of ahci_platform_init_host(). Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Christoph Hellwig <hch@lst.de> Cc: "James E.J. Bottomley" <JBottomley@parallels.com> Cc: linux-ide@vger.kernel.org Cc: linux-scsi@vger.kernel.org
* ata: libahci: Allow using multiple regulatorsGregory CLEMENT2015-01-191-1/+1
| | | | | | | | | | | | | | | | | | The current implementation of the libahci allows using multiple PHYs but not multiple regulators. This patch adds the support of multiple regulators. Until now it was mandatory to have a PHY under a subnode, now a port subnode can contain either a regulator or a PHY (or both). In order to be able to asociate a port with a regulator the port are now a platform device in the device tree case. There was only one driver which used directly the regulator field of the ahci_host_priv structure. To preserve the bisectability the change in the ahci_imx driver was done in the same patch. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* AHCI: Do not read HOST_IRQ_STAT reg in multi-MSI modeAlexander Gordeev2014-10-061-1/+1
| | | | | | | | | | | | | | | | | | | As described in AHCI v1.0 specification chapter 10.6.2.2 "Multiple MSI Based Messages" generation of interrupts is not controlled through the HOST_IRQ_STAT register. Considering MMIO access is expensive remove unnecessary reading and writing of HOST_IRQ_STAT register. Further, serializing access to the host data is no longer needed and the interrupt service routine can avoid competing on the host lock. Signed-off-by: Alexander Gordeev <agordeev@redhat.com> Suggested-by: "Jiang, Dave" <dave.jiang@intel.com> Signed-off-by: Tejun Heo <tj@kernel.org> Cc: "Jiang, Dave" <dave.jiang@intel.com> Cc: linux-ide@vger.kernel.org
* AHCI: Move host activation code into ahci_host_activate()Alexander Gordeev2014-10-061-3/+0
| | | | | | | | | | | Currently host activation done by calling either function ahci_host_activate() or ata_host_activate(). Consolidate the code by only calling ahci_host_activate() for all AHCI devices. Signed-off-by: Alexander Gordeev <agordeev@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org> Cc: linux-ide@vger.kernel.org
* AHCI: Pass SCSI host template as arg to ahci_host_activate()Alexander Gordeev2014-10-061-1/+2
| | | | | | | | | | This update is a prerequisite for consolidation of AHCI host activation code within ahci_host_activate() function. Signed-off-by: Alexander Gordeev <agordeev@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org> Cc: linux-ide@vger.kernel.org
* AHCI: Cleanup checking of multiple MSIs/SLM modesAlexander Gordeev2014-09-281-1/+1
| | | | | | | | | | | Sharing Last Message (SLM) mode is currently checked in two functions: ahci_host_activate() and ahci_init_interrupts(). This update consolidates SLM mode check with activation of multiple MSIs mode. Signed-off-by: Alexander Gordeev <agordeev@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org> Cc: linux-ide@vger.kernel.org
* ahci-platform: Bump max number of clocks to 5Kumar Gala2014-09-231-1/+1
| | | | | | | | Qualcomm IPQ806x SoCs with SATA controllers need 5 clocks to be enabled. Signed-off-by: Kumar Gala <galak@codeaurora.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* ata: libahci: allow to use multiple PHYsAntoine Ténart2014-07-301-1/+6
| | | | | | | | | | | | | | | | | The current implementation of the libahci does not allow to use multiple PHYs. This patch adds the support of multiple PHYs by the libahci while keeping the old bindings valid for device tree compatibility. This introduce a new way of defining SATA ports in the device tree, with one port per sub-node. This as the advantage of allowing a per port configuration. Because some ports may be accessible but disabled in the device tree, the port_map mask is computed automatically when using this. Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* ata: libahci_platform: move port_map parameters into the AHCI structureAntoine Ténart2014-07-301-4/+6
| | | | | | | | | | | | | | This patch moves force_port_map and mask_port_map into the ahci_host_priv structure. This allows to modify them into the AHCI framework. This is needed by the new dt bindings representing ports as the port_map mask is computed automatically. Parameters modifying force_port_map, mask_port_map and flags have been removed from the ahci_platform_init_host() function, and inputs in the ahci_host_priv structure are now directly filed. Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* Merge branch 'for-3.16-fixes' of ↵Tejun Heo2014-07-301-0/+2
|\ | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata into for-3.17 The scheduled ahci platform patches depend on change in for-3.16-fixes. Pull it into for-3.17. Signed-off-by: Tejun Heo <tj@kernel.org>
| * libahci: export ahci_qc_issue() and ahci_start_fix_rx()Suman Tripathi2014-07-081-0/+2
| | | | | | | | | | | | | | | | The subsequent patch will make use of them. Signed-off-by: Loc Ho <lho@apm.com> Signed-off-by: Suman Tripathi <stripathi@apm.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* | ata: ahci_platform: Increase AHCI_MAX_CLKS to 4Mikko Perttunen2014-07-181-1/+1
|/ | | | | | | | | The Tegra124 SATA controller requires 4 clocks. Increase this constant to be able to use them all. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* Merge branch 'for-3.16' of ↵Linus Torvalds2014-06-091-0/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata Pull libata updates from Tejun Heo: "Nothing too interesting - another ahci platform driver variant, additional controller support, minor fixes and cleanups" * 'for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata: ahci: Add Device ID for HighPoint RocketRaid 642L ata: ep93xx: use dmaengine_prep_slave_sg api instead of internal callback ahci: add PCI ID for Marvell 88SE91A0 SATA Controller sata_fsl: remove check for CONFIG_MPC8315_DS ahci: add support for Hisilicon sata libahci_platform: add host_flags parameter in ahci_platform_init_host() ata: ahci: append new hflag AHCI_HFLAG_NO_FBS ata: use CONFIG_PM_SLEEP instead of CONFIG_PM where applicable in host drivers ata: ahci_mvebu: new driver for Marvell Armada 380 AHCI interfaces Documentation: dt-bindings: reformat and order list of ahci-platform compatibles libata-sff: remove dead code ata: SATL compliance for Inquiry Product Revision pata_octeon_cf: use devm_kzalloc() to allocate cf_port
| * ata: ahci: append new hflag AHCI_HFLAG_NO_FBSKefeng Wang2014-05-141-0/+1
| | | | | | | | | | | | | | | | | | Append AHCI_HFLAG_NO_FBS to force turning off FBS flag. Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Kefeng Wang <kefeng.wang@linaro.org> Signed-off-by: Tejun Heo <tj@kernel.org>
* | ahci: disable DEVSLP for Intel ValleyviewJacob Pan2014-04-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | On Intel Valleyview SoC, SATA device sleep is not reliable. When DEVSLP is attempted on certain SSDs, port_devslp write would fail and result in malfunction of AHCI controller. AHCI controller may be not shown in PCI enumeration after reset. Complete power source removal may be required to recover from this failure. So we blacklist this device and override host device reported capabilities such that device LPM will only attempt slumber but not DEVSLP. Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Acked-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* | ahci: Ensure "MSI Revert to Single Message" mode is not enforcedAlexander Gordeev2014-04-171-0/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AHCI specification allows hardware to choose to revert to single MSI mode when fewer messages are allocated than requested. Yet, at least ICH10 chipset reverts to single MSI mode even when enough messages are allocated in some cases (see below). This update forces the driver to not rely on initialization of multiple MSIs mode alone and always check if "MSI Revert to Single Message" (MRSM) mode was enforced by the controller and fallback to the single MSI mode in case it did. That prevents a situation when the driver configured multiple per-port IRQ handlers, but the controller sends all port's interrupts to a single IRQ, which could easily screw up the interrupt handling and lead to delays and possibly crashes. The fix was tested on a 6-port controller that successfully reverted to the single MSI mode: 00:1f.2 SATA controller: Intel Corporation 82801JI (ICH10 Family) SATA AHCI Controller (prog-if 01 [AHCI 1.0]) Subsystem: Super Micro Computer Inc Device 10a7 Flags: bus master, 66MHz, medium devsel, latency 0, IRQ 101 I/O ports at f110 [size=8] I/O ports at f100 [size=4] I/O ports at f0f0 [size=8] I/O ports at f0e0 [size=4] I/O ports at f020 [size=32] Memory at fbf00000 (32-bit, non-prefetchable) [size=2K] Capabilities: [80] MSI: Enable+ Count=1/16 Maskable- 64bit- Capabilities: [70] Power Management version 3 Capabilities: [a8] SATA HBA v1.0 Capabilities: [b0] PCI Advanced Features Kernel driver in use: ahci With 6 ports just 8 MSI vectors should be enough, but the adapter enforces the MRSM mode when less than 16 vectors are written to the Multiple Messages Enable PCI register. I instigated MRSM mode by forcing @nvec to 8 in ahci_init_interrupts(). Signed-off-by: Alexander Gordeev <agordeev@redhat.com> Cc: linux-ide@vger.kernel.org Cc: stable@vger.kernel.org Signed-off-by: Tejun Heo <tj@kernel.org>
* ata: ahci_platform: runtime resume the device before useRoger Quadros2014-02-221-0/+1
| | | | | | | | | | | | | | | | On OMAP platforms the device needs to be runtime resumed before it can be accessed. The OMAP HWMOD framework takes care of enabling the module and its resources based on the device's runtime PM state. In this patch we runtime resume during .probe() and runtime suspend after .remove(). We also update the runtime PM state during .resume(). CC: Balaji T K <balajitk@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* ata: ahci_platform: Manage SATA PHYRoger Quadros2014-02-221-0/+2
| | | | | | | | | | | | | Some platforms have a PHY hooked up to the SATA controller. The PHY needs to be initialized and powered up for SATA to work. We do that using the PHY framework. tj: Minor comment formatting updates. CC: Balaji T K <balajitk@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo<tj@kernel.org>
* ahci-platform: Add support for an optional regulator for sata-target powerHans de Goede2014-02-221-0/+2
| | | | | Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* ahci-platform: Add support for devices with more then 1 clockHans de Goede2014-02-221-1/+2
| | | | | | | | | | The allwinner-sun4i AHCI controller needs 2 clocks to be enabled and the imx AHCI controller needs 3 clocks to be enabled. tj: Minor comment formatting updates. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* libahci: Allow drivers to override start_engineHans de Goede2014-02-221-0/+6
| | | | | | | | | | | | | | Allwinner A10 and A20 ARM SoCs have an AHCI sata controller which needs a special register to be poked before starting the DMA engine. This register gets reset on an ahci_stop_engine call, so there is no other place then ahci_start_engine where this poking can be done. This commit allows drivers to override ahci_start_engine behavior for use by the Allwinner AHCI driver (and potentially other drivers in the future). Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* ahci: imx: setup power saving methodsRichard Zhu2013-10-151-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to save power consumption as much as possible. * Disable sata phy internal pll reference clock when sysetem enter into suspend mode, enable it after resume. * Setup module parameter used to enable imx ahci test power down mode(PDDQ) or not, when there is no device detected on the port * minor modifications: - The format of the copyright is changed, because that the original one can't pass fsl internal patch reivew without the character '(c)'. - Exports ahci_platform_ops and ahci_error_handler(). NOTE: * The hot-plug can't be supported when PDDQ mode is ever enabled. * module parameter usage how-to: - default: enable PDDQ mode when no device detected. - add "ahci-imx.hotplug=1" into kernel command line if your don't want to enable PDDQ mode when no device detected on the port. tj: Slightly updated description and comments. Signed-off-by: Richard Zhu <r65037@freescale.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* Merge branch 'libata/for-3.10-fixes' into libata/for-3.11Tejun Heo2013-07-031-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | libata/for-3.10-fixes never got submitted during v3.10 cycle. Merge it into for-3.11 so that it can be routed together with other changes scheduled for v3.11. Three trivial conflicts in drivers/ata/sata_rcar.c. All are caused by 1b20f6a9ad ("sata_rcar: add 'base' local variable to some functions") conflicting with logic updates in for-3.10-fixes. The offending commit simply adds local variable @base on functions which dereferences sata_rcar_priv->base multiple times. The resolutions are trivial - applying s/priv->base/base/ in the conflicting logic updates. Signed-off-by: Tejun Heo <tj@kernel.org>
| * libata: update "Maintained by:" tagsTejun Heo2013-05-141-1/+1
| | | | | | | | | | | | | | | | | | Jeff moved on to a greener pasture. s/Maintained by: Jeff Garzik/Maintained by: Tejun Heo/g Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Jeff Garzik <jgarzik@pobox.com>
* | sata highbank: add bit-banged SGPIO driver supportMark Langsdorf2013-06-061-0/+1
| | | | | | | | | | | | | | | | | | Highbank supports SGPIO by bit-banging out the SGPIO signals over three GPIO pins defined in the DTB. Add support for this SGPIO functionality. Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* | AHCI: Make distinct names for ports in /proc/interruptsAlexander Gordeev2013-05-221-0/+1
|/ | | | | | | | | | Currently all interrupts assigned to AHCI ports show up in '/proc/interrupts' as 'ahci'. This fix adds port numbers as suffixes and hence makes the descriptions distinct. Reported-by: Jan Beulich <JBeulich@suse.com> Signed-off-by: Alexander Gordeev <agordeev@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* AHCI: Support multiple MSIsAlexander Gordeev2013-01-241-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Take advantage of multiple MSIs implementation on x86 - on systems with IRQ remapping AHCI ports not only get assigned separate MSI vectors - but also separate IRQs. As result, interrupts generated by different ports could be serviced on different CPUs rather than on a single one. In cases when number of allocated MSIs is less than requested the Sharing Last MSI mode does not get used, no matter implemented in hardware or not. Instead, the driver assumes the advantage of multiple MSIs is negated and falls back to the single MSI mode as if MRSM bit was set (some Intel chips implement this strategy anyway - MRSM bit gets set even if the number of allocated MSIs exceeds the number of implemented ports). Signed-off-by: Alexander Gordeev <agordeev@redhat.com> Acked-by: Jeff Garzik <jgarzik@redhat.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Suresh Siddha <suresh.b.siddha@intel.com> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Matthew Wilcox <willy@linux.intel.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/15bf7ee314dd55f21ec7d2a01c47613cd8190a7c.1353324359.git.agordeev@redhat.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
* ata/ahci_platform: Add clock framework supportViresh Kumar2012-09-131-0/+2
| | | | | | | | | On many architectures, drivers are supposed to prepare/unprepare & enable/disable functional clock of device. This patch adds clock support for ahci_platform. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* ahci: implement aggressive SATA device sleep supportShane Huang2012-09-131-0/+14
| | | | | | | | | | | | | | | | | | | | | | Device Sleep is a feature as described in AHCI 1.3.1 Technical Proposal. This feature enables an HBA and SATA storage device to enter the DevSleep interface state, enabling lower power SATA-based systems. Aggressive Device Sleep enables the HBA to assert the DEVSLP signal as soon as there are no commands outstanding to the device and the port specific Device Sleep idle timer has expired. This enables autonomous entry into the DevSleep interface state without waiting for software in power sensitive systems. This patch enables Aggressive Device Sleep only if both host controller and device support it. Tested on AMD reference board together with Device Sleep supported device sample. Signed-off-by: Shane Huang <shane.huang@amd.com> Reviewed-by: Aaron Lu <aaron.lwe@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* ahci: un-staticize ahci_dev_classifyRob Herring2012-08-171-0/+1
| | | | | | | | Make ahci_dev_classify available to the ahci platform driver for custom hard reset function. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* ahci: move AHCI_HFLAGS() macro to ahci.hBrian Norris2012-03-131-0/+3
| | | | | | | | | We will need this macro in both ahci.c and ahci_platform.c, so just move it to the header. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com> Cc: stable@kernel.org
* ahci: add AHCI_HFLAG_DELAY_ENGINE host flagBrian Norris2012-03-131-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | The following commit was intended to fix problems with specific AHCI controller(s) that would become bricks if the AHCI specification was not followed strictly (that is, if ahci_start_engine() was called while the controller was in the wrong state): commit 7faa33da9b7add01db9f1ad92c6a5d9145e940a7 ahci: start engine only during soft/hard resets However, some devices currently have issues with that fix, so we must implement a flag that delays the ahci_start_engine() call only for specific controllers. This commit simply introduces the flag, without enabling it in any driver. Note that even when AHCI_HFLAG_DELAY_ENGINE is not enabled, this patch does not constitue a full revert to commit 7faa33da; there is still a change in behavior to the ahci_port_suspend() failure path. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com> Cc: stable@kernel.org
* ahci: move ahci_sb600_softreset to libahci.c and rename itYuan-Hsin Chen2011-07-231-0/+1
| | | | | | | | | ahci_sb600_softreset was in ahci.c. This function is used to fix soft reset failure and renames as ahci_pmp_retry_softreset in libahci.c. Signed-off-by: Yuan-Hsin Chen <yhchen@faraday-tech.com> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
* ahci: EM supported message type sysfs attributeHannes Reinecke2011-04-241-0/+4
| | | | | | | | | This patch adds an sysfs attribute 'em_message_supported' to the ahci host device which prints out the supported enclosure management message types. Signed-off-by: Hannes Reinecke <hare@suse.de> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
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