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* clk: actions: Use the correct style for SPDX License IdentifierNishad Kamdar2019-05-019-9/+9
* clk: actions: Add clock driver for S500 SoCManivannan Sadhasivam2019-02-223-0/+531
* clk: actions: Add configurable PLL delayManivannan Sadhasivam2019-02-222-7/+25
* clk: actions: Add Actions Semi S900 SoC Reset Management Unit supportManivannan Sadhasivam2018-10-161-0/+82
* clk: actions: Add Actions Semi S700 SoC Reset Management Unit supportManivannan Sadhasivam2018-10-161-0/+51
* clk: actions: Add Actions Semi Owl SoCs Reset Management Unit supportManivannan Sadhasivam2018-10-165-0/+101
* clk: actions: Cache regmap info in private clock descriptorManivannan Sadhasivam2018-10-164-6/+8
* clk: actions: Add S700 SoC clock supportSaravanan Sekar2018-07-263-0/+613
* clk: actions: Add missing REGMAP_MMIO dependencySaravanan Sekar2018-07-261-0/+1
* clk: actions: Add S900 SoC clock supportManivannan Sadhasivam2018-04-063-0/+734
* clk: actions: Add pll clock supportManivannan Sadhasivam2018-04-063-0/+287
* clk: actions: Add composite clock supportManivannan Sadhasivam2018-04-063-0/+324
* clk: actions: Add fixed factor clock supportManivannan Sadhasivam2018-04-061-0/+28
* clk: actions: Add factor clock supportManivannan Sadhasivam2018-04-063-0/+306
* clk: actions: Add divider clock supportManivannan Sadhasivam2018-04-063-0/+170
* clk: actions: Add mux clock supportManivannan Sadhasivam2018-04-063-0/+122
* clk: actions: Add gate clock supportManivannan Sadhasivam2018-04-063-0/+151
* clk: actions: Add common clock driver supportManivannan Sadhasivam2018-04-064-0/+137
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-23 17:13:25 +0100