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*-. Merge branches 'clk-cdce-regulator', 'clk-bcm', 'clk-evict-parent-cache' and ↵Stephen Boyd2019-09-201-4/+3
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'clk-actions' into clk-next - Add regulator support to the cdce925 clk driver - Add support for Raspberry Pi 4 bcm2711 SoCs - Evict parents from parent cache when they're unregistered * clk-cdce-regulator: clk: clk-cdce925: Add regulator support dt-bindings: clock: cdce925: Add regulator documentation * clk-bcm: clk: bcm2835: Mark PLLD_PER as CRITICAL clk: bcm2835: Add BCM2711_CLOCK_EMMC2 support clk: bcm2835: Introduce SoC specific clock registration dt-bindings: bcm2835-cprman: Add bcm2711 support * clk-evict-parent-cache: clk: Evict unregistered clks from parent caches * clk-actions: clk: actions: Fix factor clk struct member access
| | * clk: actions: Fix factor clk struct member accessManivannan Sadhasivam2019-09-171-4/+3
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the helper "owl_factor_helper_round_rate" is shared between factor and composite clocks, using the factor clk specific helper function like "hw_to_owl_factor" to access its members will create issues when called from composite clk specific code. Hence, pass the "factor_hw" struct pointer directly instead of fetching it using factor clk specific helpers. This issue has been observed when a composite clock like "sd0_clk" tried to call "owl_factor_helper_round_rate" resulting in pointer dereferencing error. While we are at it, let's rename the "clk_val_best" function to "owl_clk_val_best" since this is an owl SoCs specific helper. Fixes: 4bb78fc9744a ("clk: actions: Add factor clock support") Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Link: https://lkml.kernel.org/r/20190916154546.24982-2-manivannan.sadhasivam@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* / clk: actions: Don't reference clk_init_data after registrationStephen Boyd2019-08-161-2/+3
|/ | | | | | | | | | | | | A future patch is going to change semantics of clk_register() so that clk_hw::init is guaranteed to be NULL after a clk is registered. Avoid referencing this member here so that we don't run into NULL pointer exceptions. Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> Link: https://lkml.kernel.org/r/20190731193517.237136-2-sboyd@kernel.org [sboyd@kernel.org: Move name to after checking for error or NULL hw] Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
* treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner2019-05-212-0/+2
| | | | | | | | | | | | | | Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* clk: actions: Use the correct style for SPDX License IdentifierNishad Kamdar2019-05-019-9/+9
| | | | | | | | | | | | | | | This patch corrects the SPDX License Identifier style in header files related to Clock Drivers for Actions Semi Socs. For C header files Documentation/process/license-rules.rst mandates C-like comments (opposed to C source files where C++ style should be used) Changes made by using a script provided by Joe Perches here: https://lkml.org/lkml/2019/2/7/46 Suggested-by: Joe Perches <joe@perches.com> Signed-off-by: Nishad Kamdar <nishadkamdar@gmail.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: actions: Add clock driver for S500 SoCManivannan Sadhasivam2019-02-223-0/+531
| | | | | | | | | Add common clock driver for Actions Semi S500 SoC. Signed-off-by: Edgar Bernardi Righi <edgar.righi@lsitec.org.br> [Mani: cleaned up the driver] Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: actions: Add configurable PLL delayManivannan Sadhasivam2019-02-222-7/+25
| | | | | | | | | | S500 SoC requires configurable delay for different PLLs. Hence, add a separate macro for declaring a PLL with configurable delay and also modify the existing OWL_PLL_NO_PARENT macro to use default delay so that no need to modify the existing S700/S900 drivers. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: actions: Add Actions Semi S900 SoC Reset Management Unit supportManivannan Sadhasivam2018-10-161-0/+82
| | | | | | | Add Reset Management Unit (RMU) support for Actions Semi S900 SoC. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: actions: Add Actions Semi S700 SoC Reset Management Unit supportManivannan Sadhasivam2018-10-161-0/+51
| | | | | | | Add Reset Management Unit (RMU) support for Actions Semi S700 SoC. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: actions: Add Actions Semi Owl SoCs Reset Management Unit supportManivannan Sadhasivam2018-10-165-0/+101
| | | | | | | Add Reset Management Unit (RMU) support for Actions Semi Owl SoCs. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: actions: Cache regmap info in private clock descriptorManivannan Sadhasivam2018-10-164-6/+8
| | | | | | | | | In order to support the reset controller, regmap info needs to be cached in the private clock descriptor, owl_clk_desc. Hence, save that and also make the clock descriptor struct non const. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: actions: Add S700 SoC clock supportSaravanan Sekar2018-07-263-0/+613
| | | | | | | | | Add Actions Semi S700 SoC clock support Signed-off-by: Parthiban Nallathambi <pn@denx.de> Signed-off-by: Saravanan Sekar <sravanhome@gmail.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: actions: Add missing REGMAP_MMIO dependencySaravanan Sekar2018-07-261-0/+1
| | | | | | | | | | | Add REGMAP_MMIO as dependency to avoid undefined reference to regmap symbols. Fixes: d85d20053e19 ("clk: actions: Add S900 SoC clock support") Signed-off-by: Saravanan Sekar <sravanhome@gmail.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: actions: Add S900 SoC clock supportManivannan Sadhasivam2018-04-063-0/+734
| | | | | | | Add Actions Semi S900 SoC clock support. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: actions: Add pll clock supportManivannan Sadhasivam2018-04-063-0/+287
| | | | | | | Add support for Actions Semi PLL clock. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: actions: Add composite clock supportManivannan Sadhasivam2018-04-063-0/+324
| | | | | | | | Add support for Actions Semi composite clock. This clock consists of gate, mux, divider, factor and fixed factor clocks. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: actions: Add fixed factor clock supportManivannan Sadhasivam2018-04-061-0/+28
| | | | | | | | Add support for Actions Semi fixed factor clock reusing the clk ops from common clock driver. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: actions: Add factor clock supportManivannan Sadhasivam2018-04-063-0/+306
| | | | | | | | Add support for Actions Semi factor clock together with helper functions to be used in composite clock. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: actions: Add divider clock supportManivannan Sadhasivam2018-04-063-0/+170
| | | | | | | | Add support for Actions Semi divider clock together with helper functions to be used in composite clock. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: actions: Add mux clock supportManivannan Sadhasivam2018-04-063-0/+122
| | | | | | | | Add support for Actions Semi mux clock together with helper functions to be used in composite clock. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: actions: Add gate clock supportManivannan Sadhasivam2018-04-063-0/+151
| | | | | | | | Add support for Actions Semi gate clock together with helper functions to be used in composite clock. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: actions: Add common clock driver supportManivannan Sadhasivam2018-04-064-0/+137
Add support for Actions Semi common clock driver with generic structures and interface functions. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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