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path: root/drivers/clk/bcm/clk-bcm2835.c (follow)
Commit message (Expand)AuthorAgeFilesLines
* treewide: devm_kzalloc() -> devm_kcalloc()Kees Cook2018-06-131-2/+2
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2018-06-091-24/+18
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| *-. Merge branches 'clk-match-string', 'clk-ingenic', 'clk-si544-round-fix' and '...Stephen Boyd2018-06-041-7/+6
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| | * | clk: bcm2835: use match_string() helperYisheng Xie2018-06-021-7/+6
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| * | clk: Return void from debug_init opStephen Boyd2018-06-021-14/+11
| * | clk: bcm2835: no need to check return value of debugfs_create functionsGreg Kroah-Hartman2018-06-021-4/+2
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* / treewide: Use struct_size() for devm_kmalloc() and friendsKees Cook2018-06-061-2/+2
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* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2018-04-141-3/+5
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| * clk: bcm2835: De-assert/assert PLL reset signal when appropriateBoris Brezillon2018-04-061-3/+5
* | clk: bcm2835: Protect sections updating shared registersBoris Brezillon2018-03-191-0/+4
* | clk: bcm2835: Fix ana->maskX definitionsBoris Brezillon2018-03-191-4/+4
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* clk: bcm2835: remove remains from stub clk driverDanilo Krummrich2017-09-251-30/+0
* clk: bcm2835: Minimise clock jitter for PCM clockPhil Elwell2017-06-031-5/+29
* clk: bcm2835: Limit PCM clock to OSC and PLLD_PERPhil Elwell2017-06-031-1/+26
* clk: bcm2835: Correct the prediv logicPhil Elwell2017-06-031-1/+3
* clk: bcm2835: Add leaf clock measurement support, disabled by defaultEric Anholt2017-01-211-25/+119
* clk: bcm2835: Register the DSI0/DSI1 pixel clocks.Eric Anholt2017-01-211-12/+109
* clk: bcm2835: Don't rate change PLLs on behalf of DSI PLL dividers.Eric Anholt2017-01-211-14/+28
* clk: bcm: Fix 'maybe-uninitialized' warning in bcm2835_clock_choose_div_and_p...Boris Brezillon2016-12-121-1/+1
* clk: bcm: Allow rate change propagation to PLLH_AUX on VEC clockBoris Brezillon2016-12-091-1/+6
* clk: bcm: Support rate change propagation on bcm2835 clocksBoris Brezillon2016-12-091-4/+63
* clk: bcm2835: Avoid overwriting the div info when disabling a pll_div clkBoris Brezillon2016-12-081-1/+3
* clk: bcm2835: Fix ->fixed_divider of pllh_auxBoris Brezillon2016-11-231-1/+1
* clk: bcm2835: Clamp the PLL's requested rate to the hardware limits.Eric Anholt2016-10-181-7/+4
* clk: bcm2835: Migrate to clk_hw based registration and OF APIsStephen Boyd2016-09-151-39/+46
* clk: bcm2835: Skip PLLC clocks when deciding on a new clock parentEric Anholt2016-09-071-0/+23
* clk: bcm2835: Mark the CM SDRAM clock's parent as criticalEric Anholt2016-09-071-0/+25
* clk: bcm2835: Mark GPIO clocks enabled at boot as criticalEric Anholt2016-09-071-1/+9
* clk: bcm2835: Mark the VPU clock as criticalEric Anholt2016-09-071-1/+4
* clk: bcm2835: Fix PLL poweronEric Anholt2016-04-201-0/+4
* clk: bcm2835: Fix compiler warnings on 64-bit buildsEric Anholt2016-04-201-4/+4
* clk: bcm2835: add missing osc and per clocksMartin Sperl2016-03-171-0/+90
* clk: bcm2835: add missing PLL clock dividersMartin Sperl2016-03-171-0/+32
* clk: bcm2835: enable management of PCM clockMartin Sperl2016-03-171-0/+7
* clk: bcm2835: reorganize bcm2835_clock_array assignmentMartin Sperl2016-03-171-459/+393
* clk: bcm2835: remove use of BCM2835_CLOCK_COUNT in driverMartin Sperl2016-03-171-73/+94
* clk: bcm2835: expose raw clock-registers via debugfsMartin Sperl2016-03-171-0/+101
* clk: bcm2835: clean up coding style issuesMartin Sperl2016-03-171-6/+2
* clk: bcm2835: correctly enable fractional clock supportMartin Sperl2016-03-171-6/+39
* clk: bcm2835: divider value has to be 1 or moreMartin Sperl2016-03-171-2/+3
* clk: bcm2835: add locking to pll*_on/off methodsMartin Sperl2016-03-171-0/+4
* clk: bcm2835: pll_off should only update CM_PLL_ANARSTMartin Sperl2016-03-171-2/+8
* clk: bcm: Remove CLK_IS_ROOTStephen Boyd2016-03-031-6/+3
* clk: bcm2835: added missing clock register definitionsMartin Sperl2016-02-261-0/+13
* clk: bcm2835: Reuse CLK_DIVIDER_MAX_AT_ZERO for recalc_rate()Eric Anholt2016-02-161-11/+2
* clk: bcm2835: Fix setting of PLL divider clock ratesEric Anholt2016-02-161-5/+7
* clk: bcm2835: Add PWM clock supportRemi Pommarel2015-12-251-0/+13
* clk: bcm2835: Support for clock parent selectionRemi Pommarel2015-12-251-45/+77
* clk: bcm2835: add a round up ability to the clock divisorRemi Pommarel2015-12-251-10/+12
* clk: bcm2835: Add support for programming the audio domain clocksEric Anholt2015-10-121-1/+1521
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