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path:
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/
drivers
/
clk
/
clk-aspeed.c
(
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)
Commit message (
Expand
)
Author
Age
Files
Lines
*
clk: aspeed: Add RMII RCLK gates for both AST2500 MACs
Andrew Jeffery
2019-11-26
1
-1
/
+26
*
clk: aspeed: Move structures to header
Joel Stanley
2019-09-07
1
-64
/
+3
*
clk: aspeed: Add SDIO gate
Joel Stanley
2019-08-07
1
-3
/
+8
*
clk: Aspeed: Setup video engine clocking
Eddie James
2019-04-18
1
-3
/
+39
*
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...
Linus Torvalds
2018-08-16
1
-1
/
+1
|
\
|
*
clk: aspeed: Fix SDCLK name
Lei YU
2018-07-06
1
-1
/
+1
*
|
clk: aspeed: Support HPLL strapping on ast2400
Joel Stanley
2018-07-11
1
-13
/
+29
*
|
clk: aspeed: Mark bclk (PCIe) and dclk (VGA) as critical
Joel Stanley
2018-07-06
1
-2
/
+2
*
|
clk: aspeed: Treat a gate in reset as disabled
Benjamin Herrenschmidt
2018-07-06
1
-0
/
+13
|
/
*
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...
Linus Torvalds
2018-06-09
1
-11
/
+46
|
\
|
*
-
.
Merge branches 'clk-imx6sx', 'clk-imx7d-enet' and 'clk-aspeed-24' into clk-next
Stephen Boyd
2018-06-04
1
-1
/
+8
|
|
\
\
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*
clk: aspeed: Add 24MHz fixed clock
Lei YU
2018-06-01
1
-1
/
+8
|
|
|
/
|
*
|
clk:aspeed: Fix reset bits for PCI/VGA and PECI
Jae Hyun Yoo
2018-05-16
1
-2
/
+2
|
*
|
clk: aspeed: Support second reset register
Joel Stanley
2018-05-15
1
-8
/
+36
|
|
/
*
/
treewide: Use struct_size() for kmalloc()-family
Kees Cook
2018-06-06
1
-3
/
+3
|
/
*
clk: aspeed: Prevent reset if clock is enabled
Eddie James
2018-03-15
1
-12
/
+17
*
clk: aspeed: Fix is_enabled for certain clocks
Eddie James
2018-03-15
1
-1
/
+2
*
clk: aspeed: Handle inverse polarity of USB port 1 clock gate
Benjamin Herrenschmidt
2018-01-27
1
-3
/
+12
*
clk: aspeed: Fix return value check in aspeed_cc_init()
Wei Yongjun
2018-01-27
1
-1
/
+1
*
clk: aspeed: Add reset controller
Joel Stanley
2018-01-27
1
-1
/
+81
*
clk: aspeed: Register gated clocks
Joel Stanley
2018-01-27
1
-0
/
+130
*
clk: aspeed: Add platform driver and register PLLs
Joel Stanley
2018-01-27
1
-0
/
+130
*
clk: aspeed: Register core clocks
Joel Stanley
2018-01-27
1
-0
/
+177
*
clk: Add clock driver for ASPEED BMC SoCs
Joel Stanley
2018-01-27
1
-0
/
+141