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* clk: fractional-divider: cast parent_rate to u64 before multiplyingHeiko Stübner2014-09-101-1/+1
| | | | | | | | | | | | | | | On 32bit architectures, like ARM calculating the fractional rate will do the multiplication before converting the value to u64 when it gets assigned to ret, which can produce overflows. The error in question happened with a parent_rate of 386MHz, m = 3000, n = 60000, which resulted in a wrong rate value of 15812Hz. Therefore cast parent_rate to u64 to make sure the multiplication happens in a 64bit space and produces the correct 192MHz in the example. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* clk: new basic clk type for fractional dividerHeikki Krogerus2014-05-201-0/+135
Fractional divider clocks are fairly common. This adds basic type for them. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>