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path: root/drivers/clk/clk-versaclock3.c (follow)
Commit message (Expand)AuthorAgeFilesLines
* clk: versaclock3: Drop ret variableBiju Das2023-12-181-19/+11
* clk: versaclock3: Add missing space between ')' and '{'Biju Das2023-12-181-22/+22
* clk: versaclock3: Use u8 return type for get_parent() callbackBiju Das2023-12-181-3/+3
* clk: versaclock3: Avoid unnecessary paddingBiju Das2023-12-181-3/+3
* clk: versaclock3: Update vc3_get_div() to avoid divide by zeroBiju Das2023-12-181-1/+1
*-. Merge branches 'clk-renesas', 'clk-kunit', 'clk-regmap' and 'clk-frac-divider...Stephen Boyd2023-10-301-7/+1
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| | * clk: versaclock3: Convert to use maple tree register cacheMark Brown2023-10-101-1/+1
| | * clk: versaclock3: Remove redundant _is_writeable()Mark Brown2023-10-101-6/+0
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* | clk: vc3: Make vc3_clk_mux enum values based on vc3_clk enum valuesBiju Das2023-09-111-8/+8
* | clk: vc3: Fix output clock mappingBiju Das2023-09-111-34/+34
* | clk: vc3: Fix 64 by 64 divisionBiju Das2023-09-111-3/+2
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* clk: versaclock3: Switch to use i2c_driver's probe callbackUwe Kleine-König2023-08-011-1/+1
* clk: Add support for versa3 clock driverBiju Das2023-07-201-0/+1143